Re: [Intel-gfx] [PATCH 1/4] drm/i915/vbt: Add 'tp4' to varibles holding TP2/3/4 PSR wakeup time

2019-01-22 Thread Jani Nikula 
On Wed, 16 Jan 2019, José Roberto de Souza  wrote:
> Recent update in spec made the field holding the TP2 and TP3 wakeup
> time for PSR also hold the TP4, so lets rename the variables to
> reflect that.
>
> BSpec: 20131
>
> Cc: Dhinakaran Pandiyan 
> Signed-off-by: José Roberto de Souza 
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |  2 +-
>  drivers/gpu/drm/i915/intel_bios.c | 16 
>  drivers/gpu/drm/i915/intel_psr.c  | 14 +++---
>  drivers/gpu/drm/i915/intel_vbt_defs.h |  2 +-
>  4 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 310d9e1e1620..e717c3132692 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -996,7 +996,7 @@ struct intel_vbt_data {
>   int idle_frames;
>   enum psr_lines_to_wait lines_to_wait;
>   int tp1_wakeup_time_us;
> - int tp2_tp3_wakeup_time_us;
> + int tp2_tp3_tp4_wakeup_time_us;

I think this is too long, perhaps just tp234_wakeup_time_us or
something?

BR,
Jani.



>   } psr;
>  
>   struct {
> diff --git a/drivers/gpu/drm/i915/intel_bios.c 
> b/drivers/gpu/drm/i915/intel_bios.c
> index 561a4f9f044c..cd99bf88bf6c 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -738,27 +738,27 @@ parse_psr(struct drm_i915_private *dev_priv, const 
> struct bdb_header *bdb)
>   break;
>   }
>  
> - switch (psr_table->tp2_tp3_wakeup_time) {
> + switch (psr_table->tp2_tp3_tp4_wakeup_time) {
>   case 0:
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 500;
>   break;
>   case 1:
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 100;
>   break;
>   case 3:
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 0;
>   break;
>   default:
> - DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is 
> outside range[0-3], defaulting to max value 2500us\n",
> - psr_table->tp2_tp3_wakeup_time);
> + DRM_DEBUG_KMS("VBT tp2_tp3_tp4 wakeup time value %d is 
> outside range[0-3], defaulting to max value 2500us\n",
> +   psr_table->tp2_tp3_tp4_wakeup_time);
>   /* fallthrough */
>   case 2:
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 2500;
>   break;
>   }
>   } else {
>   dev_priv->vbt.psr.tp1_wakeup_time_us = 
> psr_table->tp1_wakeup_time * 100;
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 
> psr_table->tp2_tp3_wakeup_time * 100;
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 
> psr_table->tp2_tp3_tp4_wakeup_time * 100;
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> b/drivers/gpu/drm/i915/intel_psr.c
> index 0f6b2b4702e3..49b4b3371bef 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -468,11 +468,11 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
>   else
>   val |= EDP_PSR_TP1_TIME_2500us;
>  
> - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us == 0)
> + if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us == 0)
>   val |=  EDP_PSR_TP2_TP3_TIME_0us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
> + else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 100)
>   val |= EDP_PSR_TP2_TP3_TIME_100us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
> + else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 500)
>   val |= EDP_PSR_TP2_TP3_TIME_500us;
>   else
>   val |= EDP_PSR_TP2_TP3_TIME_2500us;
> @@ -509,12 +509,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
>  
>   val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
>  
> - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 &&
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50)
> + if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us >= 0 &&
> + dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 50)
>   val |= EDP_PSR2_TP2_TIME_50us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
> + else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 100)
>   val |= EDP_PSR2_TP2_TIME_100us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
> + else if (dev_p

[Intel-gfx] [PATCH 1/4] drm/i915/vbt: Add 'tp4' to varibles holding TP2/3/4 PSR wakeup time

2019-01-16 Thread José Roberto de Souza 
Recent update in spec made the field holding the TP2 and TP3 wakeup
time for PSR also hold the TP4, so lets rename the variables to
reflect that.

BSpec: 20131

Cc: Dhinakaran Pandiyan 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/i915/i915_drv.h   |  2 +-
 drivers/gpu/drm/i915/intel_bios.c | 16 
 drivers/gpu/drm/i915/intel_psr.c  | 14 +++---
 drivers/gpu/drm/i915/intel_vbt_defs.h |  2 +-
 4 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 310d9e1e1620..e717c3132692 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -996,7 +996,7 @@ struct intel_vbt_data {
int idle_frames;
enum psr_lines_to_wait lines_to_wait;
int tp1_wakeup_time_us;
-   int tp2_tp3_wakeup_time_us;
+   int tp2_tp3_tp4_wakeup_time_us;
} psr;
 
struct {
diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index 561a4f9f044c..cd99bf88bf6c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -738,27 +738,27 @@ parse_psr(struct drm_i915_private *dev_priv, const struct 
bdb_header *bdb)
break;
}
 
-   switch (psr_table->tp2_tp3_wakeup_time) {
+   switch (psr_table->tp2_tp3_tp4_wakeup_time) {
case 0:
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 500;
break;
case 1:
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 100;
break;
case 3:
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 0;
break;
default:
-   DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is 
outside range[0-3], defaulting to max value 2500us\n",
-   psr_table->tp2_tp3_wakeup_time);
+   DRM_DEBUG_KMS("VBT tp2_tp3_tp4 wakeup time value %d is 
outside range[0-3], defaulting to max value 2500us\n",
+ psr_table->tp2_tp3_tp4_wakeup_time);
/* fallthrough */
case 2:
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 2500;
break;
}
} else {
dev_priv->vbt.psr.tp1_wakeup_time_us = 
psr_table->tp1_wakeup_time * 100;
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 
psr_table->tp2_tp3_wakeup_time * 100;
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us = 
psr_table->tp2_tp3_tp4_wakeup_time * 100;
}
 }
 
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 0f6b2b4702e3..49b4b3371bef 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -468,11 +468,11 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
else
val |= EDP_PSR_TP1_TIME_2500us;
 
-   if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us == 0)
+   if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us == 0)
val |=  EDP_PSR_TP2_TP3_TIME_0us;
-   else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
+   else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 100)
val |= EDP_PSR_TP2_TP3_TIME_100us;
-   else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
+   else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 500)
val |= EDP_PSR_TP2_TP3_TIME_500us;
else
val |= EDP_PSR_TP2_TP3_TIME_2500us;
@@ -509,12 +509,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 
val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
 
-   if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 &&
-   dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50)
+   if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us >= 0 &&
+   dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 50)
val |= EDP_PSR2_TP2_TIME_50us;
-   else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
+   else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 100)
val |= EDP_PSR2_TP2_TIME_100us;
-   else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
+   else if (dev_priv->vbt.psr.tp2_tp3_tp4_wakeup_time_us <= 500)
val |= EDP_PSR2_TP2_TIME_500us;
else
val |= EDP_PSR2_TP2_TIME_2500us;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
b/drivers/gpu/drm/i9