[Intel-gfx] [PATCH 1/4] drm/i915: Always initialize dpll.lock

2022-09-21 Thread Ville Syrjala
From: Ville Syrjälä 

Initialize the dll.lock mutex whether or not we manage to
initialize the rest of the dpll mgr.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index e5fb66a5dd02..9c60cf69cde1 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4193,6 +4193,8 @@ void intel_shared_dpll_init(struct drm_i915_private 
*dev_priv)
const struct dpll_info *dpll_info;
int i;
 
+   mutex_init(&dev_priv->display.dpll.lock);
+
if (IS_DG2(dev_priv))
/* No shared DPLLs on DG2; port PLLs are part of the PHY */
dpll_mgr = NULL;
@@ -4237,7 +4239,6 @@ void intel_shared_dpll_init(struct drm_i915_private 
*dev_priv)
 
dev_priv->display.dpll.mgr = dpll_mgr;
dev_priv->display.dpll.num_shared_dpll = i;
-   mutex_init(&dev_priv->display.dpll.lock);
 }
 
 /**
-- 
2.35.1



Re: [Intel-gfx] [PATCH 1/4] drm/i915: Always initialize dpll.lock

2022-09-22 Thread Jani Nikula
On Wed, 21 Sep 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Initialize the dll.lock mutex whether or not we manage to
> initialize the rest of the dpll mgr.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index e5fb66a5dd02..9c60cf69cde1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4193,6 +4193,8 @@ void intel_shared_dpll_init(struct drm_i915_private 
> *dev_priv)
>   const struct dpll_info *dpll_info;
>   int i;
>  
> + mutex_init(&dev_priv->display.dpll.lock);
> +
>   if (IS_DG2(dev_priv))
>   /* No shared DPLLs on DG2; port PLLs are part of the PHY */
>   dpll_mgr = NULL;
> @@ -4237,7 +4239,6 @@ void intel_shared_dpll_init(struct drm_i915_private 
> *dev_priv)
>  
>   dev_priv->display.dpll.mgr = dpll_mgr;
>   dev_priv->display.dpll.num_shared_dpll = i;
> - mutex_init(&dev_priv->display.dpll.lock);
>  }
>  
>  /**

-- 
Jani Nikula, Intel Open Source Graphics Center