On Mon, Nov 13, 2023 at 06:47:08PM +0200, Jani Nikula wrote:
> Considering what the functions do, intel_dpll.c is a more suitable
> location, and lets us make some functions static while at it.
>
> This also means intel_display.c no longer does any DPIO access.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 171 -
> drivers/gpu/drm/i915/display/intel_display.h | 2 -
> drivers/gpu/drm/i915/display/intel_dpll.c | 175 +-
> drivers/gpu/drm/i915/display/intel_dpll.h | 9 +-
> .../gpu/drm/i915/display/intel_pch_display.c | 1 +
> 5 files changed, 181 insertions(+), 177 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 3effafcbb411..09056232483c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -73,7 +73,6 @@
> #include "intel_dp.h"
> #include "intel_dp_link_training.h"
> #include "intel_dp_mst.h"
> -#include "intel_dpio_phy.h"
> #include "intel_dpll.h"
> #include "intel_dpll_mgr.h"
> #include "intel_dpt.h"
> @@ -2859,67 +2858,6 @@ static void i9xx_get_pfit_config(struct
> intel_crtc_state *crtc_state)
> intel_de_read(dev_priv, PFIT_PGM_RATIOS);
> }
>
> -static void vlv_crtc_clock_get(struct intel_crtc *crtc,
> -struct intel_crtc_state *pipe_config)
> -{
> - struct drm_device *dev = crtc->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - enum pipe pipe = crtc->pipe;
> - struct dpll clock;
> - u32 mdiv;
> - int refclk = 10;
> -
> - /* In case of DSI, DPLL will not be used */
> - if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)
> - return;
> -
> - vlv_dpio_get(dev_priv);
> - mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe));
> - vlv_dpio_put(dev_priv);
> -
> - clock.m1 = (mdiv >> DPIO_M1DIV_SHIFT) & 7;
> - clock.m2 = mdiv & DPIO_M2DIV_MASK;
> - clock.n = (mdiv >> DPIO_N_SHIFT) & 0xf;
> - clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
> - clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
> -
> - pipe_config->port_clock = vlv_calc_dpll_params(refclk, );
> -}
> -
> -static void chv_crtc_clock_get(struct intel_crtc *crtc,
> -struct intel_crtc_state *pipe_config)
> -{
> - struct drm_device *dev = crtc->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - enum pipe pipe = crtc->pipe;
> - enum dpio_channel port = vlv_pipe_to_channel(pipe);
> - struct dpll clock;
> - u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3;
> - int refclk = 10;
> -
> - /* In case of DSI, DPLL will not be used */
> - if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)
> - return;
> -
> - vlv_dpio_get(dev_priv);
> - cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port));
> - pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port));
> - pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port));
> - pll_dw2 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW2(port));
> - pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port));
> - vlv_dpio_put(dev_priv);
> -
> - clock.m1 = (pll_dw1 & 0x7) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;
> - clock.m2 = (pll_dw0 & 0xff) << 22;
> - if (pll_dw3 & DPIO_CHV_FRAC_DIV_EN)
> - clock.m2 |= pll_dw2 & 0x3f;
> - clock.n = (pll_dw1 >> DPIO_CHV_N_DIV_SHIFT) & 0xf;
> - clock.p1 = (cmn_dw13 >> DPIO_CHV_P1_DIV_SHIFT) & 0x7;
> - clock.p2 = (cmn_dw13 >> DPIO_CHV_P2_DIV_SHIFT) & 0x1f;
> -
> - pipe_config->port_clock = chv_calc_dpll_params(refclk, );
> -}
> -
> static enum intel_output_format
> bdw_get_pipe_misc_output_format(struct intel_crtc *crtc)
> {
> @@ -3840,115 +3778,6 @@ bool intel_crtc_get_pipe_config(struct
> intel_crtc_state *crtc_state)
> return true;
> }
>
> -static int i9xx_pll_refclk(struct drm_device *dev,
> -const struct intel_crtc_state *pipe_config)
> -{
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - u32 dpll = pipe_config->dpll_hw_state.dpll;
> -
> - if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
> - return dev_priv->display.vbt.lvds_ssc_freq;
> - else if (HAS_PCH_SPLIT(dev_priv))
> - return 12;
> - else if (DISPLAY_VER(dev_priv) != 2)
> - return 96000;
> - else
> - return 48000;
> -}
> -
> -/* Returns the clock of the currently programmed mode of the given pipe. */
> -void i9xx_crtc_clock_get(struct intel_crtc *crtc,
> - struct intel_crtc_state *pipe_config)
> -{
> - struct drm_device *dev = crtc->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - u32 dpll = pipe_config->dpll_hw_state.dpll;
> - u32 fp;
> - struct