[Intel-gfx] [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats
Signed-off-by: Anuj Phogat --- include/drm/i915_drm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index ded43b1..a6c167c 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -842,6 +842,8 @@ struct drm_i915_gem_caching { #define I915_TILING_NONE 0 #define I915_TILING_X 1 #define I915_TILING_Y 2 +#define I915_TILING_YF 3 +#define I915_TILING_YS 4 #define I915_BIT_6_SWIZZLE_NONE0 #define I915_BIT_6_SWIZZLE_9 1 -- 2.3.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats
On Mon, Mar 30, 2015 at 02:00:04PM -0700, Anuj Phogat wrote: > Signed-off-by: Anuj Phogat > --- > include/drm/i915_drm.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > index ded43b1..a6c167c 100644 > --- a/include/drm/i915_drm.h > +++ b/include/drm/i915_drm.h > @@ -842,6 +842,8 @@ struct drm_i915_gem_caching { > #define I915_TILING_NONE 0 > #define I915_TILING_X1 > #define I915_TILING_Y2 > +#define I915_TILING_YF 3 > +#define I915_TILING_YS 4 This is based on an old version of the Yf/Ys tiling patches which have not been merged, so nack. When you update the kernel headers in libdrm, _always_ use $ make headers_install from kernel sources and then copy over the headers unchanged to libdrm. Never handedit i915_drm.h. -Daniel > > #define I915_BIT_6_SWIZZLE_NONE 0 > #define I915_BIT_6_SWIZZLE_9 1 > -- > 2.3.4 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats
On Tue, Mar 31, 2015 at 6:17 AM, Daniel Vetter wrote: > On Mon, Mar 30, 2015 at 02:00:04PM -0700, Anuj Phogat wrote: >> Signed-off-by: Anuj Phogat >> --- >> include/drm/i915_drm.h | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h >> index ded43b1..a6c167c 100644 >> --- a/include/drm/i915_drm.h >> +++ b/include/drm/i915_drm.h >> @@ -842,6 +842,8 @@ struct drm_i915_gem_caching { >> #define I915_TILING_NONE 0 >> #define I915_TILING_X1 >> #define I915_TILING_Y2 >> +#define I915_TILING_YF 3 >> +#define I915_TILING_YS 4 > > This is based on an old version of the Yf/Ys tiling patches which have not > been merged, so nack. > Following your IRC chat with Kristian, and my offline discussion with him, I will move the tile size computation (using width, height, cpp) for Yf/Ys in to mesa. Then these definitions are not required in here. > When you update the kernel headers in libdrm, _always_ use > > $ make headers_install > > from kernel sources and then copy over the headers unchanged to libdrm. > Never handedit i915_drm.h. OK. Thanks for the information. > -Daniel > >> >> #define I915_BIT_6_SWIZZLE_NONE 0 >> #define I915_BIT_6_SWIZZLE_9 1 >> -- >> 2.3.4 >> >> ___ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx