Re: [Intel-gfx] [PATCH 10/10] drm/i915/display/tgl+: Use PPS index from vbt

2021-07-28 Thread Matt Atwood
On Wed, Jul 21, 2021 at 10:43:38PM -0700, José Roberto de Souza wrote:
> Tigerlake and newer has two instances of PPS, to support up to two
> eDP panels.
> 
> Cc: Ville Syrjälä 
> Cc: Jani Nikula 
> Signed-off-by: José Roberto de Souza 
Reveiwed-by: Matt Atwood 
> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index f4c15a1f31d15..ee92f416834e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -368,7 +368,8 @@ static void intel_pps_get_registers(struct intel_dp 
> *intel_dp,
>  
>   memset(regs, 0, sizeof(*regs));
>  
> - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> + if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ||
> + DISPLAY_VER(dev_priv) >= 12)
>   pps_idx = bxt_power_sequencer_idx(intel_dp);
>   else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>   pps_idx = vlv_power_sequencer_pipe(intel_dp);
> -- 
> 2.32.0
> 
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[Intel-gfx] [PATCH 10/10] drm/i915/display/tgl+: Use PPS index from vbt

2021-07-21 Thread José Roberto de Souza
Tigerlake and newer has two instances of PPS, to support up to two
eDP panels.

Cc: Ville Syrjälä 
Cc: Jani Nikula 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/i915/display/intel_pps.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
b/drivers/gpu/drm/i915/display/intel_pps.c
index f4c15a1f31d15..ee92f416834e5 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -368,7 +368,8 @@ static void intel_pps_get_registers(struct intel_dp 
*intel_dp,
 
memset(regs, 0, sizeof(*regs));
 
-   if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
+   if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+   DISPLAY_VER(dev_priv) >= 12)
pps_idx = bxt_power_sequencer_idx(intel_dp);
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
pps_idx = vlv_power_sequencer_pipe(intel_dp);
-- 
2.32.0

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