Re: [Intel-gfx] [PATCH 17/17] drm/i915: Add the missing adls vswing tables

[kernel test robot]

Hi Ville,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-20210421]
[cannot apply to drm-intel/for-linux-next v5.12-rc8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Ville-Syrjala/drm-i915-DDI-buf-trans-cleaup-and-fixes/20210422-005122
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a011-20210421 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 
d87b9b81ccb95217181ce75515c6c68bbb408ca4)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/1e2b73915eb7fa55d9b0f0836ecc25a01d904cd1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Ville-Syrjala/drm-i915-DDI-buf-trans-cleaup-and-fixes/20210422-005122
git checkout 1e2b73915eb7fa55d9b0f0836ecc25a01d904cd1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1016:41: error: unused 
>> variable 'adls_combo_phy_ddi_translations_dp_rbr_hbr' 
>> [-Werror,-Wunused-const-variable]
   static const struct intel_ddi_buf_trans 
adls_combo_phy_ddi_translations_dp_rbr_hbr = {
   ^
   1 error generated.


vim +/adls_combo_phy_ddi_translations_dp_rbr_hbr +1016 
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

  1015  
> 1016  static const struct intel_ddi_buf_trans 
> adls_combo_phy_ddi_translations_dp_rbr_hbr = {
  1017  .entries = _adls_combo_phy_ddi_translations_dp_rbr_hbr,
  1018  .num_entries = 
ARRAY_SIZE(_adls_combo_phy_ddi_translations_dp_rbr_hbr),
  1019  };
  1020  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip
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[Intel-gfx] [PATCH 17/17] drm/i915: Add the missing adls vswing tables

[Ville Syrjala]

From: Ville Syrjälä 

adls is supposed to use special buf trans tables. Add what's
missing.

Signed-off-by: Ville Syrjälä 
---
 .../drm/i915/display/intel_ddi_buf_trans.c| 122 +-
 1 file changed, 121 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c 
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index c5b7ce7464bc..7acb24a55738 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -999,6 +999,82 @@ static const struct intel_ddi_buf_trans 
rkl_combo_phy_ddi_translations_dp_hbr2_h
.num_entries = ARRAY_SIZE(_rkl_combo_phy_ddi_translations_dp_hbr2_hbr3),
 };
 
+static const union intel_ddi_buf_trans_entry 
_adls_combo_phy_ddi_translations_dp_rbr_hbr[] = {
+   /* NT mV Trans mV db
*/
+   { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350   350  0.0   
*/
+   { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350   500  3.1   
*/
+   { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350   700  6.0   
*/
+   { .cnl = { 0x6, 0x7D, 0x2B, 0x00, 0x14 } }, /* 350   900  8.2   
*/
+   { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500   500  0.0   
*/
+   { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500   700  2.9   
*/
+   { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500   900  5.1   
*/
+   { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650   700  0.6   
*/
+   { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600   900  3.5   
*/
+   { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900   900  0.0   
*/
+};
+
+static const struct intel_ddi_buf_trans 
adls_combo_phy_ddi_translations_dp_rbr_hbr = {
+   .entries = _adls_combo_phy_ddi_translations_dp_rbr_hbr,
+   .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_dp_rbr_hbr),
+};
+
+static const union intel_ddi_buf_trans_entry 
_adls_combo_phy_ddi_translations_dp_hbr2_hbr3[] = {
+   /* NT mV Trans mV db
*/
+   { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350   350  0.0   
*/
+   { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350   500  3.1   
*/
+   { .cnl = { 0xC, 0x63, 0x30, 0x00, 0x0F } }, /* 350   700  6.0   
*/
+   { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350   900  8.2   
*/
+   { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500   500  0.0   
*/
+   { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500   700  2.9   
*/
+   { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 500   900  5.1   
*/
+   { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650   700  0.6   
*/
+   { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600   900  3.5   
*/
+   { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900   900  0.0   
*/
+};
+
+static const struct intel_ddi_buf_trans 
adls_combo_phy_ddi_translations_dp_hbr2_hbr3 = {
+   .entries = _adls_combo_phy_ddi_translations_dp_hbr2_hbr3,
+   .num_entries = 
ARRAY_SIZE(_adls_combo_phy_ddi_translations_dp_hbr2_hbr3),
+};
+
+static const union intel_ddi_buf_trans_entry 
_adls_combo_phy_ddi_translations_edp_hbr2[] = {
+   /* NT mV Trans mV db
*/
+   { .cnl = { 0x9, 0x70, 0x3C, 0x00, 0x03 } }, /* 200   200  0.0   
*/
+   { .cnl = { 0x9, 0x6D, 0x3A, 0x00, 0x05 } }, /* 200   250  1.9   
*/
+   { .cnl = { 0x9, 0x7F, 0x36, 0x00, 0x09 } }, /* 200   300  3.5   
*/
+   { .cnl = { 0x4, 0x59, 0x32, 0x00, 0x0D } }, /* 200   350  4.9   
*/
+   { .cnl = { 0x2, 0x77, 0x3A, 0x00, 0x05 } }, /* 250   250  0.0   
*/
+   { .cnl = { 0x2, 0x7F, 0x38, 0x00, 0x07 } }, /* 250   300  1.6   
*/
+   { .cnl = { 0x4, 0x5A, 0x36, 0x00, 0x09 } }, /* 250   350  2.9   
*/
+   { .cnl = { 0x4, 0x5E, 0x3D, 0x00, 0x04 } }, /* 300   300  0.0   
*/
+   { .cnl = { 0x4, 0x65, 0x38, 0x00, 0x07 } }, /* 300   350  1.3   
*/
+   { .cnl = { 0x4, 0x6F, 0x3A, 0x00, 0x05 } }, /* 350   350  0.0   
*/
+};
+
+static const struct intel_ddi_buf_trans 
adls_combo_phy_ddi_translations_edp_hbr2 = {
+   .entries = _adls_combo_phy_ddi_translations_edp_hbr2,
+   .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr2),
+};
+
+static const union intel_ddi_buf_trans_entry 
_adls_combo_phy_ddi_translations_edp_hbr3[] = {
+   /* NT mV Trans mV db
*/
+   { .cnl = { 0xA, 0x5E, 0x34, 0x00, 0x0B } }, /* 350   350  0.0   
*/
+   { .cnl = { 0xA, 0x69, 0x32, 0x00, 0x0D } }, /* 350   500  3.1   
*/
+   { .cnl = { 0xC, 0x74, 0x31, 0x00, 0x0E } }, /* 350   700  6.0   
*/
+   { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } }, /