Re: [Intel-gfx] [PATCH 2/2] drm/i915: s/LFP/LPF in DPIO PLL register names
On Fri, 14 Jun 2013 14:02:53 +0300 ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com LPF is short for low pass filter. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 8 drivers/gpu/drm/i915/i915_reg.h | 6 +++--- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d4e78b6..cc20637 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data) seq_printf(m, DPIO_CORE_CLK_B: 0x%08x\n, vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); - seq_printf(m, DPIO_LFP_COEFF_A: 0x%08x\n, -vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); - seq_printf(m, DPIO_LFP_COEFF_B: 0x%08x\n, -vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); + seq_printf(m, DPIO_LPF_COEFF_A: 0x%08x\n, +vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A)); + seq_printf(m, DPIO_LPF_COEFF_B: 0x%08x\n, +vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B)); seq_printf(m, DPIO_FASTCLK_DISABLE: 0x%08x\n, vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9cb6236..828a6ed 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -448,9 +448,9 @@ #define _DPIO_PLL_CML_B 0x806c #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B) -#define _DPIO_LFP_COEFF_A0x8048 -#define _DPIO_LFP_COEFF_B0x8068 -#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B) +#define _DPIO_LPF_COEFF_A0x8048 +#define _DPIO_LPF_COEFF_B0x8068 +#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B) #define DPIO_CALIBRATION 0x80ac diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 465d6bc..f6eaba2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4407,10 +4407,10 @@ static void vlv_update_pll(struct intel_crtc *crtc) if (crtc-config.port_clock == 162000 || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_ANALOG) || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_HDMI)) - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x005f0021); else - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x00df); if (intel_pipe_has_type(crtc-base, INTEL_OUTPUT_EDP) || Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: s/LFP/LPF in DPIO PLL register names
On Wed, Jun 26, 2013 at 07:55:26AM -0700, Jesse Barnes wrote: On Fri, 14 Jun 2013 14:02:53 +0300 ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com LPF is short for low pass filter. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 8 drivers/gpu/drm/i915/i915_reg.h | 6 +++--- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d4e78b6..cc20637 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data) seq_printf(m, DPIO_CORE_CLK_B: 0x%08x\n, vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); - seq_printf(m, DPIO_LFP_COEFF_A: 0x%08x\n, - vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); - seq_printf(m, DPIO_LFP_COEFF_B: 0x%08x\n, - vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); + seq_printf(m, DPIO_LPF_COEFF_A: 0x%08x\n, + vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A)); + seq_printf(m, DPIO_LPF_COEFF_B: 0x%08x\n, + vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B)); seq_printf(m, DPIO_FASTCLK_DISABLE: 0x%08x\n, vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9cb6236..828a6ed 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -448,9 +448,9 @@ #define _DPIO_PLL_CML_B0x806c #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B) -#define _DPIO_LFP_COEFF_A 0x8048 -#define _DPIO_LFP_COEFF_B 0x8068 -#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B) +#define _DPIO_LPF_COEFF_A 0x8048 +#define _DPIO_LPF_COEFF_B 0x8068 +#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B) #define DPIO_CALIBRATION 0x80ac diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 465d6bc..f6eaba2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4407,10 +4407,10 @@ static void vlv_update_pll(struct intel_crtc *crtc) if (crtc-config.port_clock == 162000 || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_ANALOG) || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_HDMI)) - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x005f0021); else - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x00df); if (intel_pipe_has_type(crtc-base, INTEL_OUTPUT_EDP) || Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org Both patches merged to dinq, thanks. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: s/LFP/LPF in DPIO PLL register names
From: Ville Syrjälä ville.syrj...@linux.intel.com LPF is short for low pass filter. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 8 drivers/gpu/drm/i915/i915_reg.h | 6 +++--- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d4e78b6..cc20637 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data) seq_printf(m, DPIO_CORE_CLK_B: 0x%08x\n, vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); - seq_printf(m, DPIO_LFP_COEFF_A: 0x%08x\n, - vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); - seq_printf(m, DPIO_LFP_COEFF_B: 0x%08x\n, - vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); + seq_printf(m, DPIO_LPF_COEFF_A: 0x%08x\n, + vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A)); + seq_printf(m, DPIO_LPF_COEFF_B: 0x%08x\n, + vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B)); seq_printf(m, DPIO_FASTCLK_DISABLE: 0x%08x\n, vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9cb6236..828a6ed 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -448,9 +448,9 @@ #define _DPIO_PLL_CML_B0x806c #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B) -#define _DPIO_LFP_COEFF_A 0x8048 -#define _DPIO_LFP_COEFF_B 0x8068 -#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B) +#define _DPIO_LPF_COEFF_A 0x8048 +#define _DPIO_LPF_COEFF_B 0x8068 +#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B) #define DPIO_CALIBRATION 0x80ac diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 465d6bc..f6eaba2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4407,10 +4407,10 @@ static void vlv_update_pll(struct intel_crtc *crtc) if (crtc-config.port_clock == 162000 || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_ANALOG) || intel_pipe_has_type(crtc-base, INTEL_OUTPUT_HDMI)) - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x005f0021); else - vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), + vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), 0x00df); if (intel_pipe_has_type(crtc-base, INTEL_OUTPUT_EDP) || -- 1.8.1.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
