Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-13 Thread Ville Syrjälä 
On Tue, Oct 13, 2015 at 04:16:47PM +0300, Jani Nikula wrote:
> On Wed, 07 Oct 2015, Jani Nikula  wrote:
> > On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
> >> On Tue, Oct 06, 2015 at 04:43:11PM +0300, Jani Nikula wrote:
> >>> On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
> >>> > On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
> >>> >> Prefer inclusive ranges for revision checks rather than "below B0". Per
> >>> >> specs A2 is not used, so revid <= A1 matches revid < B0.
> >>> >
> >>> > The w/a db would say UNTIL_B0 etc., so might be easier to check against
> >>> > it if we keep to the same convention.
> >>> 
> >>> So I wanted to double check what the convention is. I picked
> >>> WaRsDisableCoarsePowerGating.
> >>> 
> >>> KBL - SIWA_FOREVER
> >>> BXT - SI_WA_BEFORE(BXT_REV_ID_B0)
> >>> SKL - SIWA_UNTIL_SKL_E0
> >>> 
> >>> Description "Disable coarse power gating for GT4 until GT F0 stepping."
> >>> 
> >>> *rolls eyes*
> >>> 
> >>> So is that "until" there inclusive or non-inclusive? The db is
> >>> contradicting itself...
> >>
> >> Hmm. My recollection was that it's exclusive, but now that I look at
> >> your findings and some other workarounds, it does look a bit more like
> >> inclusive.
> >>
> >> I would think the exclusive thing would be easier to maintain since
> >> the hsd specifies the stepping in which stuff got fixed, and the
> >> exclusive convention would then have the same stepping listed. Eg. if
> >> the hsd says fixed in E0, but the w/a db says UNTIL_D0, then one is
> >> left wondering about D1+ But perhaps such steppings didn't even exist.
> >>
> >> Well, in reality it's all over the place. Eg. looking at the BDW UNTIL_D0
> >> stuff, some are fixed in E0, some are fixed in D0, and at least one was
> >> fixed in B0 according to hsd. So I'm starting to think that the meaning
> >> of the tag depends entirely on the person who pushed the change.
> >
> > With that, I stand by the patches I submitted as they are.
> 
> Ville, opinions, r-b, nak, ack, crap, what? ;)

Yeah, I guess it's all good.

Acked-by: Ville Syrjälä 

-- 
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Intel OTC
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Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-13 Thread Jani Nikula 
On Wed, 07 Oct 2015, Jani Nikula  wrote:
> On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
>> On Tue, Oct 06, 2015 at 04:43:11PM +0300, Jani Nikula wrote:
>>> On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
>>> > On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
>>> >> Prefer inclusive ranges for revision checks rather than "below B0". Per
>>> >> specs A2 is not used, so revid <= A1 matches revid < B0.
>>> >
>>> > The w/a db would say UNTIL_B0 etc., so might be easier to check against
>>> > it if we keep to the same convention.
>>> 
>>> So I wanted to double check what the convention is. I picked
>>> WaRsDisableCoarsePowerGating.
>>> 
>>> KBL - SIWA_FOREVER
>>> BXT - SI_WA_BEFORE(BXT_REV_ID_B0)
>>> SKL - SIWA_UNTIL_SKL_E0
>>> 
>>> Description "Disable coarse power gating for GT4 until GT F0 stepping."
>>> 
>>> *rolls eyes*
>>> 
>>> So is that "until" there inclusive or non-inclusive? The db is
>>> contradicting itself...
>>
>> Hmm. My recollection was that it's exclusive, but now that I look at
>> your findings and some other workarounds, it does look a bit more like
>> inclusive.
>>
>> I would think the exclusive thing would be easier to maintain since
>> the hsd specifies the stepping in which stuff got fixed, and the
>> exclusive convention would then have the same stepping listed. Eg. if
>> the hsd says fixed in E0, but the w/a db says UNTIL_D0, then one is
>> left wondering about D1+ But perhaps such steppings didn't even exist.
>>
>> Well, in reality it's all over the place. Eg. looking at the BDW UNTIL_D0
>> stuff, some are fixed in E0, some are fixed in D0, and at least one was
>> fixed in B0 according to hsd. So I'm starting to think that the meaning
>> of the tag depends entirely on the person who pushed the change.
>
> With that, I stand by the patches I submitted as they are.

Ville, opinions, r-b, nak, ack, crap, what? ;)

BR,
Jani.


-- 
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Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-06 Thread Ville Syrjälä 
On Tue, Oct 06, 2015 at 04:43:11PM +0300, Jani Nikula wrote:
> On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
> > On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
> >> Prefer inclusive ranges for revision checks rather than "below B0". Per
> >> specs A2 is not used, so revid <= A1 matches revid < B0.
> >
> > The w/a db would say UNTIL_B0 etc., so might be easier to check against
> > it if we keep to the same convention.
> 
> So I wanted to double check what the convention is. I picked
> WaRsDisableCoarsePowerGating.
> 
> KBL - SIWA_FOREVER
> BXT - SI_WA_BEFORE(BXT_REV_ID_B0)
> SKL - SIWA_UNTIL_SKL_E0
> 
> Description "Disable coarse power gating for GT4 until GT F0 stepping."
> 
> *rolls eyes*
> 
> So is that "until" there inclusive or non-inclusive? The db is
> contradicting itself...

Hmm. My recollection was that it's exclusive, but now that I look at
your findings and some other workarounds, it does look a bit more like
inclusive.

I would think the exclusive thing would be easier to maintain since
the hsd specifies the stepping in which stuff got fixed, and the
exclusive convention would then have the same stepping listed. Eg. if
the hsd says fixed in E0, but the w/a db says UNTIL_D0, then one is
left wondering about D1+ But perhaps such steppings didn't even exist.

Well, in reality it's all over the place. Eg. looking at the BDW UNTIL_D0
stuff, some are fixed in E0, some are fixed in D0, and at least one was
fixed in B0 according to hsd. So I'm starting to think that the meaning
of the tag depends entirely on the person who pushed the change.

> Cc: Sarah who has also looked at workarounds
> recently.
> 
> Rodrigo, for one thing, I'll want workarounds for SKL and KBL in
> different conditions instead of conflated into SKL!
> 
> But what about this non-inclusive end of range? It'll matter in patch
> 3/3. It's not so much a problem for ranges, but rather for specific
> revisions, where you'd have to include a revision not mentioned in the
> spec at all, e.g. for B0 only:
> 
>   IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_C0)
> 
> instead of the current proposal:
> 
>   IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_B0)
> 
> I'm not really fond of adding separate macros for checking specific
> vs. ranges.
> 
> Thoughts?
> 
> BR,
> Jani.
> 
> 
> 
> 
> 
> >
> >> 
> >> Signed-off-by: Jani Nikula 
> >> ---
> >>  drivers/gpu/drm/i915/i915_drv.h| 1 +
> >>  drivers/gpu/drm/i915/i915_gem.c| 2 +-
> >>  drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
> >>  drivers/gpu/drm/i915/intel_ddi.c   | 2 +-
> >>  drivers/gpu/drm/i915/intel_dp.c| 2 +-
> >>  drivers/gpu/drm/i915/intel_hdmi.c  | 2 +-
> >>  drivers/gpu/drm/i915/intel_lrc.c   | 8 
> >>  drivers/gpu/drm/i915/intel_pm.c| 6 +++---
> >>  drivers/gpu/drm/i915/intel_ringbuffer.c| 6 +++---
> >>  9 files changed, 16 insertions(+), 15 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> >> b/drivers/gpu/drm/i915/i915_drv.h
> >> index a3b137715604..9833a2055930 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.h
> >> +++ b/drivers/gpu/drm/i915/i915_drv.h
> >> @@ -2509,6 +2509,7 @@ struct drm_i915_cmd_table {
> >>  #define SKL_REVID_F0  0x5
> >>  
> >>  #define BXT_REVID_A0  0x0
> >> +#define BXT_REVID_A1  0x1
> >>  #define BXT_REVID_B0  0x3
> >>  #define BXT_REVID_C0  0x9
> >>  
> >> diff --git a/drivers/gpu/drm/i915/i915_gem.c 
> >> b/drivers/gpu/drm/i915/i915_gem.c
> >> index f0cfbb9ee12c..fd2d880656b2 100644
> >> --- a/drivers/gpu/drm/i915/i915_gem.c
> >> +++ b/drivers/gpu/drm/i915/i915_gem.c
> >> @@ -3757,7 +3757,7 @@ int i915_gem_set_caching_ioctl(struct drm_device 
> >> *dev, void *data,
> >> * cacheline, whereas normally such cachelines would get
> >> * invalidated.
> >> */
> >> -  if (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0)
> >> +  if (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_A1)
> >>return -ENODEV;
> >>  
> >>level = I915_CACHE_LLC;
> >> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
> >> b/drivers/gpu/drm/i915/i915_guc_submission.c
> >> index 036b42bae827..863aa5c82466 100644
> >> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> >> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> >> @@ -161,7 +161,7 @@ static int host2guc_sample_forcewake(struct intel_guc 
> >> *guc,
> >>data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
> >>/* WaRsDisableCoarsePowerGating:skl,bxt */
> >>if (!intel_enable_rc6(dev_priv->dev) ||
> >> -  (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) ||
> >> +  (IS_BROXTON(dev) && (INTEL_REVID(dev) <= BXT_REVID_A1)) ||
> >>(IS_SKL_GT3(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)) ||
> >>(IS_SKL_GT4(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)))
> >>data[1] = 0;
>

Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-06 Thread Vivi, Rodrigo 
On Tue, 2015-10-06 at 16:43 +0300, Jani Nikula wrote:
> On Tue, 06 Oct 2015, Ville Syrjälä  
> wrote:
> > On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
> > > Prefer inclusive ranges for revision checks rather than "below 
> > > B0". Per
> > > specs A2 is not used, so revid <= A1 matches revid < B0.
> > 
> > The w/a db would say UNTIL_B0 etc., so might be easier to check 
> > against
> > it if we keep to the same convention.
> 
> So I wanted to double check what the convention is. I picked
> WaRsDisableCoarsePowerGating.
> 
> KBL - SIWA_FOREVER
> BXT - SI_WA_BEFORE(BXT_REV_ID_B0)
> SKL - SIWA_UNTIL_SKL_E0
> 
> Description "Disable coarse power gating for GT4 until GT F0 
> stepping."
> 
> *rolls eyes*
> 
> So is that "until" there inclusive or non-inclusive? The db is
> contradicting itself... Cc: Sarah who has also looked at workarounds
> recently.
> 
> Rodrigo, for one thing, I'll want workarounds for SKL and KBL in
> different conditions instead of conflated into SKL!

I agree with Ville that <= REVID matches the spec in sense of "until"
certain stepping and I like this.

Also KBL W/A doesn't conflict with SKL W/as in they way they were
derivated...

> 
> But what about this non-inclusive end of range? It'll matter in patch
> 3/3. It's not so much a problem for ranges, but rather for specific
> revisions, where you'd have to include a revision not mentioned in 
> the
> spec at all, e.g. for B0 only:
> 
>   IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_C0)
> 
> instead of the current proposal:
> 
>   IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_B0)
> 
> I'm not really fond of adding separate macros for checking specific
> vs. ranges.
> 
> Thoughts?
> 
> BR,
> Jani.
> 
> 
> 
> 
> 
> > 
> > > 
> > > Signed-off-by: Jani Nikula 
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.h| 1 +
> > >  drivers/gpu/drm/i915/i915_gem.c| 2 +-
> > >  drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
> > >  drivers/gpu/drm/i915/intel_ddi.c   | 2 +-
> > >  drivers/gpu/drm/i915/intel_dp.c| 2 +-
> > >  drivers/gpu/drm/i915/intel_hdmi.c  | 2 +-
> > >  drivers/gpu/drm/i915/intel_lrc.c   | 8 
> > >  drivers/gpu/drm/i915/intel_pm.c| 6 +++---
> > >  drivers/gpu/drm/i915/intel_ringbuffer.c| 6 +++---
> > >  9 files changed, 16 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index a3b137715604..9833a2055930 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2509,6 +2509,7 @@ struct drm_i915_cmd_table {
> > >  #define SKL_REVID_F0 0x5
> > >  
> > >  #define BXT_REVID_A0 0x0
> > > +#define BXT_REVID_A1 0x1
> > >  #define BXT_REVID_B0 0x3
> > >  #define BXT_REVID_C0 0x9
> > >  
> > > diff --git a/drivers/gpu/drm/i915/i915_gem.c 
> > > b/drivers/gpu/drm/i915/i915_gem.c
> > > index f0cfbb9ee12c..fd2d880656b2 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > > @@ -3757,7 +3757,7 @@ int i915_gem_set_caching_ioctl(struct 
> > > drm_device *dev, void *data,
> > >* cacheline, whereas normally such cachelines 
> > > would get
> > >* invalidated.
> > >*/
> > > - if (IS_BROXTON(dev) && INTEL_REVID(dev) < 
> > > BXT_REVID_B0)
> > > + if (IS_BROXTON(dev) && INTEL_REVID(dev) <= 
> > > BXT_REVID_A1)
> > >   return -ENODEV;
> > >  
> > >   level = I915_CACHE_LLC;
> > > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
> > > b/drivers/gpu/drm/i915/i915_guc_submission.c
> > > index 036b42bae827..863aa5c82466 100644
> > > --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> > > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> > > @@ -161,7 +161,7 @@ static int host2guc_sample_forcewake(struct 
> > > intel_guc *guc,
> > >   data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
> > >   /* WaRsDisableCoarsePowerGating:skl,bxt */
> > >   if (!intel_enable_rc6(dev_priv->dev) ||
> > > - (IS_BROXTON(dev) && (INTEL_REVID(dev) < 
> > > BXT_REVID_B0)) ||
> > > + (IS_BROXTON(dev) && (INTEL_REVID(dev) <= 
> > > BXT_REVID_A1)) ||
> > >   (IS_SKL_GT3(dev) && (INTEL_REVID(dev) <= 
> > > SKL_REVID_E0)) ||
> > >   (IS_SKL_GT4(dev) && (INTEL_REVID(dev) <= 
> > > SKL_REVID_E0)))
> > >   data[1] = 0;
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index b25e99a432fb..b80e0f5ec5dc 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -3247,7 +3247,7 @@ void intel_ddi_init(struct drm_device *dev, 
> > > enum port port)
> > >* On BXT A0/A1, sw needs to activate DDIA HPD 
> > > logic and
> > >* interrupts to check the external panel 
> > > connection.
> > >

Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-06 Thread Ville Syrjälä 
On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
> Prefer inclusive ranges for revision checks rather than "below B0". Per
> specs A2 is not used, so revid <= A1 matches revid < B0.

The w/a db would say UNTIL_B0 etc., so might be easier to check against
it if we keep to the same convention.

> 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/i915_drv.h| 1 +
>  drivers/gpu/drm/i915/i915_gem.c| 2 +-
>  drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
>  drivers/gpu/drm/i915/intel_ddi.c   | 2 +-
>  drivers/gpu/drm/i915/intel_dp.c| 2 +-
>  drivers/gpu/drm/i915/intel_hdmi.c  | 2 +-
>  drivers/gpu/drm/i915/intel_lrc.c   | 8 
>  drivers/gpu/drm/i915/intel_pm.c| 6 +++---
>  drivers/gpu/drm/i915/intel_ringbuffer.c| 6 +++---
>  9 files changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a3b137715604..9833a2055930 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2509,6 +2509,7 @@ struct drm_i915_cmd_table {
>  #define SKL_REVID_F0 0x5
>  
>  #define BXT_REVID_A0 0x0
> +#define BXT_REVID_A1 0x1
>  #define BXT_REVID_B0 0x3
>  #define BXT_REVID_C0 0x9
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f0cfbb9ee12c..fd2d880656b2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3757,7 +3757,7 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, 
> void *data,
>* cacheline, whereas normally such cachelines would get
>* invalidated.
>*/
> - if (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0)
> + if (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_A1)
>   return -ENODEV;
>  
>   level = I915_CACHE_LLC;
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 036b42bae827..863aa5c82466 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -161,7 +161,7 @@ static int host2guc_sample_forcewake(struct intel_guc 
> *guc,
>   data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
>   /* WaRsDisableCoarsePowerGating:skl,bxt */
>   if (!intel_enable_rc6(dev_priv->dev) ||
> - (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) ||
> + (IS_BROXTON(dev) && (INTEL_REVID(dev) <= BXT_REVID_A1)) ||
>   (IS_SKL_GT3(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)) ||
>   (IS_SKL_GT4(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)))
>   data[1] = 0;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> b/drivers/gpu/drm/i915/intel_ddi.c
> index b25e99a432fb..b80e0f5ec5dc 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3247,7 +3247,7 @@ void intel_ddi_init(struct drm_device *dev, enum port 
> port)
>* On BXT A0/A1, sw needs to activate DDIA HPD logic and
>* interrupts to check the external panel connection.
>*/
> - if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0)
> + if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1)
>&& port == PORT_B)
>   dev_priv->hotplug.irq_port[PORT_A] = intel_dig_port;
>   else
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 8d34ca7b287a..8baf6fe06313 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -6087,7 +6087,7 @@ intel_dp_init_connector(struct intel_digital_port 
> *intel_dig_port,
>   break;
>   case PORT_B:
>   intel_encoder->hpd_pin = HPD_PORT_B;
> - if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0))
> + if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1))
>   intel_encoder->hpd_pin = HPD_PORT_A;
>   break;
>   case PORT_C:
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 03d85909c6ab..32e9117ee8e3 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -2068,7 +2068,7 @@ void intel_hdmi_init_connector(struct 
> intel_digital_port *intel_dig_port,
>* On BXT A0/A1, sw needs to activate DDIA HPD logic and
>* interrupts to check the external panel connection.
>*/
> - if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0))
> + if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1))
>   intel_encoder->hpd_pin = HPD_PORT_A;
>   else
>

[Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-06 Thread Jani Nikula 
Prefer inclusive ranges for revision checks rather than "below B0". Per
specs A2 is not used, so revid <= A1 matches revid < B0.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h| 1 +
 drivers/gpu/drm/i915/i915_gem.c| 2 +-
 drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
 drivers/gpu/drm/i915/intel_ddi.c   | 2 +-
 drivers/gpu/drm/i915/intel_dp.c| 2 +-
 drivers/gpu/drm/i915/intel_hdmi.c  | 2 +-
 drivers/gpu/drm/i915/intel_lrc.c   | 8 
 drivers/gpu/drm/i915/intel_pm.c| 6 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.c| 6 +++---
 9 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a3b137715604..9833a2055930 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2509,6 +2509,7 @@ struct drm_i915_cmd_table {
 #define SKL_REVID_F0   0x5
 
 #define BXT_REVID_A0   0x0
+#define BXT_REVID_A1   0x1
 #define BXT_REVID_B0   0x3
 #define BXT_REVID_C0   0x9
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f0cfbb9ee12c..fd2d880656b2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3757,7 +3757,7 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, 
void *data,
 * cacheline, whereas normally such cachelines would get
 * invalidated.
 */
-   if (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0)
+   if (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_A1)
return -ENODEV;
 
level = I915_CACHE_LLC;
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 036b42bae827..863aa5c82466 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -161,7 +161,7 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
/* WaRsDisableCoarsePowerGating:skl,bxt */
if (!intel_enable_rc6(dev_priv->dev) ||
-   (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) ||
+   (IS_BROXTON(dev) && (INTEL_REVID(dev) <= BXT_REVID_A1)) ||
(IS_SKL_GT3(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)) ||
(IS_SKL_GT4(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)))
data[1] = 0;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b25e99a432fb..b80e0f5ec5dc 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3247,7 +3247,7 @@ void intel_ddi_init(struct drm_device *dev, enum port 
port)
 * On BXT A0/A1, sw needs to activate DDIA HPD logic and
 * interrupts to check the external panel connection.
 */
-   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0)
+   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1)
 && port == PORT_B)
dev_priv->hotplug.irq_port[PORT_A] = intel_dig_port;
else
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8d34ca7b287a..8baf6fe06313 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6087,7 +6087,7 @@ intel_dp_init_connector(struct intel_digital_port 
*intel_dig_port,
break;
case PORT_B:
intel_encoder->hpd_pin = HPD_PORT_B;
-   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0))
+   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1))
intel_encoder->hpd_pin = HPD_PORT_A;
break;
case PORT_C:
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index 03d85909c6ab..32e9117ee8e3 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2068,7 +2068,7 @@ void intel_hdmi_init_connector(struct intel_digital_port 
*intel_dig_port,
 * On BXT A0/A1, sw needs to activate DDIA HPD logic and
 * interrupts to check the external panel connection.
 */
-   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0))
+   if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1))
intel_encoder->hpd_pin = HPD_PORT_A;
else
intel_encoder->hpd_pin = HPD_PORT_B;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 825fa7a8df86..acd4fa332a80 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1986,7 +1986,7 @@ static int logical_render_ring_init(struct

Re: [Intel-gfx] [PATCH 2/3] drm/i915/bxt: add revision id for A1 stepping and use it

2015-10-06 Thread Jani Nikula 
On Tue, 06 Oct 2015, Ville Syrjälä  wrote:
> On Tue, Oct 06, 2015 at 02:41:15PM +0300, Jani Nikula wrote:
>> Prefer inclusive ranges for revision checks rather than "below B0". Per
>> specs A2 is not used, so revid <= A1 matches revid < B0.
>
> The w/a db would say UNTIL_B0 etc., so might be easier to check against
> it if we keep to the same convention.

So I wanted to double check what the convention is. I picked
WaRsDisableCoarsePowerGating.

KBL - SIWA_FOREVER
BXT - SI_WA_BEFORE(BXT_REV_ID_B0)
SKL - SIWA_UNTIL_SKL_E0

Description "Disable coarse power gating for GT4 until GT F0 stepping."

*rolls eyes*

So is that "until" there inclusive or non-inclusive? The db is
contradicting itself... Cc: Sarah who has also looked at workarounds
recently.

Rodrigo, for one thing, I'll want workarounds for SKL and KBL in
different conditions instead of conflated into SKL!

But what about this non-inclusive end of range? It'll matter in patch
3/3. It's not so much a problem for ranges, but rather for specific
revisions, where you'd have to include a revision not mentioned in the
spec at all, e.g. for B0 only:

IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_C0)

instead of the current proposal:

IS_SKL_REVID(dev, SKL_REVID_B0, SKL_REVID_B0)

I'm not really fond of adding separate macros for checking specific
vs. ranges.

Thoughts?

BR,
Jani.





>
>> 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h| 1 +
>>  drivers/gpu/drm/i915/i915_gem.c| 2 +-
>>  drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
>>  drivers/gpu/drm/i915/intel_ddi.c   | 2 +-
>>  drivers/gpu/drm/i915/intel_dp.c| 2 +-
>>  drivers/gpu/drm/i915/intel_hdmi.c  | 2 +-
>>  drivers/gpu/drm/i915/intel_lrc.c   | 8 
>>  drivers/gpu/drm/i915/intel_pm.c| 6 +++---
>>  drivers/gpu/drm/i915/intel_ringbuffer.c| 6 +++---
>>  9 files changed, 16 insertions(+), 15 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index a3b137715604..9833a2055930 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2509,6 +2509,7 @@ struct drm_i915_cmd_table {
>>  #define SKL_REVID_F00x5
>>  
>>  #define BXT_REVID_A00x0
>> +#define BXT_REVID_A10x1
>>  #define BXT_REVID_B00x3
>>  #define BXT_REVID_C00x9
>>  
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c 
>> b/drivers/gpu/drm/i915/i915_gem.c
>> index f0cfbb9ee12c..fd2d880656b2 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -3757,7 +3757,7 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, 
>> void *data,
>>   * cacheline, whereas normally such cachelines would get
>>   * invalidated.
>>   */
>> -if (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0)
>> +if (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_A1)
>>  return -ENODEV;
>>  
>>  level = I915_CACHE_LLC;
>> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
>> b/drivers/gpu/drm/i915/i915_guc_submission.c
>> index 036b42bae827..863aa5c82466 100644
>> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
>> @@ -161,7 +161,7 @@ static int host2guc_sample_forcewake(struct intel_guc 
>> *guc,
>>  data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
>>  /* WaRsDisableCoarsePowerGating:skl,bxt */
>>  if (!intel_enable_rc6(dev_priv->dev) ||
>> -(IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) ||
>> +(IS_BROXTON(dev) && (INTEL_REVID(dev) <= BXT_REVID_A1)) ||
>>  (IS_SKL_GT3(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)) ||
>>  (IS_SKL_GT4(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)))
>>  data[1] = 0;
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index b25e99a432fb..b80e0f5ec5dc 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -3247,7 +3247,7 @@ void intel_ddi_init(struct drm_device *dev, enum port 
>> port)
>>   * On BXT A0/A1, sw needs to activate DDIA HPD logic and
>>   * interrupts to check the external panel connection.
>>   */
>> -if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0)
>> +if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) <= BXT_REVID_A1)
>>   && port == PORT_B)
>>  dev_priv->hotplug.irq_port[PORT_A] = intel_dig_port;
>>  else
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c 
>> b/drivers/gpu/drm/i915/intel_dp.c
>> index 8d34ca7b287a..8baf6fe06313 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -6087,7 +6087,7