Re: [Intel-gfx] [PATCH 2/3] drm/i915/i915_reg.h: fix the checkpatch SPACE_BEFORE_TAB issues

2018-06-14 Thread Rodrigo Vivi
On Tue, Jun 12, 2018 at 04:56:53PM -0700, Paulo Zanoni wrote:
> Since I'm touching the file I might as well fix this class of errors
> since they are just a few. Also drive-by fix the styling of the
> VLV_TURBO_SOC_OVERRIDE definitions instead of just the spaces before
> the tabs.
> 
> Signed-off-by: Paulo Zanoni 

Reviewed-by: Rodrigo Vivi 

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 5e1d391b74db..f9a7cc5da5d8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1141,11 +1141,11 @@ enum i915_power_well_id {
>  #define   FB_FMAX_VMIN_FREQ_LO_SHIFT 27
>  #define   FB_FMAX_VMIN_FREQ_LO_MASK  0xf800
>  
> -#define VLV_TURBO_SOC_OVERRIDE   0x04
> -#define  VLV_OVERRIDE_EN 1
> -#define  VLV_SOC_TDP_EN  (1 << 1)
> -#define  VLV_BIAS_CPU_125_SOC_875 (6 << 2)
> -#define  CHV_BIAS_CPU_50_SOC_50 (3 << 2)
> +#define VLV_TURBO_SOC_OVERRIDE   0x04
> +#define   VLV_OVERRIDE_EN1
> +#define   VLV_SOC_TDP_EN (1 << 1)
> +#define   VLV_BIAS_CPU_125_SOC_875   (6 << 2)
> +#define   CHV_BIAS_CPU_50_SOC_50 (3 << 2)
>  
>  /* vlv2 north clock has */
>  #define CCK_FUSE_REG 0x8
> @@ -2412,7 +2412,7 @@ enum i915_power_well_id {
>  #define   DERRMR_PIPEA_SPR_FLIP_DONE (1 << 2)
>  #define   DERRMR_PIPEA_VBLANK(1 << 3)
>  #define   DERRMR_PIPEA_HBLANK(1 << 5)
> -#define   DERRMR_PIPEB_SCANLINE  (1 << 8)
> +#define   DERRMR_PIPEB_SCANLINE  (1 << 8)
>  #define   DERRMR_PIPEB_PRI_FLIP_DONE (1 << 9)
>  #define   DERRMR_PIPEB_SPR_FLIP_DONE (1 << 10)
>  #define   DERRMR_PIPEB_VBLANK(1 << 11)
> @@ -7567,7 +7567,7 @@ enum {
>  #define  TRANS_VBLANK_END_SHIFT  16
>  #define  TRANS_VBLANK_START_SHIFT0
>  #define _PCH_TRANS_VSYNC_A   0xe0014
> -#define  TRANS_VSYNC_END_SHIFT   16
> +#define  TRANS_VSYNC_END_SHIFT   16
>  #define  TRANS_VSYNC_START_SHIFT 0
>  #define _PCH_TRANS_VSYNCSHIFT_A  0xe0028
>  
> -- 
> 2.14.4
> 
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[Intel-gfx] [PATCH 2/3] drm/i915/i915_reg.h: fix the checkpatch SPACE_BEFORE_TAB issues

2018-06-12 Thread Paulo Zanoni
Since I'm touching the file I might as well fix this class of errors
since they are just a few. Also drive-by fix the styling of the
VLV_TURBO_SOC_OVERRIDE definitions instead of just the spaces before
the tabs.

Signed-off-by: Paulo Zanoni 
---
 drivers/gpu/drm/i915/i915_reg.h | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5e1d391b74db..f9a7cc5da5d8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1141,11 +1141,11 @@ enum i915_power_well_id {
 #define   FB_FMAX_VMIN_FREQ_LO_SHIFT   27
 #define   FB_FMAX_VMIN_FREQ_LO_MASK0xf800
 
-#define VLV_TURBO_SOC_OVERRIDE 0x04
-#defineVLV_OVERRIDE_EN 1
-#defineVLV_SOC_TDP_EN  (1 << 1)
-#defineVLV_BIAS_CPU_125_SOC_875 (6 << 2)
-#defineCHV_BIAS_CPU_50_SOC_50 (3 << 2)
+#define VLV_TURBO_SOC_OVERRIDE 0x04
+#define   VLV_OVERRIDE_EN  1
+#define   VLV_SOC_TDP_EN   (1 << 1)
+#define   VLV_BIAS_CPU_125_SOC_875 (6 << 2)
+#define   CHV_BIAS_CPU_50_SOC_50   (3 << 2)
 
 /* vlv2 north clock has */
 #define CCK_FUSE_REG   0x8
@@ -2412,7 +2412,7 @@ enum i915_power_well_id {
 #define   DERRMR_PIPEA_SPR_FLIP_DONE   (1 << 2)
 #define   DERRMR_PIPEA_VBLANK  (1 << 3)
 #define   DERRMR_PIPEA_HBLANK  (1 << 5)
-#define   DERRMR_PIPEB_SCANLINE(1 << 8)
+#define   DERRMR_PIPEB_SCANLINE(1 << 8)
 #define   DERRMR_PIPEB_PRI_FLIP_DONE   (1 << 9)
 #define   DERRMR_PIPEB_SPR_FLIP_DONE   (1 << 10)
 #define   DERRMR_PIPEB_VBLANK  (1 << 11)
@@ -7567,7 +7567,7 @@ enum {
 #define  TRANS_VBLANK_END_SHIFT16
 #define  TRANS_VBLANK_START_SHIFT  0
 #define _PCH_TRANS_VSYNC_A 0xe0014
-#define  TRANS_VSYNC_END_SHIFT 16
+#define  TRANS_VSYNC_END_SHIFT 16
 #define  TRANS_VSYNC_START_SHIFT   0
 #define _PCH_TRANS_VSYNCSHIFT_A0xe0028
 
-- 
2.14.4

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