In future platforms, FBC can be supported on planes other than
the primary plane. So update the debugfs entry for FBC status
to have the plane ID included.

Signed-off-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index d36499d7e0be..45e205a0f740 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1837,7 +1837,9 @@ static int intel_fbc_debugfs_status_show(struct seq_file 
*m, void *unused)
        mutex_lock(&fbc->lock);
 
        if (fbc->active) {
-               seq_puts(m, "FBC enabled\n");
+               seq_printf(m, "FBC enabled: [PLANE:%d:%s]\n",
+                          fbc->state.plane->base.base.id,
+                          fbc->state.plane->base.name);
                seq_printf(m, "Compressing: %s\n",
                           str_yes_no(intel_fbc_is_compressing(fbc)));
        } else {
@@ -1910,10 +1912,16 @@ static void intel_fbc_debugfs_add(struct intel_fbc *fbc,
 
 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc)
 {
-       struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+       struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+       struct intel_plane *plane;
+
+       for_each_intel_plane(&i915->drm, plane) {
+               if (!plane->fbc || plane->pipe != crtc->pipe)
+                       continue;
 
-       if (plane->fbc)
                intel_fbc_debugfs_add(plane->fbc, crtc->base.debugfs_entry);
+               break;
+       }
 }
 
 /* FIXME: remove this once igt is on board with per-crtc stuff */
-- 
2.34.1

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