Re: [Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
On Mon, Mar 23, 2015 at 03:07:58PM +0200, Joonas Lahtinen wrote:
> On ma, 2015-03-23 at 11:10 +, Tvrtko Ursulin wrote:
> > @@ -4214,15 +4217,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object
> > *obj,
> > }
> >
> > void
> > -i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
> > +i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
> > + const struct i915_ggtt_view *view)
> > {
> > - struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
> > + struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
> >
> > BUG_ON(!vma);
> > BUG_ON(vma->pin_count == 0);
> > - BUG_ON(!i915_gem_obj_ggtt_bound(obj));
> > + BUG_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type));
Just an side: I really don't like BUG_ON since it kills machines and makes
debugging needlessly harder. If you run into them and it's not guaranteed
that the kernel will oops anyway please convert to WARN_ON. I've done that
while applying (and left the !vma check as-is since that's the only one
taht catches a real oops).
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
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Re: [Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
On ma, 2015-03-23 at 11:10 +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> To support frame buffer rotation we need to be able to pass on the information
> on what kind of GGTT view is required for display.
>
> This patch just adds the parameter and makes all the callers default to the
> normal view.
>
> v2: Rebased for ggtt view changes.
> v3: Don't limit PIN_MAPPABLE to normal views just yet. (Joonas Lahtinen)
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Joonas Lahtinen (v3)
> ---
> drivers/gpu/drm/i915/i915_drv.h | 14 +++---
> drivers/gpu/drm/i915/i915_gem.c | 20
> drivers/gpu/drm/i915/intel_display.c | 7 ---
> drivers/gpu/drm/i915/intel_overlay.c | 3 ++-
> 4 files changed, 29 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index eb38cd1..e7ed5b3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2765,8 +2765,10 @@ i915_gem_object_set_to_cpu_domain(struct
> drm_i915_gem_object *obj, bool write);
> int __must_check
> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>u32 alignment,
> - struct intel_engine_cs *pipelined);
> -void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object
> *obj);
> + struct intel_engine_cs *pipelined,
> + const struct i915_ggtt_view *view);
> +void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object
> *obj,
> + const struct i915_ggtt_view
> *view);
> int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
> int align);
> int i915_gem_open(struct drm_device *dev, struct drm_file *file);
> @@ -2875,7 +2877,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object
> *obj)
> return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
> }
>
> -void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
> +void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view);
> +static inline void
> +i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
> +{
> + i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal);
> +}
>
> /* i915_gem_context.c */
> int __must_check i915_gem_context_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 84e2a23..73b2638 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3871,7 +3871,8 @@ static bool is_pin_display(struct drm_i915_gem_object
> *obj)
> int
> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>u32 alignment,
> - struct intel_engine_cs *pipelined)
> + struct intel_engine_cs *pipelined,
> + const struct i915_ggtt_view *view)
> {
> u32 old_read_domains, old_write_domain;
> bool was_pin_display;
> @@ -3907,7 +3908,7 @@ i915_gem_object_pin_to_display_plane(struct
> drm_i915_gem_object *obj,
>* (e.g. libkms for the bootup splash), we have to ensure that we
>* always use map_and_fenceable for all scanout buffers.
>*/
> - ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
> + ret = i915_gem_object_ggtt_pin(obj, view, alignment, PIN_MAPPABLE);
> if (ret)
> goto err_unpin_display;
>
> @@ -3935,9 +3936,11 @@ err_unpin_display:
> }
>
> void
> -i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
> +i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view)
> {
> - i915_gem_object_ggtt_unpin(obj);
> + i915_gem_object_ggtt_unpin_view(obj, view);
> +
> obj->pin_display = is_pin_display(obj);
> }
>
> @@ -4214,15 +4217,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object
> *obj,
> }
>
> void
> -i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
> +i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view)
> {
> - struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
> + struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
>
> BUG_ON(!vma);
> BUG_ON(vma->pin_count == 0);
> - BUG_ON(!i915_gem_obj_ggtt_bound(obj));
> + BUG_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type));
>
> - if (--vma->pin_count == 0)
> + if (--vma->pin_count == 0 && view->type == I915_GGTT_VIEW_NORMAL)
> obj->pin_mappable = false;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_di
[Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
From: Tvrtko Ursulin
To support frame buffer rotation we need to be able to pass on the information
on what kind of GGTT view is required for display.
This patch just adds the parameter and makes all the callers default to the
normal view.
v2: Rebased for ggtt view changes.
v3: Don't limit PIN_MAPPABLE to normal views just yet. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 14 +++---
drivers/gpu/drm/i915/i915_gem.c | 20
drivers/gpu/drm/i915/intel_display.c | 7 ---
drivers/gpu/drm/i915/intel_overlay.c | 3 ++-
4 files changed, 29 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eb38cd1..e7ed5b3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2765,8 +2765,10 @@ i915_gem_object_set_to_cpu_domain(struct
drm_i915_gem_object *obj, bool write);
int __must_check
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined);
-void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view);
+void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
+ const struct i915_ggtt_view
*view);
int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
int align);
int i915_gem_open(struct drm_device *dev, struct drm_file *file);
@@ -2875,7 +2877,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object
*obj)
return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
}
-void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
+void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
+const struct i915_ggtt_view *view);
+static inline void
+i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
+{
+ i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal);
+}
/* i915_gem_context.c */
int __must_check i915_gem_context_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 84e2a23..73b2638 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3871,7 +3871,8 @@ static bool is_pin_display(struct drm_i915_gem_object
*obj)
int
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined)
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view)
{
u32 old_read_domains, old_write_domain;
bool was_pin_display;
@@ -3907,7 +3908,7 @@ i915_gem_object_pin_to_display_plane(struct
drm_i915_gem_object *obj,
* (e.g. libkms for the bootup splash), we have to ensure that we
* always use map_and_fenceable for all scanout buffers.
*/
- ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
+ ret = i915_gem_object_ggtt_pin(obj, view, alignment, PIN_MAPPABLE);
if (ret)
goto err_unpin_display;
@@ -3935,9 +3936,11 @@ err_unpin_display:
}
void
-i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
+i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
+const struct i915_ggtt_view *view)
{
- i915_gem_object_ggtt_unpin(obj);
+ i915_gem_object_ggtt_unpin_view(obj, view);
+
obj->pin_display = is_pin_display(obj);
}
@@ -4214,15 +4217,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object
*obj,
}
void
-i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
+i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
+ const struct i915_ggtt_view *view)
{
- struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
+ struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
BUG_ON(!vma);
BUG_ON(vma->pin_count == 0);
- BUG_ON(!i915_gem_obj_ggtt_bound(obj));
+ BUG_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type));
- if (--vma->pin_count == 0)
+ if (--vma->pin_count == 0 && view->type == I915_GGTT_VIEW_NORMAL)
obj->pin_mappable = false;
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3b9ce89..39380f4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2350,7 +2350,8 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
intel_runtime_pm_get(dev_priv);
dev_priv->m
Re: [Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
On Wed, Mar 18, 2015 at 03:52:31PM +0200, Joonas Lahtinen wrote: > On ti, 2015-03-17 at 15:45 +, Tvrtko Ursulin wrote: > > @@ -3993,7 +3994,9 @@ i915_gem_object_pin_to_display_plane(struct > > drm_i915_gem_object *obj, > > * (e.g. libkms for the bootup splash), we have to ensure that we > > * always use map_and_fenceable for all scanout buffers. > > */ > > - ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE); > > + ret = i915_gem_object_ggtt_pin(obj, view, alignment, > > + view->type == I915_GGTT_VIEW_NORMAL ? > > + PIN_MAPPABLE : 0); > > I'm slightly concerned about making an assumption that other but normal > views need not to be mappable (when none are defined). As discussed in > IRC, this should be moved later into the series when we actually know > about the other views. Just an aside: As soon as we have partial ggtt views we don't need to pin anything display related as mappable any more - we only do this to make sure we can serve any gtt mmap faults on frontbuffers, just in case. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
On ti, 2015-03-17 at 15:45 +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> To support frame buffer rotation we need to be able to pass on the information
> on what kind of GGTT view is required for display.
>
> This patch just adds the parameter and makes all the callers default to the
> normal view.
>
> v2: Rebased for ggtt view changes.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> ---
> drivers/gpu/drm/i915/i915_drv.h | 14 +++---
> drivers/gpu/drm/i915/i915_gem.c | 22 ++
> drivers/gpu/drm/i915/intel_display.c | 7 ---
> drivers/gpu/drm/i915/intel_overlay.c | 3 ++-
> 4 files changed, 31 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 81f60b4..19b9e69 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2772,8 +2772,10 @@ i915_gem_object_set_to_cpu_domain(struct
> drm_i915_gem_object *obj, bool write);
> int __must_check
> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>u32 alignment,
> - struct intel_engine_cs *pipelined);
> -void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object
> *obj);
> + struct intel_engine_cs *pipelined,
> + const struct i915_ggtt_view *view);
> +void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object
> *obj,
> + const struct i915_ggtt_view
> *view);
> int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
> int align);
> int i915_gem_open(struct drm_device *dev, struct drm_file *file);
> @@ -2882,7 +2884,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object
> *obj)
> return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
> }
>
> -void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
> +void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view);
> +static inline void
> +i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
> +{
> + i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal);
> +}
>
> /* i915_gem_context.c */
> int __must_check i915_gem_context_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 533ef37..58723a3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3957,7 +3957,8 @@ static bool is_pin_display(struct drm_i915_gem_object
> *obj)
> int
> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>u32 alignment,
> - struct intel_engine_cs *pipelined)
> + struct intel_engine_cs *pipelined,
> + const struct i915_ggtt_view *view)
> {
> u32 old_read_domains, old_write_domain;
> bool was_pin_display;
> @@ -3993,7 +3994,9 @@ i915_gem_object_pin_to_display_plane(struct
> drm_i915_gem_object *obj,
>* (e.g. libkms for the bootup splash), we have to ensure that we
>* always use map_and_fenceable for all scanout buffers.
>*/
> - ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
> + ret = i915_gem_object_ggtt_pin(obj, view, alignment,
> +view->type == I915_GGTT_VIEW_NORMAL ?
> +PIN_MAPPABLE : 0);
I'm slightly concerned about making an assumption that other but normal
views need not to be mappable (when none are defined). As discussed in
IRC, this should be moved later into the series when we actually know
about the other views.
> if (ret)
> goto err_unpin_display;
>
> @@ -4021,9 +4024,11 @@ err_unpin_display:
> }
>
> void
> -i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
> +i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view)
> {
> - i915_gem_object_ggtt_unpin(obj);
> + i915_gem_object_ggtt_unpin_view(obj, view);
> +
> obj->pin_display = is_pin_display(obj);
> }
>
> @@ -4296,15 +4301,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object
> *obj,
> }
>
> void
> -i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
> +i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
> + const struct i915_ggtt_view *view)
> {
> - struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
> + struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
>
> BUG_ON(!vma);
> BUG_ON(vma->pin_count == 0);
> - BUG_ON(!i915_gem_obj_ggtt_bound(obj));
> + BUG_ON(!i915_gem_obj_ggtt_bound_vi
[Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
From: Tvrtko Ursulin
To support frame buffer rotation we need to be able to pass on the information
on what kind of GGTT view is required for display.
This patch just adds the parameter and makes all the callers default to the
normal view.
v2: Rebased for ggtt view changes.
Signed-off-by: Tvrtko Ursulin
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 14 +++---
drivers/gpu/drm/i915/i915_gem.c | 22 ++
drivers/gpu/drm/i915/intel_display.c | 7 ---
drivers/gpu/drm/i915/intel_overlay.c | 3 ++-
4 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 81f60b4..19b9e69 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2772,8 +2772,10 @@ i915_gem_object_set_to_cpu_domain(struct
drm_i915_gem_object *obj, bool write);
int __must_check
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined);
-void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view);
+void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
+ const struct i915_ggtt_view
*view);
int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
int align);
int i915_gem_open(struct drm_device *dev, struct drm_file *file);
@@ -2882,7 +2884,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object
*obj)
return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
}
-void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
+void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
+const struct i915_ggtt_view *view);
+static inline void
+i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
+{
+ i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal);
+}
/* i915_gem_context.c */
int __must_check i915_gem_context_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 533ef37..58723a3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3957,7 +3957,8 @@ static bool is_pin_display(struct drm_i915_gem_object
*obj)
int
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined)
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view)
{
u32 old_read_domains, old_write_domain;
bool was_pin_display;
@@ -3993,7 +3994,9 @@ i915_gem_object_pin_to_display_plane(struct
drm_i915_gem_object *obj,
* (e.g. libkms for the bootup splash), we have to ensure that we
* always use map_and_fenceable for all scanout buffers.
*/
- ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
+ ret = i915_gem_object_ggtt_pin(obj, view, alignment,
+ view->type == I915_GGTT_VIEW_NORMAL ?
+ PIN_MAPPABLE : 0);
if (ret)
goto err_unpin_display;
@@ -4021,9 +4024,11 @@ err_unpin_display:
}
void
-i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
+i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
+const struct i915_ggtt_view *view)
{
- i915_gem_object_ggtt_unpin(obj);
+ i915_gem_object_ggtt_unpin_view(obj, view);
+
obj->pin_display = is_pin_display(obj);
}
@@ -4296,15 +4301,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object
*obj,
}
void
-i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
+i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
+ const struct i915_ggtt_view *view)
{
- struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
+ struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
BUG_ON(!vma);
BUG_ON(vma->pin_count == 0);
- BUG_ON(!i915_gem_obj_ggtt_bound(obj));
+ BUG_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type));
- if (--vma->pin_count == 0)
+ if (--vma->pin_count == 0 && view->type == I915_GGTT_VIEW_NORMAL)
obj->pin_mappable = false;
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a307979..16f3443 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2311,7 +2311,8 @@ intel_pin_and_fence_fb_obj(struct drm_plane
[Intel-gfx] [PATCH 2/7] drm/i915: Use GGTT view when (un)pinning objects to planes
From: Tvrtko Ursulin
To support frame buffer rotation we need to be able to pass on the information
on what kind of GGTT view is required for display.
This patch just adds the parameter and makes all the callers default to the
normal view.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 33 +
drivers/gpu/drm/i915/i915_gem.c | 27 +--
drivers/gpu/drm/i915/intel_display.c | 7 ---
drivers/gpu/drm/i915/intel_overlay.c | 3 ++-
4 files changed, 52 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b384b72..b04b07d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2761,8 +2761,10 @@ i915_gem_object_set_to_cpu_domain(struct
drm_i915_gem_object *obj, bool write);
int __must_check
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined);
-void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view);
+void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj,
+ const struct i915_ggtt_view
*view);
int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
int align);
int i915_gem_open(struct drm_device *dev, struct drm_file *file);
@@ -2831,7 +2833,13 @@ i915_gem_obj_lookup_or_create_vma(struct
drm_i915_gem_object *obj,
&i915_ggtt_view_normal);
}
-struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj);
+struct i915_vma *i915_gem_obj_to_ggtt_view(struct drm_i915_gem_object *obj,
+ enum i915_ggtt_view_type view);
+static inline
+struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj)
+{
+ return i915_gem_obj_to_ggtt_view(obj, I915_GGTT_VIEW_NORMAL);
+}
static inline bool i915_gem_obj_is_pinned(struct drm_i915_gem_object *obj) {
struct i915_vma *vma;
list_for_each_entry(vma, &obj->vma_list, vma_link)
@@ -2885,13 +2893,30 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
alignment, flags | PIN_GLOBAL);
}
+static inline int __must_check
+i915_gem_obj_ggtt_pin_view(struct drm_i915_gem_object *obj,
+ uint32_t alignment,
+ unsigned flags,
+ const struct i915_ggtt_view *ggtt_view)
+{
+ return i915_gem_object_pin_view(obj, i915_obj_to_ggtt(obj),
+ alignment, flags | PIN_GLOBAL,
+ ggtt_view);
+}
+
static inline int
i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj)
{
return i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
}
-void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
+void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
+enum i915_ggtt_view_type view);
+static inline void
+i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj)
+{
+ i915_gem_object_ggtt_unpin_view(obj, I915_GGTT_VIEW_NORMAL);
+}
/* i915_gem_context.c */
int __must_check i915_gem_context_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3831cc0..ecedda5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3951,7 +3951,8 @@ static bool is_pin_display(struct drm_i915_gem_object
*obj)
int
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
-struct intel_engine_cs *pipelined)
+struct intel_engine_cs *pipelined,
+const struct i915_ggtt_view *view)
{
u32 old_read_domains, old_write_domain;
bool was_pin_display;
@@ -3987,7 +3988,9 @@ i915_gem_object_pin_to_display_plane(struct
drm_i915_gem_object *obj,
* (e.g. libkms for the bootup splash), we have to ensure that we
* always use map_and_fenceable for all scanout buffers.
*/
- ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
+ ret = i915_gem_obj_ggtt_pin_view(obj, alignment,
+view->type == I915_GGTT_VIEW_NORMAL ?
+PIN_MAPPABLE : 0, view);
if (ret)
goto err_unpin_display;
@@ -4015,9 +4018,11 @@ err_unpin_display:
}
void
-i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
+i915_gem_object_unpin_from_dis
