Re: [Intel-gfx] [PATCH 3/8] drm/dp: add some new DPCD macros from DP 2.0 E11

2022-01-26 Thread Ville Syrjälä
On Tue, Jan 25, 2022 at 07:03:41PM +0200, Jani Nikula wrote:
> Add some of the new additions from DP 2.0 E11.
> 
> Cc: Uma Shankar 
> Cc: Ville Syrjälä 
> Signed-off-by: Jani Nikula 

Reviewed-by: Ville Syrjälä 

> ---
>  include/drm/dp/drm_dp_helper.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/drm/dp/drm_dp_helper.h b/include/drm/dp/drm_dp_helper.h
> index c499d735b992..69487bd8ed56 100644
> --- a/include/drm/dp/drm_dp_helper.h
> +++ b/include/drm/dp/drm_dp_helper.h
> @@ -560,6 +560,7 @@ struct drm_panel;
>  # define DP_TRAINING_PATTERN_DISABLE 0
>  # define DP_TRAINING_PATTERN_1   1
>  # define DP_TRAINING_PATTERN_2   2
> +# define DP_TRAINING_PATTERN_2_CDS   3   /* 2.0 E11 */
>  # define DP_TRAINING_PATTERN_3   3   /* 1.2 */
>  # define DP_TRAINING_PATTERN_4  7   /* 1.4 */
>  # define DP_TRAINING_PATTERN_MASK0x3
> @@ -1350,6 +1351,7 @@ struct drm_panel;
>  # define DP_PHY_REPEATER_128B132B_SUPPORTED  (1 << 0)
>  /* See DP_128B132B_SUPPORTED_LINK_RATES for values */
>  #define DP_PHY_REPEATER_128B132B_RATES   0xf0007 /* 
> 2.0 */
> +#define DP_PHY_REPEATER_EQ_DONE 0xf0008 /* 2.0 
> E11 */

Wonder if we should look at that at some point? The spec doesn't really
say so. Or maybe we should just dump it out of the link training failed?

>  
>  enum drm_dp_phy {
>   DP_PHY_DPRX,
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel


[Intel-gfx] [PATCH 3/8] drm/dp: add some new DPCD macros from DP 2.0 E11

2022-01-25 Thread Jani Nikula
Add some of the new additions from DP 2.0 E11.

Cc: Uma Shankar 
Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 include/drm/dp/drm_dp_helper.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/drm/dp/drm_dp_helper.h b/include/drm/dp/drm_dp_helper.h
index c499d735b992..69487bd8ed56 100644
--- a/include/drm/dp/drm_dp_helper.h
+++ b/include/drm/dp/drm_dp_helper.h
@@ -560,6 +560,7 @@ struct drm_panel;
 # define DP_TRAINING_PATTERN_DISABLE   0
 # define DP_TRAINING_PATTERN_1 1
 # define DP_TRAINING_PATTERN_2 2
+# define DP_TRAINING_PATTERN_2_CDS 3   /* 2.0 E11 */
 # define DP_TRAINING_PATTERN_3 3   /* 1.2 */
 # define DP_TRAINING_PATTERN_4  7   /* 1.4 */
 # define DP_TRAINING_PATTERN_MASK  0x3
@@ -1350,6 +1351,7 @@ struct drm_panel;
 # define DP_PHY_REPEATER_128B132B_SUPPORTED(1 << 0)
 /* See DP_128B132B_SUPPORTED_LINK_RATES for values */
 #define DP_PHY_REPEATER_128B132B_RATES 0xf0007 /* 2.0 */
+#define DP_PHY_REPEATER_EQ_DONE 0xf0008 /* 2.0 E11 
*/
 
 enum drm_dp_phy {
DP_PHY_DPRX,
-- 
2.30.2