Re: [Intel-gfx] [PATCH 4/4] drm/i915/gen9: Write dc state debugmask bits only once
On to, 2016-02-18 at 17:21 +0200, Mika Kuoppala wrote:
> DMC debugmask bits should stick so no need to write them
> everytime dc state is changed.
>
> v2: Write after firmware has been successfully loaded (Ville)
>
> Signed-off-by: Mika Kuoppala
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_csr.c| 8 +---
> drivers/gpu/drm/i915/intel_drv.h| 2 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 7 ++-
> 3 files changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c
> b/drivers/gpu/drm/i915/intel_csr.c
> index b453fccfa25d..902054efb902 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -220,19 +220,19 @@ static const struct stepping_info
> *intel_get_stepping_info(struct drm_device *de
> * Everytime display comes back from low power state this function
> is called to
> * copy the firmware from internal memory to registers.
> */
> -void intel_csr_load_program(struct drm_i915_private *dev_priv)
> +bool intel_csr_load_program(struct drm_i915_private *dev_priv)
> {
> u32 *payload = dev_priv->csr.dmc_payload;
> uint32_t i, fw_size;
>
> if (!IS_GEN9(dev_priv)) {
> DRM_ERROR("No CSR support available for this
> platform\n");
> - return;
> + return false;
> }
>
> if (!dev_priv->csr.dmc_payload) {
> DRM_ERROR("Tried to program CSR with empty
> payload\n");
> - return;
> + return false;
> }
>
> fw_size = dev_priv->csr.dmc_fw_size;
> @@ -245,6 +245,8 @@ void intel_csr_load_program(struct
> drm_i915_private *dev_priv)
> }
>
> dev_priv->csr.dc_state = 0;
> +
> + return true;
> }
>
> static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 285b0570be9c..c208ca630e99 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1225,7 +1225,7 @@ u32 skl_plane_ctl_rotation(unsigned int
> rotation);
>
> /* intel_csr.c */
> void intel_csr_ucode_init(struct drm_i915_private *);
> -void intel_csr_load_program(struct drm_i915_private *);
> +bool intel_csr_load_program(struct drm_i915_private *);
> void intel_csr_ucode_fini(struct drm_i915_private *);
>
> /* intel_dp.c */
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 1b490c7e4020..7f0577ca900e 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -526,9 +526,6 @@ static void gen9_set_dc_state(struct
> drm_i915_private *dev_priv, uint32_t state)
> else if (i915.enable_dc == 1 && state >
> DC_STATE_EN_UPTO_DC5)
> state = DC_STATE_EN_UPTO_DC5;
>
> - if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK)
> - gen9_set_dc_state_debugmask(dev_priv);
> -
> val = I915_READ(DC_STATE_EN);
> DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
> val & mask, state);
> @@ -2119,8 +2116,8 @@ static void skl_display_core_init(struct
> drm_i915_private *dev_priv,
>
> skl_init_cdclk(dev_priv);
>
> - if (dev_priv->csr.dmc_payload)
> - intel_csr_load_program(dev_priv);
> + if (dev_priv->csr.dmc_payload &&
> intel_csr_load_program(dev_priv))
> + gen9_set_dc_state_debugmask(dev_priv);
> }
>
> static void skl_display_core_uninit(struct drm_i915_private
> *dev_priv)
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] drm/i915/gen9: Write dc state debugmask bits only once
DMC debugmask bits should stick so no need to write them
everytime dc state is changed.
v2: Write after firmware has been successfully loaded (Ville)
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_csr.c| 8 +---
drivers/gpu/drm/i915/intel_drv.h| 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 ++-
3 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index b453fccfa25d..902054efb902 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -220,19 +220,19 @@ static const struct stepping_info
*intel_get_stepping_info(struct drm_device *de
* Everytime display comes back from low power state this function is called to
* copy the firmware from internal memory to registers.
*/
-void intel_csr_load_program(struct drm_i915_private *dev_priv)
+bool intel_csr_load_program(struct drm_i915_private *dev_priv)
{
u32 *payload = dev_priv->csr.dmc_payload;
uint32_t i, fw_size;
if (!IS_GEN9(dev_priv)) {
DRM_ERROR("No CSR support available for this platform\n");
- return;
+ return false;
}
if (!dev_priv->csr.dmc_payload) {
DRM_ERROR("Tried to program CSR with empty payload\n");
- return;
+ return false;
}
fw_size = dev_priv->csr.dmc_fw_size;
@@ -245,6 +245,8 @@ void intel_csr_load_program(struct drm_i915_private
*dev_priv)
}
dev_priv->csr.dc_state = 0;
+
+ return true;
}
static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 285b0570be9c..c208ca630e99 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1225,7 +1225,7 @@ u32 skl_plane_ctl_rotation(unsigned int rotation);
/* intel_csr.c */
void intel_csr_ucode_init(struct drm_i915_private *);
-void intel_csr_load_program(struct drm_i915_private *);
+bool intel_csr_load_program(struct drm_i915_private *);
void intel_csr_ucode_fini(struct drm_i915_private *);
/* intel_dp.c */
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 1b490c7e4020..7f0577ca900e 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -526,9 +526,6 @@ static void gen9_set_dc_state(struct drm_i915_private
*dev_priv, uint32_t state)
else if (i915.enable_dc == 1 && state > DC_STATE_EN_UPTO_DC5)
state = DC_STATE_EN_UPTO_DC5;
- if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK)
- gen9_set_dc_state_debugmask(dev_priv);
-
val = I915_READ(DC_STATE_EN);
DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
val & mask, state);
@@ -2119,8 +2116,8 @@ static void skl_display_core_init(struct drm_i915_private
*dev_priv,
skl_init_cdclk(dev_priv);
- if (dev_priv->csr.dmc_payload)
- intel_csr_load_program(dev_priv);
+ if (dev_priv->csr.dmc_payload && intel_csr_load_program(dev_priv))
+ gen9_set_dc_state_debugmask(dev_priv);
}
static void skl_display_core_uninit(struct drm_i915_private *dev_priv)
--
2.5.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
