Re: [Intel-gfx] [PATCH 4/4] drm/i915: Plump dev_priv all the way to icl_{hdr, sdr_y}_plane_mask()
Minor nit.
s/Plump/Plumb/
M
>-Original Message-
>From: Intel-gfx On Behalf Of Ville
>Syrjala
>Sent: Thursday, October 31, 2019 6:59 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Plump dev_priv all the way to
>icl_{hdr, sdr_y}_plane_mask()
>
>From: Ville Syrjälä
>
>We're going to need platforms specific decisions in
>icl_sdr_y_plane_mask(), so let's plumb dev_priv all the way
>down. For consistency we'll do the same for icl_hdr_plane_mask().
>
>Signed-off-by: Ville Syrjälä
>---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_sprite.h | 24
> 3 files changed, 19 insertions(+), 13 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>b/drivers/gpu/drm/i915/display/intel_display.c
>index 8e1160f8d988..b690ea26cc89 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -9613,7 +9613,7 @@ static void bdw_set_pipemisc(const struct
>intel_crtc_state *crtc_state)
> PIPEMISC_YUV420_MODE_FULL_BLEND;
>
> if (INTEL_GEN(dev_priv) >= 11 &&
>- (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
>+ (crtc_state->active_planes & ~(icl_hdr_plane_mask(dev_priv) |
> BIT(PLANE_CURSOR))) == 0)
> val |= PIPEMISC_HDR_MODE_PRECISION;
>
>@@ -11955,7 +11955,7 @@ static int icl_check_nv12_planes(struct
>intel_crtc_state *crtc_state)
> continue;
>
> for_each_intel_plane_on_crtc(_priv->drm, crtc, linked) {
>- if (!icl_is_sdr_y_plane(linked->id))
>+ if (!icl_is_sdr_y_plane(dev_priv, linked->id))
> continue;
>
> if (crtc_state->active_planes & BIT(linked->id))
>diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
>b/drivers/gpu/drm/i915/display/intel_sprite.c
>index ba344d9e2e19..b486287b9fb1 100644
>--- a/drivers/gpu/drm/i915/display/intel_sprite.c
>+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>@@ -2849,7 +2849,7 @@ static const u32 *icl_get_plane_formats(struct
>drm_i915_private *dev_priv,
> if (icl_is_hdr_plane(dev_priv, plane_id)) {
> *num_formats = ARRAY_SIZE(icl_hdr_plane_formats);
> return icl_hdr_plane_formats;
>- } else if (icl_is_sdr_y_plane(plane_id)) {
>+ } else if (icl_is_sdr_y_plane(dev_priv, plane_id)) {
> *num_formats = ARRAY_SIZE(icl_sdr_y_plane_formats);
> return icl_sdr_y_plane_formats;
> } else {
>@@ -2910,7 +2910,7 @@ skl_universal_plane_create(struct drm_i915_private
>*dev_priv,
> plane->get_hw_state = skl_plane_get_hw_state;
> plane->check_plane = skl_plane_check;
> plane->min_cdclk = skl_plane_min_cdclk;
>- if (icl_is_sdr_y_plane(plane_id))
>+ if (icl_is_sdr_y_plane(dev_priv, plane_id))
> plane->update_slave = icl_update_slave;
>
> if (INTEL_GEN(dev_priv) >= 11)
>diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h
>b/drivers/gpu/drm/i915/display/intel_sprite.h
>index ffb03ee640ed..d9efac5e157f 100644
>--- a/drivers/gpu/drm/i915/display/intel_sprite.h
>+++ b/drivers/gpu/drm/i915/display/intel_sprite.h
>@@ -32,27 +32,33 @@ struct intel_plane *
> skl_universal_plane_create(struct drm_i915_private *dev_priv,
> enum pipe pipe, enum plane_id plane_id);
>
>-static inline u8 icl_sdr_y_plane_mask(void)
>+static inline u8 icl_sdr_y_plane_mask(struct drm_i915_private *dev_priv)
> {
>- return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
>+ if (INTEL_GEN(dev_priv) >= 11)
>+ return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
>+ else
>+ return 0;
> }
>
>-static inline bool icl_is_sdr_y_plane(enum plane_id id)
>+static inline bool icl_is_sdr_y_plane(struct drm_i915_private *dev_priv,
>+enum plane_id plane_id)
> {
>- return icl_sdr_y_plane_mask() & BIT(id);
>+ return icl_sdr_y_plane_mask(dev_priv) & BIT(plane_id);
> }
>
>-static inline u8 icl_hdr_plane_mask(void)
>+static inline u8 icl_hdr_plane_mask(struct drm_i915_private *dev_priv)
> {
>- return BIT(PLANE_PRIMARY) |
>- BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
>+ if (INTEL_GEN(dev_priv) >= 11)
>+ return BIT(PLANE_PRIMARY) |
>+ BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
>+ else
>+ r
[Intel-gfx] [PATCH 4/4] drm/i915: Plump dev_priv all the way to icl_{hdr, sdr_y}_plane_mask()
From: Ville Syrjälä
We're going to need platforms specific decisions in
icl_sdr_y_plane_mask(), so let's plumb dev_priv all the way
down. For consistency we'll do the same for icl_hdr_plane_mask().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
drivers/gpu/drm/i915/display/intel_sprite.h | 24
3 files changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 8e1160f8d988..b690ea26cc89 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9613,7 +9613,7 @@ static void bdw_set_pipemisc(const struct
intel_crtc_state *crtc_state)
PIPEMISC_YUV420_MODE_FULL_BLEND;
if (INTEL_GEN(dev_priv) >= 11 &&
- (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
+ (crtc_state->active_planes & ~(icl_hdr_plane_mask(dev_priv) |
BIT(PLANE_CURSOR))) == 0)
val |= PIPEMISC_HDR_MODE_PRECISION;
@@ -11955,7 +11955,7 @@ static int icl_check_nv12_planes(struct
intel_crtc_state *crtc_state)
continue;
for_each_intel_plane_on_crtc(_priv->drm, crtc, linked) {
- if (!icl_is_sdr_y_plane(linked->id))
+ if (!icl_is_sdr_y_plane(dev_priv, linked->id))
continue;
if (crtc_state->active_planes & BIT(linked->id))
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b/drivers/gpu/drm/i915/display/intel_sprite.c
index ba344d9e2e19..b486287b9fb1 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2849,7 +2849,7 @@ static const u32 *icl_get_plane_formats(struct
drm_i915_private *dev_priv,
if (icl_is_hdr_plane(dev_priv, plane_id)) {
*num_formats = ARRAY_SIZE(icl_hdr_plane_formats);
return icl_hdr_plane_formats;
- } else if (icl_is_sdr_y_plane(plane_id)) {
+ } else if (icl_is_sdr_y_plane(dev_priv, plane_id)) {
*num_formats = ARRAY_SIZE(icl_sdr_y_plane_formats);
return icl_sdr_y_plane_formats;
} else {
@@ -2910,7 +2910,7 @@ skl_universal_plane_create(struct drm_i915_private
*dev_priv,
plane->get_hw_state = skl_plane_get_hw_state;
plane->check_plane = skl_plane_check;
plane->min_cdclk = skl_plane_min_cdclk;
- if (icl_is_sdr_y_plane(plane_id))
+ if (icl_is_sdr_y_plane(dev_priv, plane_id))
plane->update_slave = icl_update_slave;
if (INTEL_GEN(dev_priv) >= 11)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h
b/drivers/gpu/drm/i915/display/intel_sprite.h
index ffb03ee640ed..d9efac5e157f 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.h
+++ b/drivers/gpu/drm/i915/display/intel_sprite.h
@@ -32,27 +32,33 @@ struct intel_plane *
skl_universal_plane_create(struct drm_i915_private *dev_priv,
enum pipe pipe, enum plane_id plane_id);
-static inline u8 icl_sdr_y_plane_mask(void)
+static inline u8 icl_sdr_y_plane_mask(struct drm_i915_private *dev_priv)
{
- return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
+ if (INTEL_GEN(dev_priv) >= 11)
+ return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
+ else
+ return 0;
}
-static inline bool icl_is_sdr_y_plane(enum plane_id id)
+static inline bool icl_is_sdr_y_plane(struct drm_i915_private *dev_priv,
+ enum plane_id plane_id)
{
- return icl_sdr_y_plane_mask() & BIT(id);
+ return icl_sdr_y_plane_mask(dev_priv) & BIT(plane_id);
}
-static inline u8 icl_hdr_plane_mask(void)
+static inline u8 icl_hdr_plane_mask(struct drm_i915_private *dev_priv)
{
- return BIT(PLANE_PRIMARY) |
- BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
+ if (INTEL_GEN(dev_priv) >= 11)
+ return BIT(PLANE_PRIMARY) |
+ BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
+ else
+ return 0;
}
static inline bool icl_is_hdr_plane(struct drm_i915_private *dev_priv,
enum plane_id plane_id)
{
- return INTEL_GEN(dev_priv) >= 11 &&
- icl_hdr_plane_mask() & BIT(plane_id);
+ return icl_hdr_plane_mask(dev_priv) & BIT(plane_id);
}
int ivb_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
--
2.23.0
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