Re: [Intel-gfx] [PATCH 4.1] drm/i915: WARN if we receive any gen9 rps interrupts

2014-11-11 Thread Daniel Vetter 
On Mon, Nov 10, 2014 at 03:34:33PM +0200, Imre Deak wrote:
> Paulo noticed that we don't support RPS on GEN9 yet, so WARN for and
> ignore any RPS interrupts on that platform.
> 
> Signed-off-by: Imre Deak 

Pulled in up to this one from this series, I'll wait for Paulo to
double-check the new versions of the subsequent patches.

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 96d150f..729e9a3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1690,6 +1690,11 @@ static void i9xx_pipe_crc_irq_handler(struct 
> drm_device *dev, enum pipe pipe)
>   * the work queue. */
>  static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 
> pm_iir)
>  {
> + /* TODO: RPS on GEN9 is not supported yet. */
> + if (WARN_ONCE(INTEL_INFO(dev_priv)->gen == 9,
> +   "GEN9: unexpected RPS IRQ\n"))
> + return;
> +
>   if (pm_iir & dev_priv->pm_rps_events) {
>   spin_lock(&dev_priv->irq_lock);
>   dev_priv->rps.pm_iir |= pm_iir & dev_priv->pm_rps_events;
> -- 
> 1.8.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH 4.1] drm/i915: WARN if we receive any gen9 rps

2014-11-10 Thread shuang . he 
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: 
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate->patch_applied_pass_rate
BYT: pass/total=277/348->277/348
PNV: pass/total=323/328->326/328
ILK: pass/total=328/330->330/330
IVB: pass/total=545/546->545/546
SNB: pass/total=558/563->559/563
HSW: pass/total=574/578->572/578
BDW: pass/total=435/435->434/435
-Detailed-
test_platform: test_suite, test_case, result_with_drm_intel_nightly(count, 
machine_id...)...->result_with_patch_applied(count, machine_id)...
PNV: Intel_gpu_tools, igt_gem_linear_blits_normal, NSPT(1, M23)PASS(6, M24) -> 
PASS(4, M24)
PNV: Intel_gpu_tools, igt_gem_mmap_offset_exhaustion, DMESG_WARN(2, 
M23M24)PASS(14, M24M23M7) -> DMESG_WARN(1, M24)PASS(3, M24)
PNV: Intel_gpu_tools, igt_gem_unref_active_buffers, DMESG_WARN(2, M23)PASS(14, 
M24M23M7) -> PASS(4, M24)
ILK: Intel_gpu_tools, igt_kms_render_gpu-blit, DMESG_WARN(1, M26)PASS(15, 
M6M26M37) -> PASS(4, M37)
ILK: Intel_gpu_tools, igt_kms_flip_wf_vblank-vs-dpms-interruptible, 
DMESG_WARN(1, M26)PASS(15, M6M26M37) -> PASS(4, M37)
IVB: Intel_gpu_tools, igt_gem_bad_reloc_negative-reloc, NSPT(3, M4M34)PASS(7, 
M34M4) -> NSPT(2, M4)PASS(2, M4)
IVB: Intel_gpu_tools, igt_kms_plane_plane-position-covered-pipe-A-plane-1, 
TIMEOUT(1, M34)PASS(6, M4) -> PASS(4, M4)
SNB: Intel_gpu_tools, igt_kms_cursor_crc_cursor-256x256-sliding, DMESG_WARN(2, 
M35)PASS(5, M22M35) -> DMESG_WARN(1, M35)PASS(3, M35)
HSW: Intel_gpu_tools, igt_gem_bad_reloc_negative-reloc, NSPT(4, 
M39M20M40)PASS(9, M40M39M20) -> NSPT(2, M40)PASS(2, M40)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-64x64-offscreen, DMESG_WARN(1, 
M39)PASS(6, M40M39) -> DMESG_WARN(1, M40)PASS(3, M40)
BDW: Intel_gpu_tools, igt_gem_reset_stats_ban-bsd, PASS(16, M30M28M42) -> 
DMESG_WARN(1, M28)PASS(3, M28)
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[Intel-gfx] [PATCH 4.1] drm/i915: WARN if we receive any gen9 rps interrupts

2014-11-10 Thread Imre Deak 
Paulo noticed that we don't support RPS on GEN9 yet, so WARN for and
ignore any RPS interrupts on that platform.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/i915_irq.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 96d150f..729e9a3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1690,6 +1690,11 @@ static void i9xx_pipe_crc_irq_handler(struct drm_device 
*dev, enum pipe pipe)
  * the work queue. */
 static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
 {
+   /* TODO: RPS on GEN9 is not supported yet. */
+   if (WARN_ONCE(INTEL_INFO(dev_priv)->gen == 9,
+ "GEN9: unexpected RPS IRQ\n"))
+   return;
+
if (pm_iir & dev_priv->pm_rps_events) {
spin_lock(&dev_priv->irq_lock);
dev_priv->rps.pm_iir |= pm_iir & dev_priv->pm_rps_events;
-- 
1.8.4

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