Re: [Intel-gfx] [PATCH 54/73] drm/i915: Fix up vma alignment to be u64
On ma, 2016-08-01 at 10:11 +0100, Chris Wilson wrote: > This is not the full fix, as we are required to percolate the u64 nature > down through the drm_mm stack, but this is required now to prevent > explosions due to mismatch between execbuf (eb_vma_misplaced) and vma > binding (i915_vma_misplaced) - and reduces the risk of spurious changes > as we adjust the vma interface in the next patches. > > Signed-off-by: Chris Wilson> --- > drivers/gpu/drm/i915/i915_drv.h | 14 ++ > drivers/gpu/drm/i915/i915_gem.c | 26 +- > drivers/gpu/drm/i915/i915_gem_evict.c | 5 +++-- > 3 files changed, 22 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2de3d16f7b80..74a31358fd87 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -3032,13 +3032,13 @@ void i915_gem_free_object(struct drm_gem_object *obj); > int __must_check > i915_gem_object_pin(struct drm_i915_gem_object *obj, > struct i915_address_space *vm, > - uint32_t alignment, > - uint64_t flags); > + u64 alignment, > + u64 flags); > int __must_check > i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, > const struct i915_ggtt_view *view, > - uint32_t alignment, > - uint64_t flags); > + u64 alignment, > + u64 flags); > > int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, > u32 flags); > @@ -3398,11 +3398,9 @@ int i915_gem_context_reset_stats_ioctl(struct > drm_device *dev, void *data, > > /* i915_gem_evict.c */ > int __must_check i915_gem_evict_something(struct i915_address_space *vm, > - int min_size, > - unsigned alignment, > + u64 min_size, u64 alignment, > unsigned cache_level, > - unsigned long start, > - unsigned long end, > + u64 start, u64 end, > unsigned flags); > int __must_check i915_gem_evict_for_vma(struct i915_vma *target); > int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle); > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 3402fec5e33c..6039e46af69a 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2960,8 +2960,8 @@ static struct i915_vma * > i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, > struct i915_address_space *vm, > const struct i915_ggtt_view *ggtt_view, > - unsigned alignment, > - uint64_t flags) > + u64 alignment, > + u64 flags) > { > struct drm_device *dev = obj->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -3020,9 +3020,9 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object > *obj, > alignment = flags & PIN_MAPPABLE ? fence_alignment : > unfenced_alignment; > if (flags & PIN_MAPPABLE && alignment & (fence_alignment - 1)) { > - DRM_DEBUG("Invalid object (view type=%u) alignment requested > %u\n", > + DRM_DEBUG("Invalid object (view type=%u) alignment requested > %llx\n", > ggtt_view ? ggtt_view->type : 0, > - alignment); > + (long long)alignment); > return ERR_PTR(-EINVAL); > } > > @@ -3675,7 +3675,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct > drm_file *file) > } > > static bool > -i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags) > +i915_vma_misplaced(struct i915_vma *vma, u64 alignment, u64 flags) > { > struct drm_i915_gem_object *obj = vma->obj; > > @@ -3724,8 +3724,8 @@ static int > i915_gem_object_do_pin(struct drm_i915_gem_object *obj, > struct i915_address_space *vm, > const struct i915_ggtt_view *ggtt_view, > - uint32_t alignment, > - uint64_t flags) > + u64 alignment, > + u64 flags) > { > struct drm_i915_private *dev_priv = to_i915(obj->base.dev); > struct i915_vma *vma; > @@ -3754,12 +3754,12 @@ i915_gem_object_do_pin(struct drm_i915_gem_object > *obj, > if (i915_vma_misplaced(vma, alignment, flags)) { > WARN(vma->pin_count, > "bo is already pinned in %s with incorrect >
[Intel-gfx] [PATCH 54/73] drm/i915: Fix up vma alignment to be u64
This is not the full fix, as we are required to percolate the u64 nature down through the drm_mm stack, but this is required now to prevent explosions due to mismatch between execbuf (eb_vma_misplaced) and vma binding (i915_vma_misplaced) - and reduces the risk of spurious changes as we adjust the vma interface in the next patches. Signed-off-by: Chris Wilson--- drivers/gpu/drm/i915/i915_drv.h | 14 ++ drivers/gpu/drm/i915/i915_gem.c | 26 +- drivers/gpu/drm/i915/i915_gem_evict.c | 5 +++-- 3 files changed, 22 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2de3d16f7b80..74a31358fd87 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3032,13 +3032,13 @@ void i915_gem_free_object(struct drm_gem_object *obj); int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj, struct i915_address_space *vm, - uint32_t alignment, - uint64_t flags); + u64 alignment, + u64 flags); int __must_check i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, const struct i915_ggtt_view *view, -uint32_t alignment, -uint64_t flags); +u64 alignment, +u64 flags); int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, u32 flags); @@ -3398,11 +3398,9 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device *dev, void *data, /* i915_gem_evict.c */ int __must_check i915_gem_evict_something(struct i915_address_space *vm, - int min_size, - unsigned alignment, + u64 min_size, u64 alignment, unsigned cache_level, - unsigned long start, - unsigned long end, + u64 start, u64 end, unsigned flags); int __must_check i915_gem_evict_for_vma(struct i915_vma *target); int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 3402fec5e33c..6039e46af69a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2960,8 +2960,8 @@ static struct i915_vma * i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, struct i915_address_space *vm, const struct i915_ggtt_view *ggtt_view, - unsigned alignment, - uint64_t flags) + u64 alignment, + u64 flags) { struct drm_device *dev = obj->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); @@ -3020,9 +3020,9 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, alignment = flags & PIN_MAPPABLE ? fence_alignment : unfenced_alignment; if (flags & PIN_MAPPABLE && alignment & (fence_alignment - 1)) { - DRM_DEBUG("Invalid object (view type=%u) alignment requested %u\n", + DRM_DEBUG("Invalid object (view type=%u) alignment requested %llx\n", ggtt_view ? ggtt_view->type : 0, - alignment); + (long long)alignment); return ERR_PTR(-EINVAL); } @@ -3675,7 +3675,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file) } static bool -i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags) +i915_vma_misplaced(struct i915_vma *vma, u64 alignment, u64 flags) { struct drm_i915_gem_object *obj = vma->obj; @@ -3724,8 +3724,8 @@ static int i915_gem_object_do_pin(struct drm_i915_gem_object *obj, struct i915_address_space *vm, const struct i915_ggtt_view *ggtt_view, - uint32_t alignment, - uint64_t flags) + u64 alignment, + u64 flags) { struct drm_i915_private *dev_priv = to_i915(obj->base.dev); struct i915_vma *vma; @@ -3754,12 +3754,12 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj, if (i915_vma_misplaced(vma, alignment, flags)) { WARN(vma->pin_count, "bo is already pinned in %s with incorrect alignment:" -" offset=%08x %08x, req.alignment=%x, req.map_and_fenceable=%d," +" offset=%08x %08x, req.alignment=%llx,