Re: [Intel-gfx] [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6

2015-11-03 Thread Patrik Jakobsson
On Tue, Nov 3, 2015 at 3:19 PM, Jani Nikula  wrote:
> On Tue, 03 Nov 2015, Patrik Jakobsson  
> wrote:
>> On Tue, Nov 03, 2015 at 03:08:41PM +0200, Jani Nikula wrote:
>>> On Tue, 03 Nov 2015, Patrik Jakobsson  
>>> wrote:
>>> > Signed-off-by: Patrik Jakobsson 
>>> > ---
>>> >  drivers/gpu/drm/i915/i915_drv.h | 1 +
>>> >  drivers/gpu/drm/i915/i915_params.c  | 6 ++
>>> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>>> >  3 files changed, 8 insertions(+), 1 deletion(-)
>>> >
>>> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>>> > b/drivers/gpu/drm/i915/i915_drv.h
>>> > index efb6a00..9c8cb43 100644
>>> > --- a/drivers/gpu/drm/i915/i915_drv.h
>>> > +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> > @@ -2660,6 +2660,7 @@ struct i915_params {
>>> >int panel_use_ssc;
>>> >int vbt_sdvo_panel_type;
>>> >int enable_rc6;
>>> > +  int enable_dc6;
>>> >int enable_fbc;
>>> >int enable_ppgtt;
>>> >int enable_execlists;
>>> > diff --git a/drivers/gpu/drm/i915/i915_params.c 
>>> > b/drivers/gpu/drm/i915/i915_params.c
>>> > index 368df67..1a7dedf 100644
>>> > --- a/drivers/gpu/drm/i915/i915_params.c
>>> > +++ b/drivers/gpu/drm/i915/i915_params.c
>>> > @@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
>>> >.panel_use_ssc = -1,
>>> >.vbt_sdvo_panel_type = -1,
>>> >.enable_rc6 = -1,
>>> > +  .enable_dc6 = 1,
>>> >.enable_fbc = -1,
>>> >.enable_execlists = -1,
>>> >.enable_hangcheck = true,
>>> > @@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
>>> >"For example, 3 would enable rc6 and deep rc6, and 7 would enable 
>>> > everything. "
>>> >"default: -1 (use per-chip default)");
>>> >
>>> > +module_param_named(enable_dc6, i915.enable_dc6, int, 0400);
>>>
>>> _unsafe please.
>>
>> Is the convention to taint for all non-default options in i915?
>
> The intention is to taint all i915 options that people have no clue
> about and blindly set just because they read on a forum they should do
> it, and then report bugs because it fails.

This one certainly fits that description. Thanks for the explanation.

-Patrik

>
> BR,
> Jani.
>
>
>
>>
>> -Patrik
>>
>>>
>>> BR,
>>> Jani.
>>>
>>> > +MODULE_PARM_DESC(enable_dc6,
>>> > +  "Enable power-saving display C-state 6. "
>>> > +  "(0 = disable; 1 = enable [default])");
>>> > +
>>> >  module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
>>> >  MODULE_PARM_DESC(enable_fbc,
>>> >"Enable frame buffer compression for power savings "
>>> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
>>> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> > index 042d92f..4843c5c 100644
>>> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> > @@ -753,7 +753,7 @@ static void skl_dc_off_power_well_enable(struct 
>>> > drm_i915_private *dev_priv,
>>> >  static void skl_dc_off_power_well_disable(struct drm_i915_private 
>>> > *dev_priv,
>>> >  struct i915_power_well *power_well)
>>> >  {
>>> > -  if (IS_SKYLAKE(dev_priv))
>>> > +  if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
>>> >skl_enable_dc6(dev_priv);
>>> >else
>>> >gen9_enable_dc5(dev_priv);
>>>
>>> --
>>> Jani Nikula, Intel Open Source Technology Center
>
> --
> Jani Nikula, Intel Open Source Technology Center
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6

2015-11-03 Thread Jani Nikula
On Tue, 03 Nov 2015, Patrik Jakobsson  wrote:
> On Tue, Nov 03, 2015 at 03:08:41PM +0200, Jani Nikula wrote:
>> On Tue, 03 Nov 2015, Patrik Jakobsson  
>> wrote:
>> > Signed-off-by: Patrik Jakobsson 
>> > ---
>> >  drivers/gpu/drm/i915/i915_drv.h | 1 +
>> >  drivers/gpu/drm/i915/i915_params.c  | 6 ++
>> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>> >  3 files changed, 8 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> > b/drivers/gpu/drm/i915/i915_drv.h
>> > index efb6a00..9c8cb43 100644
>> > --- a/drivers/gpu/drm/i915/i915_drv.h
>> > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> > @@ -2660,6 +2660,7 @@ struct i915_params {
>> >int panel_use_ssc;
>> >int vbt_sdvo_panel_type;
>> >int enable_rc6;
>> > +  int enable_dc6;
>> >int enable_fbc;
>> >int enable_ppgtt;
>> >int enable_execlists;
>> > diff --git a/drivers/gpu/drm/i915/i915_params.c 
>> > b/drivers/gpu/drm/i915/i915_params.c
>> > index 368df67..1a7dedf 100644
>> > --- a/drivers/gpu/drm/i915/i915_params.c
>> > +++ b/drivers/gpu/drm/i915/i915_params.c
>> > @@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
>> >.panel_use_ssc = -1,
>> >.vbt_sdvo_panel_type = -1,
>> >.enable_rc6 = -1,
>> > +  .enable_dc6 = 1,
>> >.enable_fbc = -1,
>> >.enable_execlists = -1,
>> >.enable_hangcheck = true,
>> > @@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
>> >"For example, 3 would enable rc6 and deep rc6, and 7 would enable 
>> > everything. "
>> >"default: -1 (use per-chip default)");
>> >  
>> > +module_param_named(enable_dc6, i915.enable_dc6, int, 0400);
>> 
>> _unsafe please.
>
> Is the convention to taint for all non-default options in i915?

The intention is to taint all i915 options that people have no clue
about and blindly set just because they read on a forum they should do
it, and then report bugs because it fails.

BR,
Jani.



>
> -Patrik
>
>> 
>> BR,
>> Jani.
>> 
>> > +MODULE_PARM_DESC(enable_dc6,
>> > +  "Enable power-saving display C-state 6. "
>> > +  "(0 = disable; 1 = enable [default])");
>> > +
>> >  module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
>> >  MODULE_PARM_DESC(enable_fbc,
>> >"Enable frame buffer compression for power savings "
>> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
>> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > index 042d92f..4843c5c 100644
>> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > @@ -753,7 +753,7 @@ static void skl_dc_off_power_well_enable(struct 
>> > drm_i915_private *dev_priv,
>> >  static void skl_dc_off_power_well_disable(struct drm_i915_private 
>> > *dev_priv,
>> >  struct i915_power_well *power_well)
>> >  {
>> > -  if (IS_SKYLAKE(dev_priv))
>> > +  if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
>> >skl_enable_dc6(dev_priv);
>> >else
>> >gen9_enable_dc5(dev_priv);
>> 
>> -- 
>> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6

2015-11-03 Thread Patrik Jakobsson
On Tue, Nov 03, 2015 at 03:08:41PM +0200, Jani Nikula wrote:
> On Tue, 03 Nov 2015, Patrik Jakobsson  
> wrote:
> > Signed-off-by: Patrik Jakobsson 
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h | 1 +
> >  drivers/gpu/drm/i915/i915_params.c  | 6 ++
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> >  3 files changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index efb6a00..9c8cb43 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2660,6 +2660,7 @@ struct i915_params {
> > int panel_use_ssc;
> > int vbt_sdvo_panel_type;
> > int enable_rc6;
> > +   int enable_dc6;
> > int enable_fbc;
> > int enable_ppgtt;
> > int enable_execlists;
> > diff --git a/drivers/gpu/drm/i915/i915_params.c 
> > b/drivers/gpu/drm/i915/i915_params.c
> > index 368df67..1a7dedf 100644
> > --- a/drivers/gpu/drm/i915/i915_params.c
> > +++ b/drivers/gpu/drm/i915/i915_params.c
> > @@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
> > .panel_use_ssc = -1,
> > .vbt_sdvo_panel_type = -1,
> > .enable_rc6 = -1,
> > +   .enable_dc6 = 1,
> > .enable_fbc = -1,
> > .enable_execlists = -1,
> > .enable_hangcheck = true,
> > @@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
> > "For example, 3 would enable rc6 and deep rc6, and 7 would enable 
> > everything. "
> > "default: -1 (use per-chip default)");
> >  
> > +module_param_named(enable_dc6, i915.enable_dc6, int, 0400);
> 
> _unsafe please.

Is the convention to taint for all non-default options in i915?

-Patrik

> 
> BR,
> Jani.
> 
> > +MODULE_PARM_DESC(enable_dc6,
> > +   "Enable power-saving display C-state 6. "
> > +   "(0 = disable; 1 = enable [default])");
> > +
> >  module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
> >  MODULE_PARM_DESC(enable_fbc,
> > "Enable frame buffer compression for power savings "
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 042d92f..4843c5c 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -753,7 +753,7 @@ static void skl_dc_off_power_well_enable(struct 
> > drm_i915_private *dev_priv,
> >  static void skl_dc_off_power_well_disable(struct drm_i915_private 
> > *dev_priv,
> >   struct i915_power_well *power_well)
> >  {
> > -   if (IS_SKYLAKE(dev_priv))
> > +   if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
> > skl_enable_dc6(dev_priv);
> > else
> > gen9_enable_dc5(dev_priv);
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6

2015-11-03 Thread Jani Nikula
On Tue, 03 Nov 2015, Patrik Jakobsson  wrote:
> Signed-off-by: Patrik Jakobsson 
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 1 +
>  drivers/gpu/drm/i915/i915_params.c  | 6 ++
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>  3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index efb6a00..9c8cb43 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2660,6 +2660,7 @@ struct i915_params {
>   int panel_use_ssc;
>   int vbt_sdvo_panel_type;
>   int enable_rc6;
> + int enable_dc6;
>   int enable_fbc;
>   int enable_ppgtt;
>   int enable_execlists;
> diff --git a/drivers/gpu/drm/i915/i915_params.c 
> b/drivers/gpu/drm/i915/i915_params.c
> index 368df67..1a7dedf 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
>   .panel_use_ssc = -1,
>   .vbt_sdvo_panel_type = -1,
>   .enable_rc6 = -1,
> + .enable_dc6 = 1,
>   .enable_fbc = -1,
>   .enable_execlists = -1,
>   .enable_hangcheck = true,
> @@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
>   "For example, 3 would enable rc6 and deep rc6, and 7 would enable 
> everything. "
>   "default: -1 (use per-chip default)");
>  
> +module_param_named(enable_dc6, i915.enable_dc6, int, 0400);

_unsafe please.

BR,
Jani.

> +MODULE_PARM_DESC(enable_dc6,
> + "Enable power-saving display C-state 6. "
> + "(0 = disable; 1 = enable [default])");
> +
>  module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
>  MODULE_PARM_DESC(enable_fbc,
>   "Enable frame buffer compression for power savings "
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 042d92f..4843c5c 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -753,7 +753,7 @@ static void skl_dc_off_power_well_enable(struct 
> drm_i915_private *dev_priv,
>  static void skl_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
>  {
> - if (IS_SKYLAKE(dev_priv))
> + if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
>   skl_enable_dc6(dev_priv);
>   else
>   gen9_enable_dc5(dev_priv);

-- 
Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


[Intel-gfx] [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6

2015-11-03 Thread Patrik Jakobsson
Signed-off-by: Patrik Jakobsson 
---
 drivers/gpu/drm/i915/i915_drv.h | 1 +
 drivers/gpu/drm/i915/i915_params.c  | 6 ++
 drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index efb6a00..9c8cb43 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2660,6 +2660,7 @@ struct i915_params {
int panel_use_ssc;
int vbt_sdvo_panel_type;
int enable_rc6;
+   int enable_dc6;
int enable_fbc;
int enable_ppgtt;
int enable_execlists;
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 368df67..1a7dedf 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
.panel_use_ssc = -1,
.vbt_sdvo_panel_type = -1,
.enable_rc6 = -1,
+   .enable_dc6 = 1,
.enable_fbc = -1,
.enable_execlists = -1,
.enable_hangcheck = true,
@@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
"For example, 3 would enable rc6 and deep rc6, and 7 would enable 
everything. "
"default: -1 (use per-chip default)");
 
+module_param_named(enable_dc6, i915.enable_dc6, int, 0400);
+MODULE_PARM_DESC(enable_dc6,
+   "Enable power-saving display C-state 6. "
+   "(0 = disable; 1 = enable [default])");
+
 module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
 MODULE_PARM_DESC(enable_fbc,
"Enable frame buffer compression for power savings "
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 042d92f..4843c5c 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -753,7 +753,7 @@ static void skl_dc_off_power_well_enable(struct 
drm_i915_private *dev_priv,
 static void skl_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
  struct i915_power_well *power_well)
 {
-   if (IS_SKYLAKE(dev_priv))
+   if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
skl_enable_dc6(dev_priv);
else
gen9_enable_dc5(dev_priv);
-- 
2.1.4

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx