On Fri, Sep 03, 2021 at 12:26:30AM +0530, Ayaz A Siddiqui wrote:
> Now there are lots of Command and registers that require mocs index
> programming.
> So propagating mocs_index from mocs to gt so that it can be
> used directly without having platform-specific checks.
>
> Cc: CQ Tang
> Cc: Matt Roper
> Signed-off-by: Ayaz A Siddiqui
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 4
> drivers/gpu/drm/i915/gt/intel_mocs.c | 13 +
> drivers/gpu/drm/i915/gt/intel_mocs.h | 1 +
> 4 files changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 62d40c9866427..2aeaae036a6f8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -682,6 +682,8 @@ int intel_gt_init(struct intel_gt *gt)
> goto err_pm;
> }
>
> + set_mocs_index(gt);
> +
> err = intel_engines_init(gt);
> if (err)
> goto err_engines;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index a81e21bf1bd1a..88601a2d2c229 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -192,6 +192,10 @@ struct intel_gt {
>
> unsigned long mslice_mask;
> } info;
> +
> + struct i915_mocs_index_gt {
I think I mentioned it on the v3 review too, but you can drop the
'i915_mocs_index_gt' name here since we don't reference it anywhere else
in the code that I can see. Just using an anonymous structure would be
fine.
Aside from that,
Reviewed-by: Matt Roper
> + u8 uc_index;
> + } mocs;
> };
>
> enum intel_gt_scratch_field {
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
> b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 582c4423b95d6..7ccac15d9a331 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -22,6 +22,7 @@ struct drm_i915_mocs_table {
> unsigned int size;
> unsigned int n_entries;
> const struct drm_i915_mocs_entry *table;
> + u8 uc_index;
> };
>
> /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */
> @@ -340,14 +341,18 @@ static unsigned int get_mocs_settings(const struct
> drm_i915_private *i915,
> {
> unsigned int flags;
>
> + memset(table, 0, sizeof(struct drm_i915_mocs_table));
> +
> if (IS_DG1(i915)) {
> table->size = ARRAY_SIZE(dg1_mocs_table);
> table->table = dg1_mocs_table;
> + table->uc_index = 1;
> table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> } else if (GRAPHICS_VER(i915) >= 12) {
> table->size = ARRAY_SIZE(tgl_mocs_table);
> table->table = tgl_mocs_table;
> table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> + table->uc_index = 3;
> } else if (GRAPHICS_VER(i915) == 11) {
> table->size = ARRAY_SIZE(icl_mocs_table);
> table->table = icl_mocs_table;
> @@ -504,6 +509,14 @@ static u32 global_mocs_offset(void)
> return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0));
> }
>
> +void set_mocs_index(struct intel_gt *gt)
> +{
> + struct drm_i915_mocs_table table;
> +
> + get_mocs_settings(gt->i915, );
> + gt->mocs.uc_index = table.uc_index;
> +}
> +
> void intel_mocs_init(struct intel_gt *gt)
> {
> struct drm_i915_mocs_table table;
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.h
> b/drivers/gpu/drm/i915/gt/intel_mocs.h
> index d83274f5163bd..8a09d64b115f7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.h
> @@ -36,5 +36,6 @@ struct intel_gt;
>
> void intel_mocs_init(struct intel_gt *gt);
> void intel_mocs_init_engine(struct intel_engine_cs *engine);
> +void set_mocs_index(struct intel_gt *gt);
>
> #endif
> --
> 2.26.2
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
