Re: [Intel-gfx] [PATCH i-g-t 1/2] benchmarks/gem_wsim: Command submission workload simulator

2017-03-31 Thread Chris Wilson
On Fri, Mar 31, 2017 at 03:58:25PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> Tool which emits batch buffers to engines with configurable
> sequences, durations, contexts, dependencies and userspace waits.
> 
> Unfinished but shows promise so sending out for early feedback.
> 
> v2:
>  * Load workload descriptors from files. (also -w)
>  * Help text.
>  * Calibration control if needed. (-t)
>  * NORELOC | LUT to eb flags.
>  * Added sample workload to wsim/workload1.
> 
> TODO list:
> 
>  * Better error handling.
>  * Multi-context support for individual clients.

I think that will also wants multiple dependencies. 

>  * Random/variable batch length.
>  * Load balancing plug-in.
>  * ... ?

Waits and delayed execution cycles.

Multiple clients (as threads).

-- 
Chris Wilson, Intel Open Source Technology Centre
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[Intel-gfx] [PATCH i-g-t 1/2] benchmarks/gem_wsim: Command submission workload simulator

2017-03-31 Thread Tvrtko Ursulin
From: Tvrtko Ursulin 

Tool which emits batch buffers to engines with configurable
sequences, durations, contexts, dependencies and userspace waits.

Unfinished but shows promise so sending out for early feedback.

v2:
 * Load workload descriptors from files. (also -w)
 * Help text.
 * Calibration control if needed. (-t)
 * NORELOC | LUT to eb flags.
 * Added sample workload to wsim/workload1.

TODO list:

 * Better error handling.
 * Multi-context support for individual clients.
 * Random/variable batch length.
 * Load balancing plug-in.
 * ... ?

Signed-off-by: Tvrtko Ursulin 
Cc: Chris Wilson 
Cc: "Rogozhkin, Dmitry V" 

gem_wsim updates

Signed-off-by: Tvrtko Ursulin 
---
 benchmarks/Makefile.sources |   1 +
 benchmarks/gem_wsim.c   | 593 
 benchmarks/wsim/workload1   |   7 +
 3 files changed, 601 insertions(+)
 create mode 100644 benchmarks/gem_wsim.c
 create mode 100644 benchmarks/wsim/workload1

diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index 3af54ebe36f2..3a941150abb3 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -14,6 +14,7 @@ benchmarks_prog_list =\
gem_prw \
gem_set_domain  \
gem_syslatency  \
+   gem_wsim\
kms_vblank  \
prime_lookup\
vgem_mmap   \
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
new file mode 100644
index ..029967281251
--- /dev/null
+++ b/benchmarks/gem_wsim.c
@@ -0,0 +1,593 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "drm.h"
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "intel_io.h"
+
+struct w_step
+{
+   /* Workload step metadata */
+   unsigned int context;
+   unsigned int engine;
+   unsigned int duration;
+   int dependency;
+   int wait;
+
+   /* Implementation details */
+   struct drm_i915_gem_execbuffer2 eb;
+   struct drm_i915_gem_exec_object2 obj[3];
+};
+
+struct workload
+{
+   unsigned int nr_steps;
+   struct w_step *steps;
+
+   uint32_t ctx_id;
+};
+
+enum intel_engine_id {
+   RCS,
+   BCS,
+   balance_VCS,
+   VCS,
+   VCS1,
+   VCS2,
+   VECS,
+   NUM_ENGINES
+};
+
+static const unsigned int eb_engine_map[NUM_ENGINES] = {
+   [RCS] = I915_EXEC_RENDER,
+   [BCS] = I915_EXEC_BLT,
+   [balance_VCS] = I915_EXEC_BSD,
+   [VCS] = I915_EXEC_BSD,
+   [VCS1] = I915_EXEC_BSD | I915_EXEC_BSD_RING1,
+   [VCS2] = I915_EXEC_BSD | I915_EXEC_BSD_RING2,
+   [VECS] = I915_EXEC_VEBOX };
+
+static const uint32_t bbe = 0xa << 23;
+static const unsigned int nop_calibration_us = 1000;
+static unsigned long nop_calibration;
+
+static bool quiet;
+static int fd;
+
+/*
+ * Workload descriptor:
+ *
+ * ctx.engine.duration.dependency.wait,...
+ * <0|1>,...
+ *
+ * Engine ids: RCS, BCS, VCS, VCS1, VCS2, VECS
+ *
+ * 
"1.VCS1.3000.0.1,1.RCS.1000.-1.0,1.RCS.3700.0.0,1.RCS.1000.-2.0,1.VCS2.2300.-2.0,1.RCS.4700.-1.0,1.VCS2.600.-1.1"
+ */
+
+static struct workload *parse_workload(char *desc)
+{
+   struct workload *wrk;
+   unsigned int nr_steps = 0;
+   char *token, *tctx, *tstart = desc;
+   char *field, *fctx, *fstart;
+   struct w_step step, *steps = NULL;
+   unsigned int valid;
+   int tmp;
+
+   while ((token = strtok_r(tstart, ",", &tctx)) != NULL) {
+   tstart = NULL;
+   fstart = token;
+   valid = 0;
+
+   if ((field = strtok_r(fstart, ".", &fctx)) !=