[Intel-gfx] [PATCH i-g-t 2/2] tests: Add test for pipe B and C interactions in IVB

2015-03-30 Thread Ander Conselvan de Oliveira 
The tests exercise different combinations of enabling pipe B with modes
that require more than 2 lanes and then enabling pipe C.

v2: Added a couple more tests for different pipe transitions. (Ander)
Use custom modes to make the test reliable. (Daniel)

v3: Add IGT_TEST_DESCRIPTION. (Thomas)
Add test to .gitignore. (Thomas)
Rename test to kms_pipe_b_c_ivb. (Ander)
---
 tests/.gitignore |   1 +
 tests/Makefile.sources   |   1 +
 tests/kms_pipe_b_c_ivb.c | 290 +++
 3 files changed, 292 insertions(+)
 create mode 100644 tests/kms_pipe_b_c_ivb.c

diff --git a/tests/.gitignore b/tests/.gitignore
index 843db4a..1f0e2d1 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -132,6 +132,7 @@ kms_flip_event_leak
 kms_flip_tiling
 kms_force_connector
 kms_mmio_vs_cs_flip
+kms_pipe_b_c_ivb
 kms_pipe_crc_basic
 kms_plane
 kms_psr_sink_crc
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 0a974a6..93e05e4 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -75,6 +75,7 @@ TESTS_progs_M = \
kms_flip_tiling \
kms_flip_event_leak \
kms_mmio_vs_cs_flip \
+   kms_pipe_b_c_ivb \
kms_pipe_crc_basic \
kms_plane \
kms_psr_sink_crc \
diff --git a/tests/kms_pipe_b_c_ivb.c b/tests/kms_pipe_b_c_ivb.c
new file mode 100644
index 000..74d84f1
--- /dev/null
+++ b/tests/kms_pipe_b_c_ivb.c
@@ -0,0 +1,290 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *   Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
+ */
+
+#include drmtest.h
+#include igt_kms.h
+#include intel_chipset.h
+
+IGT_TEST_DESCRIPTION(
+Exercise the FDI lane bifurcation code for IVB in the kernel by setting
+different combinations of modes for pipes B and C.);
+
+typedef struct {
+   int drm_fd;
+   igt_display_t display;
+} data_t;
+
+drmModeModeInfo mode_3_lanes = {
+   .clock = 173000,
+   .hdisplay = 1920,
+   .hsync_start = 2048,
+   .hsync_end = 2248,
+   .htotal = 2576,
+   .vdisplay = 1080,
+   .vsync_start = 1083,
+   .vsync_end = 1088,
+   .vtotal = 1120,
+   .vrefresh = 60,
+   .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
+   .name = 3_lanes,
+};
+
+drmModeModeInfo mode_2_lanes = {
+   .clock = 138500,
+   .hdisplay = 1920,
+   .hsync_start = 1968,
+   .hsync_end = 2000,
+   .htotal = 2080,
+   .vdisplay = 1080,
+   .vsync_start = 1083,
+   .vsync_end = 1088,
+   .vtotal = ,
+   .vrefresh = 60,
+   .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
+   .name = 2_lanes,
+};
+
+static int
+disable_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
+{
+   igt_plane_t *primary;
+
+   igt_output_set_pipe(output, pipe);
+   primary = igt_output_get_plane(output, 0);
+   igt_plane_set_fb(primary, NULL);
+   return igt_display_commit(data-display);
+}
+
+static int
+set_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
+{
+   igt_plane_t *primary;
+   drmModeModeInfo *mode;
+   struct igt_fb fb;
+   int fb_id;
+
+   igt_output_set_pipe(output, pipe);
+
+   mode = igt_output_get_mode(output);
+
+   primary = igt_output_get_plane(output, 0);
+
+   fb_id = igt_create_color_fb(data-drm_fd,
+   mode-hdisplay, mode-vdisplay,
+   DRM_FORMAT_XRGB, I915_TILING_NONE,
+   1.0, 1.0, 1.0, fb);
+   igt_assert(fb_id = 0);
+
+   igt_plane_set_fb(primary, fb);
+   return igt_display_try_commit2(data-display, COMMIT_LEGACY);
+}
+
+static int
+set_big_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
+{
+   igt_output_override_mode(output, mode_3_lanes);
+   return

Re: [Intel-gfx] [PATCH i-g-t 2/2] tests: Add test for pipe B and C interactions in IVB

2015-03-30 Thread Thomas Wood 
On 30 March 2015 at 08:03, Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com wrote:
 The tests exercise different combinations of enabling pipe B with modes
 that require more than 2 lanes and then enabling pipe C.

 v2: Added a couple more tests for different pipe transitions. (Ander)
 Use custom modes to make the test reliable. (Daniel)

 v3: Add IGT_TEST_DESCRIPTION. (Thomas)
 Add test to .gitignore. (Thomas)
 Rename test to kms_pipe_b_c_ivb. (Ander)
 ---
  tests/.gitignore |   1 +
  tests/Makefile.sources   |   1 +
  tests/kms_pipe_b_c_ivb.c | 290 
 +++
  3 files changed, 292 insertions(+)
  create mode 100644 tests/kms_pipe_b_c_ivb.c

 diff --git a/tests/.gitignore b/tests/.gitignore
 index 843db4a..1f0e2d1 100644
 --- a/tests/.gitignore
 +++ b/tests/.gitignore
 @@ -132,6 +132,7 @@ kms_flip_event_leak
  kms_flip_tiling
  kms_force_connector
  kms_mmio_vs_cs_flip
 +kms_pipe_b_c_ivb
  kms_pipe_crc_basic
  kms_plane
  kms_psr_sink_crc
 diff --git a/tests/Makefile.sources b/tests/Makefile.sources
 index 0a974a6..93e05e4 100644
 --- a/tests/Makefile.sources
 +++ b/tests/Makefile.sources
 @@ -75,6 +75,7 @@ TESTS_progs_M = \
 kms_flip_tiling \
 kms_flip_event_leak \
 kms_mmio_vs_cs_flip \
 +   kms_pipe_b_c_ivb \
 kms_pipe_crc_basic \
 kms_plane \
 kms_psr_sink_crc \
 diff --git a/tests/kms_pipe_b_c_ivb.c b/tests/kms_pipe_b_c_ivb.c
 new file mode 100644
 index 000..74d84f1
 --- /dev/null
 +++ b/tests/kms_pipe_b_c_ivb.c
 @@ -0,0 +1,290 @@
 +/*
 + * Copyright © 2015 Intel Corporation
 + *
 + * Permission is hereby granted, free of charge, to any person obtaining a
 + * copy of this software and associated documentation files (the Software),
 + * to deal in the Software without restriction, including without limitation
 + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 + * and/or sell copies of the Software, and to permit persons to whom the
 + * Software is furnished to do so, subject to the following conditions:
 + *
 + * The above copyright notice and this permission notice (including the next
 + * paragraph) shall be included in all copies or substantial portions of the
 + * Software.
 + *
 + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
 DEALINGS
 + * IN THE SOFTWARE.
 + *
 + * Authors:
 + *   Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
 + */
 +
 +#include drmtest.h
 +#include igt_kms.h
 +#include intel_chipset.h
 +
 +IGT_TEST_DESCRIPTION(
 +Exercise the FDI lane bifurcation code for IVB in the kernel by setting
 +different combinations of modes for pipes B and C.);
 +
 +typedef struct {
 +   int drm_fd;
 +   igt_display_t display;
 +} data_t;
 +
 +drmModeModeInfo mode_3_lanes = {
 +   .clock = 173000,
 +   .hdisplay = 1920,
 +   .hsync_start = 2048,
 +   .hsync_end = 2248,
 +   .htotal = 2576,
 +   .vdisplay = 1080,
 +   .vsync_start = 1083,
 +   .vsync_end = 1088,
 +   .vtotal = 1120,
 +   .vrefresh = 60,
 +   .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
 +   .name = 3_lanes,
 +};
 +
 +drmModeModeInfo mode_2_lanes = {
 +   .clock = 138500,
 +   .hdisplay = 1920,
 +   .hsync_start = 1968,
 +   .hsync_end = 2000,
 +   .htotal = 2080,
 +   .vdisplay = 1080,
 +   .vsync_start = 1083,
 +   .vsync_end = 1088,
 +   .vtotal = ,
 +   .vrefresh = 60,
 +   .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
 +   .name = 2_lanes,
 +};
 +
 +static int
 +disable_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
 +{
 +   igt_plane_t *primary;
 +
 +   igt_output_set_pipe(output, pipe);
 +   primary = igt_output_get_plane(output, 0);
 +   igt_plane_set_fb(primary, NULL);
 +   return igt_display_commit(data-display);
 +}
 +
 +static int
 +set_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
 +{
 +   igt_plane_t *primary;
 +   drmModeModeInfo *mode;
 +   struct igt_fb fb;
 +   int fb_id;
 +
 +   igt_output_set_pipe(output, pipe);
 +
 +   mode = igt_output_get_mode(output);
 +
 +   primary = igt_output_get_plane(output, 0);
 +
 +   fb_id = igt_create_color_fb(data-drm_fd,
 +   mode-hdisplay, mode-vdisplay,
 +   DRM_FORMAT_XRGB, I915_TILING_NONE,
 +   1.0, 1.0, 1.0, fb);
 +   igt_assert(fb_id = 0);
 +
 +   igt_plane_set_fb(primary, fb);