Re: [Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL
On Mon, Feb 03, 2020 at 01:06:24AM +0200, Stanislav Lisovskiy wrote: > Those patch series, do some initial preparation DBuf manipulating code > cleanups, i.e remove redundant structures/code, switch to mask > based DBuf manupulation, get into use DBuf assignment according to > BSpec rules. > > Stanislav Lisovskiy (6): > drm/i915: Remove skl_ddl_allocation struct > drm/i915: Move dbuf slice update to proper place > drm/i915: Update dbuf slices only with full modeset > drm/i915: Introduce parameterized DBUF_CTL > drm/i915: Manipulate DBuf slices properly > drm/i915: Correctly map DBUF slices to pipes Pushed the lot to dinq. Thanks for the patches and reviews. > > drivers/gpu/drm/i915/display/intel_display.c | 54 ++- > .../drm/i915/display/intel_display_power.c| 100 ++-- > .../drm/i915/display/intel_display_power.h| 5 + > .../drm/i915/display/intel_display_types.h| 4 +- > drivers/gpu/drm/i915/gvt/handlers.c | 2 +- > drivers/gpu/drm/i915/i915_drv.h | 11 +- > drivers/gpu/drm/i915/i915_pci.c | 5 +- > drivers/gpu/drm/i915/i915_reg.h | 6 +- > drivers/gpu/drm/i915/intel_device_info.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 449 +++--- > drivers/gpu/drm/i915/intel_pm.h | 5 +- > 11 files changed, 479 insertions(+), 163 deletions(-) > > -- > 2.24.1.485.gad05a3d8e5 -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL
Those patch series, do some initial preparation DBuf manipulating code cleanups, i.e remove redundant structures/code, switch to mask based DBuf manupulation, get into use DBuf assignment according to BSpec rules. Stanislav Lisovskiy (6): drm/i915: Remove skl_ddl_allocation struct drm/i915: Move dbuf slice update to proper place drm/i915: Update dbuf slices only with full modeset drm/i915: Introduce parameterized DBUF_CTL drm/i915: Manipulate DBuf slices properly drm/i915: Correctly map DBUF slices to pipes drivers/gpu/drm/i915/display/intel_display.c | 54 ++- .../drm/i915/display/intel_display_power.c| 100 ++-- .../drm/i915/display/intel_display_power.h| 5 + .../drm/i915/display/intel_display_types.h| 4 +- drivers/gpu/drm/i915/gvt/handlers.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 11 +- drivers/gpu/drm/i915/i915_pci.c | 5 +- drivers/gpu/drm/i915/i915_reg.h | 6 +- drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 449 +++--- drivers/gpu/drm/i915/intel_pm.h | 5 +- 11 files changed, 479 insertions(+), 163 deletions(-) -- 2.24.1.485.gad05a3d8e5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL
Those patch series, do some initial preparation DBuf manipulating code cleanups, i.e remove redundant structures/code, switch to mask based DBuf manupulation, get into use DBuf assignment according to BSpec rules. Stanislav Lisovskiy (6): drm/i915: Remove skl_ddl_allocation struct drm/i915: Move dbuf slice update to proper place drm/i915: Update dbuf slices only with full modeset drm/i915: Introduce parameterized DBUF_CTL drm/i915: Manipulate DBuf slices properly drm/i915: Correctly map DBUF slices to pipes drivers/gpu/drm/i915/display/intel_display.c | 54 ++- .../drm/i915/display/intel_display_power.c| 100 ++-- .../drm/i915/display/intel_display_power.h| 5 + .../drm/i915/display/intel_display_types.h| 4 +- drivers/gpu/drm/i915/gvt/handlers.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 11 +- drivers/gpu/drm/i915/i915_pci.c | 5 +- drivers/gpu/drm/i915/i915_reg.h | 6 +- drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 449 +++--- drivers/gpu/drm/i915/intel_pm.h | 5 +- 11 files changed, 479 insertions(+), 163 deletions(-) -- 2.24.1.485.gad05a3d8e5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
