Re: [Intel-gfx] [PATCH v2] drm/i915: Consistently use enum pipe for PCH transcoders
El Wed, Jul 19, 2017 at 08:30:36AM +0200 Daniel Vetter ha dit: > On Tue, Jul 18, 2017 at 01:48:53PM -0700, Matthias Kaehlcke wrote: > > Hi Daniel, > > > > El Tue, Jul 18, 2017 at 08:39:50AM +0200 Daniel Vetter ha dit: > > > > > On Mon, Jul 17, 2017 at 11:14:03AM -0700, Matthias Kaehlcke wrote: > > > > The current code uses in some instances enum transcoder for PCH > > > > transcoders and enum pipe in others. This is error prone and clang > > > > raises warnings like this: > > > > > > > > drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion > > > > from enumeration type 'enum pipe' to different enumeration type > > > > 'enum transcoder' [-Wenum-conversion] > > > > intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); > > > > > > > > Consistently use the type enum pipe for PCH transcoders. > > > > > > > > Signed-off-by: Matthias Kaehlcke > > > > > > Somehow git apply-mbox could parse it, but manually applying using patch > > > worked. Not sure what's going on, maybe double-check it's all right. > > > > Not sure what happened, one of the patch fragments only has one '@' > > instead of two, with that fixed the patch applies. > > > > Unfortunately the manual application missed some fragments: > > > > drivers/gpu/drm/i915/intel_display.c:5350:51: warning: implicit > > conversion from enumeration type 'enum transcoder' to different > > enumeration type 'enum pipe' [-Wenum-conversion] > > intel_set_pch_fifo_underrun_reporting(dev_priv, > > TRANSCODER_A, > > ~ ^~~~ > > drivers/gpu/drm/i915/intel_display.c:5436:51: warning: implicit > > conversion from enumeration type 'enum transcoder' to different > > enumeration type 'enum pipe' [-Wenum-conversion] > > intel_set_pch_fifo_underrun_reporting(dev_priv, > > TRANSCODER_A, > > ~ ^~~~ > > drivers/gpu/drm/i915/intel_display.c:5534:51: warning: implicit > > conversion from enumeration type 'enum transcoder' to different > > enumeration type 'enum pipe' [-Wenum-conversion] > > intel_set_pch_fifo_underrun_reporting(dev_priv, > > TRANSCODER_A, > > ~ ^~~~ > > drivers/gpu/drm/i915/intel_display.c:5563:51: warning: implicit > > conversion from enumeration type 'enum transcoder' to different > > enumeration type 'enum pipe' [-Wenum-conversion] > > intel_set_pch_fifo_underrun_reporting(dev_priv, > > TRANSCODER_A, > > > > > > What would be the best way forward from here? Revert the manual > > application and apply again, or a fixup patch? > > Drat I screwed up :-( drm-intel-next-queued is non-rebasing, that means I > need a fixup patch. I should have checked more carefully that I have all > the hunks, but patch -p1 seemed happy ... Ok, I will send a fixup patch shortly Matthias ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Consistently use enum pipe for PCH transcoders
On Tue, Jul 18, 2017 at 01:48:53PM -0700, Matthias Kaehlcke wrote:
> Hi Daniel,
>
> El Tue, Jul 18, 2017 at 08:39:50AM +0200 Daniel Vetter ha dit:
>
> > On Mon, Jul 17, 2017 at 11:14:03AM -0700, Matthias Kaehlcke wrote:
> > > The current code uses in some instances enum transcoder for PCH
> > > transcoders and enum pipe in others. This is error prone and clang
> > > raises warnings like this:
> > >
> > > drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion
> > > from enumeration type 'enum pipe' to different enumeration type
> > > 'enum transcoder' [-Wenum-conversion]
> > > intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> > >
> > > Consistently use the type enum pipe for PCH transcoders.
> > >
> > > Signed-off-by: Matthias Kaehlcke
> >
> > Somehow git apply-mbox could parse it, but manually applying using patch
> > worked. Not sure what's going on, maybe double-check it's all right.
>
> Not sure what happened, one of the patch fragments only has one '@'
> instead of two, with that fixed the patch applies.
>
> Unfortunately the manual application missed some fragments:
>
> drivers/gpu/drm/i915/intel_display.c:5350:51: warning: implicit
> conversion from enumeration type 'enum transcoder' to different
> enumeration type 'enum pipe' [-Wenum-conversion]
> intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> ~ ^~~~
> drivers/gpu/drm/i915/intel_display.c:5436:51: warning: implicit
> conversion from enumeration type 'enum transcoder' to different
> enumeration type 'enum pipe' [-Wenum-conversion]
> intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> ~ ^~~~
> drivers/gpu/drm/i915/intel_display.c:5534:51: warning: implicit
> conversion from enumeration type 'enum transcoder' to different
> enumeration type 'enum pipe' [-Wenum-conversion]
> intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> ~ ^~~~
> drivers/gpu/drm/i915/intel_display.c:5563:51: warning: implicit
> conversion from enumeration type 'enum transcoder' to different
> enumeration type 'enum pipe' [-Wenum-conversion]
> intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
>
>
> What would be the best way forward from here? Revert the manual
> application and apply again, or a fixup patch?
Drat I screwed up :-( drm-intel-next-queued is non-rebasing, that means I
need a fixup patch. I should have checked more carefully that I have all
the hunks, but patch -p1 seemed happy ...
-Daniel
>
> Matthias
>
> > > ---
> > > Changes in v2:
> > > - rebased on drm-intel/drm-intel-next-queued
> > >
> > > drivers/gpu/drm/i915/i915_irq.c| 10 +-
> > > drivers/gpu/drm/i915/intel_display.c | 24 ++--
> > > drivers/gpu/drm/i915/intel_drv.h | 6 +++---
> > > drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +++---
> > > 4 files changed, 21 insertions(+), 25 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > > b/drivers/gpu/drm/i915/i915_irq.c
> > > index 1d33cea01a1b..0b6f310101ee 100644
> > > --- a/drivers/gpu/drm/i915/i915_irq.c
> > > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > > @@ -2086,10 +2086,10 @@ static void ibx_irq_handler(struct
> > > drm_i915_private *dev_priv, u32 pch_iir)
> > > DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
> > >
> > > if (pch_iir & SDE_TRANSA_FIFO_UNDER)
> > > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> > > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
> > >
> > > if (pch_iir & SDE_TRANSB_FIFO_UNDER)
> > > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> > > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
> > > }
> > >
> > > static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
> > > @@ -2123,13 +2123,13 @@ static void cpt_serr_int_handler(struct
> > > drm_i915_private *dev_priv)
> > > DRM_ERROR("PCH poison interrupt\n");
> > >
> > > if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
> > > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> > > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
> > >
> > > if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
> > > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> > > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
> > >
> > > if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
> > > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_C);
> > > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_C);
> > >
> > > I915_WRITE(SERR_INT, serr_int);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/
Re: [Intel-gfx] [PATCH v2] drm/i915: Consistently use enum pipe for PCH transcoders
Hi Daniel,
El Tue, Jul 18, 2017 at 08:39:50AM +0200 Daniel Vetter ha dit:
> On Mon, Jul 17, 2017 at 11:14:03AM -0700, Matthias Kaehlcke wrote:
> > The current code uses in some instances enum transcoder for PCH
> > transcoders and enum pipe in others. This is error prone and clang
> > raises warnings like this:
> >
> > drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion
> > from enumeration type 'enum pipe' to different enumeration type
> > 'enum transcoder' [-Wenum-conversion]
> > intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> >
> > Consistently use the type enum pipe for PCH transcoders.
> >
> > Signed-off-by: Matthias Kaehlcke
>
> Somehow git apply-mbox could parse it, but manually applying using patch
> worked. Not sure what's going on, maybe double-check it's all right.
Not sure what happened, one of the patch fragments only has one '@'
instead of two, with that fixed the patch applies.
Unfortunately the manual application missed some fragments:
drivers/gpu/drm/i915/intel_display.c:5350:51: warning: implicit
conversion from enumeration type 'enum transcoder' to different
enumeration type 'enum pipe' [-Wenum-conversion]
intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
~ ^~~~
drivers/gpu/drm/i915/intel_display.c:5436:51: warning: implicit
conversion from enumeration type 'enum transcoder' to different
enumeration type 'enum pipe' [-Wenum-conversion]
intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
~ ^~~~
drivers/gpu/drm/i915/intel_display.c:5534:51: warning: implicit
conversion from enumeration type 'enum transcoder' to different
enumeration type 'enum pipe' [-Wenum-conversion]
intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
~ ^~~~
drivers/gpu/drm/i915/intel_display.c:5563:51: warning: implicit
conversion from enumeration type 'enum transcoder' to different
enumeration type 'enum pipe' [-Wenum-conversion]
intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
What would be the best way forward from here? Revert the manual
application and apply again, or a fixup patch?
Matthias
> > ---
> > Changes in v2:
> > - rebased on drm-intel/drm-intel-next-queued
> >
> > drivers/gpu/drm/i915/i915_irq.c| 10 +-
> > drivers/gpu/drm/i915/intel_display.c | 24 ++--
> > drivers/gpu/drm/i915/intel_drv.h | 6 +++---
> > drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +++---
> > 4 files changed, 21 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > b/drivers/gpu/drm/i915/i915_irq.c
> > index 1d33cea01a1b..0b6f310101ee 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -2086,10 +2086,10 @@ static void ibx_irq_handler(struct drm_i915_private
> > *dev_priv, u32 pch_iir)
> > DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
> >
> > if (pch_iir & SDE_TRANSA_FIFO_UNDER)
> > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
> >
> > if (pch_iir & SDE_TRANSB_FIFO_UNDER)
> > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
> > }
> >
> > static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
> > @@ -2123,13 +2123,13 @@ static void cpt_serr_int_handler(struct
> > drm_i915_private *dev_priv)
> > DRM_ERROR("PCH poison interrupt\n");
> >
> > if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
> > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
> >
> > if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
> > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
> >
> > if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
> > - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_C);
> > + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_C);
> >
> > I915_WRITE(SERR_INT, serr_int);
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index bb9c9c3c391f..5c7054c3be0e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1777,7 +1777,7 @@ static void lpt_enable_pch_transcoder(struct
> > drm_i915_private *dev_priv,
> >
> > /* FDI must be feeding us bits for PCH ports */
> > assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder
Re: [Intel-gfx] [PATCH v2] drm/i915: Consistently use enum pipe for PCH transcoders
On Mon, Jul 17, 2017 at 11:14:03AM -0700, Matthias Kaehlcke wrote:
> The current code uses in some instances enum transcoder for PCH
> transcoders and enum pipe in others. This is error prone and clang
> raises warnings like this:
>
> drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion
> from enumeration type 'enum pipe' to different enumeration type
> 'enum transcoder' [-Wenum-conversion]
> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
>
> Consistently use the type enum pipe for PCH transcoders.
>
> Signed-off-by: Matthias Kaehlcke
Somehow git apply-mbox could parse it, but manually applying using patch
worked. Not sure what's going on, maybe double-check it's all right.
Thanks, Daniel
> ---
> Changes in v2:
> - rebased on drm-intel/drm-intel-next-queued
>
> drivers/gpu/drm/i915/i915_irq.c| 10 +-
> drivers/gpu/drm/i915/intel_display.c | 24 ++--
> drivers/gpu/drm/i915/intel_drv.h | 6 +++---
> drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +++---
> 4 files changed, 21 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1d33cea01a1b..0b6f310101ee 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2086,10 +2086,10 @@ static void ibx_irq_handler(struct drm_i915_private
> *dev_priv, u32 pch_iir)
> DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
>
> if (pch_iir & SDE_TRANSA_FIFO_UNDER)
> - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
>
> if (pch_iir & SDE_TRANSB_FIFO_UNDER)
> - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
> }
>
> static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
> @@ -2123,13 +2123,13 @@ static void cpt_serr_int_handler(struct
> drm_i915_private *dev_priv)
> DRM_ERROR("PCH poison interrupt\n");
>
> if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
> - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
> + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
>
> if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
> - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
> + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
>
> if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
> - intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_C);
> + intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_C);
>
> I915_WRITE(SERR_INT, serr_int);
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index bb9c9c3c391f..5c7054c3be0e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1777,7 +1777,7 @@ static void lpt_enable_pch_transcoder(struct
> drm_i915_private *dev_priv,
>
> /* FDI must be feeding us bits for PCH ports */
> assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder);
> - assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
> + assert_fdi_rx_enabled(dev_priv, PIPE_A);
>
> /* Workaround: set timing override bit. */
> val = I915_READ(TRANS_CHICKEN2(PIPE_A));
> @@ -1853,16 +1853,16 @@ void lpt_disable_pch_transcoder(struct
> drm_i915_private *dev_priv)
> I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);
> }
>
> -enum transcoder intel_crtc_pch_transcoder(struct intel_crtc *crtc)
> +enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> WARN_ON(!crtc->config->has_pch_encoder);
>
> if (HAS_PCH_LPT(dev_priv))
> - return TRANSCODER_A;
> + return PIPE_A;
> else
> - return (enum transcoder) crtc->pipe;
> + return crtc->pipe;
> }
>
> /**
> @@ -1901,7 +1901,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
> if (crtc->config->has_pch_encoder) {
> /* if driving the PCH, we need FDI enabled */
> assert_fdi_rx_pll_enabled(dev_priv,
> - (enum pipe)
> intel_crtc_pch_transcoder(crtc));
> +
> intel_crtc_pch_transcoder(crtc));
> assert_fdi_tx_pll_enabled(dev_priv,
> (enum pipe) cpu_transcoder);
> }
> @@ -4579,7 +4579,7 @@ static void lpt_pch_enable(const struct
> intel_crtc_state *crtc_state)
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>
> - assert_pch_transcoder_disabled(dev_priv,
[Intel-gfx] [PATCH v2] drm/i915: Consistently use enum pipe for PCH transcoders
The current code uses in some instances enum transcoder for PCH
transcoders and enum pipe in others. This is error prone and clang
raises warnings like this:
drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion
from enumeration type 'enum pipe' to different enumeration type
'enum transcoder' [-Wenum-conversion]
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
Consistently use the type enum pipe for PCH transcoders.
Signed-off-by: Matthias Kaehlcke
---
Changes in v2:
- rebased on drm-intel/drm-intel-next-queued
drivers/gpu/drm/i915/i915_irq.c| 10 +-
drivers/gpu/drm/i915/intel_display.c | 24 ++--
drivers/gpu/drm/i915/intel_drv.h | 6 +++---
drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +++---
4 files changed, 21 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1d33cea01a1b..0b6f310101ee 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2086,10 +2086,10 @@ static void ibx_irq_handler(struct drm_i915_private
*dev_priv, u32 pch_iir)
DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
if (pch_iir & SDE_TRANSA_FIFO_UNDER)
- intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
+ intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
if (pch_iir & SDE_TRANSB_FIFO_UNDER)
- intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
+ intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
}
static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
@@ -2123,13 +2123,13 @@ static void cpt_serr_int_handler(struct
drm_i915_private *dev_priv)
DRM_ERROR("PCH poison interrupt\n");
if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
- intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
+ intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
- intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
+ intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
- intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_C);
+ intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_C);
I915_WRITE(SERR_INT, serr_int);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bb9c9c3c391f..5c7054c3be0e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1777,7 +1777,7 @@ static void lpt_enable_pch_transcoder(struct
drm_i915_private *dev_priv,
/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder);
- assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
+ assert_fdi_rx_enabled(dev_priv, PIPE_A);
/* Workaround: set timing override bit. */
val = I915_READ(TRANS_CHICKEN2(PIPE_A));
@@ -1853,16 +1853,16 @@ void lpt_disable_pch_transcoder(struct drm_i915_private
*dev_priv)
I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);
}
-enum transcoder intel_crtc_pch_transcoder(struct intel_crtc *crtc)
+enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
WARN_ON(!crtc->config->has_pch_encoder);
if (HAS_PCH_LPT(dev_priv))
- return TRANSCODER_A;
+ return PIPE_A;
else
- return (enum transcoder) crtc->pipe;
+ return crtc->pipe;
}
/**
@@ -1901,7 +1901,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
if (crtc->config->has_pch_encoder) {
/* if driving the PCH, we need FDI enabled */
assert_fdi_rx_pll_enabled(dev_priv,
- (enum pipe)
intel_crtc_pch_transcoder(crtc));
+
intel_crtc_pch_transcoder(crtc));
assert_fdi_tx_pll_enabled(dev_priv,
(enum pipe) cpu_transcoder);
}
@@ -4579,7 +4579,7 @@ static void lpt_pch_enable(const struct intel_crtc_state
*crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- assert_pch_transcoder_disabled(dev_priv, TRANSCODER_A);
+ assert_pch_transcoder_disabled(dev_priv, PIPE_A);
lpt_program_iclkip(crtc);
@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state
*pipe_config,
return;
if (intel_crtc->config->has_pch_encoder)
- intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
-
