Re: [Intel-gfx] [PATCH v2] drm/i915: Fix eDP blank screen after S3 resume on HP desktops
On Thu, Jun 21, 2012 at 03:30:41PM +0200, Takashi Iwai wrote: > This patch fixes the problem on some HP desktop machines with eDP > which give blank screens after S3 resume. > > It turned out that BLC_PWM_CPU_CTL must be written after > BLC_PWM_CPU_CTL2. Otherwise it doesn't take effect on these > SNB machines. > > Tested with 3.5-rc3 kernel. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49233 > > Cc: > Signed-off-by: Takashi Iwai Picked up for -fixes, thanks for the patch. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Fix eDP blank screen after S3 resume on HP desktops
Am Donnerstag, den 21.06.2012, 15:30 +0200 schrieb Takashi Iwai: > This patch fixes the problem on some HP desktop machines with eDP > which give blank screens after S3 resume. > > It turned out that BLC_PWM_CPU_CTL must be written after > BLC_PWM_CPU_CTL2. Otherwise it doesn't take effect on these > SNB machines. > > Tested with 3.5-rc3 kernel. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49233 Hmm, the bug entry does not contain a link to the discussion on intel-gfx. http://lists.freedesktop.org/archives/intel-gfx/2012-June/018418.html Maybe add it there or to the commit message. > Cc: > Signed-off-by: Takashi Iwai > --- > drivers/gpu/drm/i915/i915_suspend.c |5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_suspend.c > b/drivers/gpu/drm/i915/i915_suspend.c > index 0ede02a..a748e5c 100644 > --- a/drivers/gpu/drm/i915/i915_suspend.c > +++ b/drivers/gpu/drm/i915/i915_suspend.c > @@ -740,8 +740,11 @@ static void i915_restore_display(struct drm_device *dev) > if (HAS_PCH_SPLIT(dev)) { > I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL); > I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2); > - I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); > + /* NOTE: BLC_PWM_CPU_CTL must be written after BLC_PWM_CPU_CTL2; > + * otherwise we get blank eDP screen after S3 on some machines Full stop at the end? Also add a reference to the list discussion or Bugzilla entry? > + */ > I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2); > + I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); > I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); > I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); > I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); With or without these changes above, this patch is Acked-by: Paul Menzel Thanks, Paul signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Fix eDP blank screen after S3 resume on HP desktops
This patch fixes the problem on some HP desktop machines with eDP which give blank screens after S3 resume. It turned out that BLC_PWM_CPU_CTL must be written after BLC_PWM_CPU_CTL2. Otherwise it doesn't take effect on these SNB machines. Tested with 3.5-rc3 kernel. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49233 Cc: Signed-off-by: Takashi Iwai --- drivers/gpu/drm/i915/i915_suspend.c |5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 0ede02a..a748e5c 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -740,8 +740,11 @@ static void i915_restore_display(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) { I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL); I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2); - I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); + /* NOTE: BLC_PWM_CPU_CTL must be written after BLC_PWM_CPU_CTL2; +* otherwise we get blank eDP screen after S3 on some machines +*/ I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2); + I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); -- 1.7.10.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx