Re: [Intel-gfx] [PATCH v2 1/5] drm/i915: expose _SLICE_MASK GETPARM

2017-03-23 Thread Matthew Auld
On 23 March 2017 at 20:18, Robert Bragg  wrote:
> Enables userspace to determine the number of slices enabled and also
> know what specific slices are enabled. This information is required, for
> example, to be able to analyse some OA counter reports where the counter
> configuration depends on the HW slice configuration.
>
> Signed-off-by: Robert Bragg 
Assuming you remember to update the 45 when landing:

Reviewed-by: Matthew Auld 
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[Intel-gfx] [PATCH v2 1/5] drm/i915: expose _SLICE_MASK GETPARM

2017-03-23 Thread Robert Bragg
Enables userspace to determine the number of slices enabled and also
know what specific slices are enabled. This information is required, for
example, to be able to analyse some OA counter reports where the counter
configuration depends on the HW slice configuration.

Signed-off-by: Robert Bragg 
---
 drivers/gpu/drm/i915/i915_drv.c | 5 +
 include/uapi/drm/i915_drm.h | 1 +
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6d9944a00b7d..ad12ffc356be 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -357,6 +357,11 @@ static int i915_getparam(struct drm_device *dev, void 
*data,
 */
value = 1;
break;
+   case I915_PARAM_SLICE_MASK:
+   value = INTEL_INFO(dev_priv)->sseu.slice_mask;
+   if (!value)
+   return -ENODEV;
+   break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 3554495bef13..f47fb7f26f36 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -392,6 +392,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_POOLED_EU38
 #define I915_PARAM_MIN_EU_IN_POOL   39
 #define I915_PARAM_MMAP_GTT_VERSION 40
+#define I915_PARAM_SLICE_MASK   45 /* XXX: rebase before landing */
 
 /* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
  * priorities and the driver will attempt to execute batches in priority order.
-- 
2.12.0

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