Re: [Intel-gfx] [PATCH v2 34/38] drm/i915: Live testing for context execution

2017-01-25 Thread Joonas Lahtinen
On to, 2017-01-19 at 11:41 +, Chris Wilson wrote:
> Check we can create and execution within a context.
> 
> Signed-off-by: Chris Wilson 



> +static struct i915_vma *
> +gpu_fill_pages(struct i915_vma *vma, u64 offset, unsigned long count, u32 
> value)
> +{

It smells like goto err; in this function.

> +}

Other than that, -EMAGIC, too many numbers and weakly named variables,
can't really follow the test.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[Intel-gfx] [PATCH v2 34/38] drm/i915: Live testing for context execution

2017-01-19 Thread Chris Wilson
Check we can create and execution within a context.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_context.c|   1 +
 drivers/gpu/drm/i915/selftests/i915_gem_context.c  | 323 +
 .../gpu/drm/i915/selftests/i915_live_selftests.h   |   1 +
 3 files changed, 325 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_context.c

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5dc596a86ab1..460979cc0745 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -1167,4 +1167,5 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device 
*dev,
 
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftests/mock_context.c"
+#include "selftests/i915_gem_context.c"
 #endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
new file mode 100644
index ..68bfa56b5626
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -0,0 +1,323 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+#include "mock_drm.h"
+#include "huge_gem_object.h"
+
+#define DW_PER_PAGE (PAGE_SIZE / sizeof(u32))
+
+static struct i915_vma *
+gpu_fill_pages(struct i915_vma *vma, u64 offset, unsigned long count, u32 
value)
+{
+   struct drm_i915_gem_object *obj;
+   const int gen = INTEL_GEN(vma->vm->i915);
+   unsigned long sz = (4*count + 1)*sizeof(u32);
+   u32 *cmd;
+   int err;
+
+   obj = i915_gem_object_create_internal(vma->vm->i915,
+ round_up(sz, PAGE_SIZE));
+   if (IS_ERR(obj))
+   return ERR_CAST(obj);
+
+   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   if (IS_ERR(cmd)) {
+   i915_gem_object_put(obj);
+   return ERR_CAST(cmd);
+   }
+
+   GEM_BUG_ON(offset + (count - 1) * PAGE_SIZE > vma->node.size);
+   offset += vma->node.start;
+
+   for (sz = 0; sz < count; sz++) {
+   if (gen >= 8) {
+   *cmd++ = MI_STORE_DWORD_IMM_GEN4;
+   *cmd++ = lower_32_bits(offset);
+   *cmd++ = upper_32_bits(offset);
+   *cmd++ = value;
+   } else if (gen >= 4) {
+   *cmd++ = MI_STORE_DWORD_IMM_GEN4;
+   *cmd++ = 0;
+   *cmd++ = offset;
+   *cmd++ = value;
+   } else {
+   *cmd++ = MI_STORE_DWORD_IMM | 1 << 22;
+   *cmd++ = offset;
+   *cmd++ = value;
+   }
+   offset += PAGE_SIZE;
+   }
+   *cmd = MI_BATCH_BUFFER_END;
+   i915_gem_object_unpin_map(obj);
+
+   err = i915_gem_object_set_to_gtt_domain(obj, false);
+   if (err) {
+   i915_gem_object_put(obj);
+   return ERR_PTR(err);
+   }
+
+   vma = i915_vma_instance(obj, vma->vm, NULL);
+   if (IS_ERR(vma)) {
+   i915_gem_object_put(obj);
+   return vma;
+   }
+
+   err = i915_vma_pin(vma, 0, 0, PIN_USER);
+   if (err) {
+   i915_gem_object_put(obj);
+   return ERR_PTR(err);
+   }
+
+   return vma;
+}
+
+static int gpu_fill(struct drm_i915_gem_object *obj,
+   struct i915_gem_context *ctx,
+   struct intel_engine_cs *engine)
+{
+   struct drm_i915_private *i915 = to_i915(obj->base.dev);
+   struct i915_address_space *vm =
+   ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+   struct i915_vma *vma;
+   struct i915_vma *batch;
+   unsigned long n, max;
+   int err;
+
+   vma = i915_vma_instance(obj, vm, NULL)