Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: Add modular FIA

2019-07-10 Thread Ville Syrjälä
On Wed, Jul 10, 2019 at 12:22:51PM -0700, Lucas De Marchi wrote:
> On Wed, Jul 10, 2019 at 09:33:39PM +0300, Ville Syrjälä wrote:
> >On Mon, Jul 08, 2019 at 10:28:15AM -0700, Lucas De Marchi wrote:
> >> From: Anusha Srivatsa 
> >>
> >> Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
> >> then Display Driver will access the additional instances of
> >> FIA based on pre-assigned offset in GTTMADDR space.
> >>
> >> Each Modular FIA instance has its own IOSF Sideband Port ID
> >> and it houses only 2 Type-C Port. In SOC that has more than
> >> two Type-C Ports, there are multiple instances of Modular FIA.
> >> Gunit will need to use different destination ID when it access
> >> different pair of Type-C Port.
> >>
> >> The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
> >> Modular FIA is used in the SOC, this register bit exists in all the
> >> instances of Modular FIA. IOM FW is required to program only the MF bit
> >> in first FIA instance that houses the Type-C Port 0 and Port 1, for
> >> Display Driver to read from.
> >>
> >> v2 (Lucas):
> >>   - Move all accesses to FIA to be contained in intel_tc.c, along with
> >> display_fia that is now called tc_phy_fia
> >>   - Save the fia instance number on intel_digital_port, so we don't have
> >> to query if modular FIA is used on every access
> >> v3 (Lucas):
> >>   - Make function static
> >>
> >> Cc: Jani Nikula 
> >> Signed-off-by: Anusha Srivatsa 
> >> Signed-off-by: Lucas De Marchi 
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_tc.c  | 49 
> >>  drivers/gpu/drm/i915/i915_reg.h  | 13 +--
> >>  drivers/gpu/drm/i915/intel_device_info.h |  1 +
> >>  drivers/gpu/drm/i915/intel_drv.h |  1 +
> >>  4 files changed, 52 insertions(+), 12 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
> >> b/drivers/gpu/drm/i915/display/intel_tc.c
> >> index f44ee4bfe7c8..671261b55d11 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> >> @@ -8,6 +8,12 @@
> >>  #include "intel_dp_mst.h"
> >>  #include "intel_tc.h"
> >>
> >> +enum phy_fia {
> >> +  FIA1,
> >> +  FIA2,
> >> +  FIA3,
> >> +};
> >> +
> >>  static const char *tc_port_mode_name(enum tc_port_mode mode)
> >>  {
> >>static const char * const names[] = {
> >> @@ -22,6 +28,24 @@ static const char *tc_port_mode_name(enum tc_port_mode 
> >> mode)
> >>return names[mode];
> >>  }
> >>
> >> +static bool has_modular_fia(struct drm_i915_private *i915)
> >> +{
> >> +  if (!INTEL_INFO(i915)->display.has_modular_fia)
> >> +  return false;
> >> +
> >> +  return intel_uncore_read(>uncore,
> >> +   PORT_TX_DFLEXDPSP(FIA1)) & MODULAR_FIA_MASK;
> >> +}
> >> +
> >> +static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915,
> >> + enum tc_port tc_port)
> >> +{
> >> +  if (!has_modular_fia(i915))
> >> +  return FIA1;
> >> +
> >> +  return tc_port / 2;
> >> +}
> >> +
> >>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> >>  {
> >>struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> >> @@ -29,7 +53,8 @@ u32 intel_tc_port_get_lane_mask(struct 
> >> intel_digital_port *dig_port)
> >>struct intel_uncore *uncore = >uncore;
> >>u32 lane_mask;
> >>
> >> -  lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
> >> +  lane_mask = intel_uncore_read(uncore,
> >> +PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> >>
> >>WARN_ON(lane_mask == 0x);
> >>
> >> @@ -78,7 +103,8 @@ void intel_tc_port_set_fia_lane_count(struct 
> >> intel_digital_port *dig_port,
> >>
> >>WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
> >>
> >> -  val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
> >> +  val = intel_uncore_read(uncore,
> >> +  PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> >>val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
> >>
> >>switch (required_lanes) {
> >> @@ -97,7 +123,8 @@ void intel_tc_port_set_fia_lane_count(struct 
> >> intel_digital_port *dig_port,
> >>MISSING_CASE(required_lanes);
> >>}
> >>
> >> -  intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
> >> +  intel_uncore_write(uncore,
> >> + PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> >>  }
> >>
> >>  static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> >> @@ -129,7 +156,8 @@ static u32 tc_port_live_status_mask(struct 
> >> intel_digital_port *dig_port)
> >>u32 mask = 0;
> >>u32 val;
> >>
> >> -  val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
> >> +  val = intel_uncore_read(uncore,
> >> +  PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> >>
> >>if (val == 0x) {
> >>DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
> >> @@ -159,7 +187,8 @@ static bool 

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: Add modular FIA

2019-07-10 Thread Lucas De Marchi

On Wed, Jul 10, 2019 at 09:33:39PM +0300, Ville Syrjälä wrote:

On Mon, Jul 08, 2019 at 10:28:15AM -0700, Lucas De Marchi wrote:

From: Anusha Srivatsa 

Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
then Display Driver will access the additional instances of
FIA based on pre-assigned offset in GTTMADDR space.

Each Modular FIA instance has its own IOSF Sideband Port ID
and it houses only 2 Type-C Port. In SOC that has more than
two Type-C Ports, there are multiple instances of Modular FIA.
Gunit will need to use different destination ID when it access
different pair of Type-C Port.

The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
Modular FIA is used in the SOC, this register bit exists in all the
instances of Modular FIA. IOM FW is required to program only the MF bit
in first FIA instance that houses the Type-C Port 0 and Port 1, for
Display Driver to read from.

v2 (Lucas):
  - Move all accesses to FIA to be contained in intel_tc.c, along with
display_fia that is now called tc_phy_fia
  - Save the fia instance number on intel_digital_port, so we don't have
to query if modular FIA is used on every access
v3 (Lucas):
  - Make function static

Cc: Jani Nikula 
Signed-off-by: Anusha Srivatsa 
Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/display/intel_tc.c  | 49 
 drivers/gpu/drm/i915/i915_reg.h  | 13 +--
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 drivers/gpu/drm/i915/intel_drv.h |  1 +
 4 files changed, 52 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
b/drivers/gpu/drm/i915/display/intel_tc.c
index f44ee4bfe7c8..671261b55d11 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -8,6 +8,12 @@
 #include "intel_dp_mst.h"
 #include "intel_tc.h"

+enum phy_fia {
+   FIA1,
+   FIA2,
+   FIA3,
+};
+
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
static const char * const names[] = {
@@ -22,6 +28,24 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
return names[mode];
 }

+static bool has_modular_fia(struct drm_i915_private *i915)
+{
+   if (!INTEL_INFO(i915)->display.has_modular_fia)
+   return false;
+
+   return intel_uncore_read(>uncore,
+PORT_TX_DFLEXDPSP(FIA1)) & MODULAR_FIA_MASK;
+}
+
+static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915,
+  enum tc_port tc_port)
+{
+   if (!has_modular_fia(i915))
+   return FIA1;
+
+   return tc_port / 2;
+}
+
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -29,7 +53,8 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port 
*dig_port)
struct intel_uncore *uncore = >uncore;
u32 lane_mask;

-   lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+   lane_mask = intel_uncore_read(uncore,
+ PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));

WARN_ON(lane_mask == 0x);

@@ -78,7 +103,8 @@ void intel_tc_port_set_fia_lane_count(struct 
intel_digital_port *dig_port,

WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);

-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);

switch (required_lanes) {
@@ -97,7 +123,8 @@ void intel_tc_port_set_fia_lane_count(struct 
intel_digital_port *dig_port,
MISSING_CASE(required_lanes);
}

-   intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
+   intel_uncore_write(uncore,
+  PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
 }

 static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
@@ -129,7 +156,8 @@ static u32 tc_port_live_status_mask(struct 
intel_digital_port *dig_port)
u32 mask = 0;
u32 val;

-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));

if (val == 0x) {
DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
@@ -159,7 +187,8 @@ static bool icl_tc_phy_status_complete(struct 
intel_digital_port *dig_port)
struct intel_uncore *uncore = >uncore;
u32 val;

-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
if (val == 0x) {
DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assuming not complete\n",
  dig_port->tc_port_name);
@@ -177,7 +206,8 @@ 

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: Add modular FIA

2019-07-10 Thread Ville Syrjälä
On Mon, Jul 08, 2019 at 10:28:15AM -0700, Lucas De Marchi wrote:
> From: Anusha Srivatsa 
> 
> Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
> then Display Driver will access the additional instances of
> FIA based on pre-assigned offset in GTTMADDR space.
> 
> Each Modular FIA instance has its own IOSF Sideband Port ID
> and it houses only 2 Type-C Port. In SOC that has more than
> two Type-C Ports, there are multiple instances of Modular FIA.
> Gunit will need to use different destination ID when it access
> different pair of Type-C Port.
> 
> The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
> Modular FIA is used in the SOC, this register bit exists in all the
> instances of Modular FIA. IOM FW is required to program only the MF bit
> in first FIA instance that houses the Type-C Port 0 and Port 1, for
> Display Driver to read from.
> 
> v2 (Lucas):
>   - Move all accesses to FIA to be contained in intel_tc.c, along with
> display_fia that is now called tc_phy_fia
>   - Save the fia instance number on intel_digital_port, so we don't have
> to query if modular FIA is used on every access
> v3 (Lucas):
>   - Make function static
> 
> Cc: Jani Nikula 
> Signed-off-by: Anusha Srivatsa 
> Signed-off-by: Lucas De Marchi 
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c  | 49 
>  drivers/gpu/drm/i915/i915_reg.h  | 13 +--
>  drivers/gpu/drm/i915/intel_device_info.h |  1 +
>  drivers/gpu/drm/i915/intel_drv.h |  1 +
>  4 files changed, 52 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index f44ee4bfe7c8..671261b55d11 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -8,6 +8,12 @@
>  #include "intel_dp_mst.h"
>  #include "intel_tc.h"
>  
> +enum phy_fia {
> + FIA1,
> + FIA2,
> + FIA3,
> +};
> +
>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
>   static const char * const names[] = {
> @@ -22,6 +28,24 @@ static const char *tc_port_mode_name(enum tc_port_mode 
> mode)
>   return names[mode];
>  }
>  
> +static bool has_modular_fia(struct drm_i915_private *i915)
> +{
> + if (!INTEL_INFO(i915)->display.has_modular_fia)
> + return false;
> +
> + return intel_uncore_read(>uncore,
> +  PORT_TX_DFLEXDPSP(FIA1)) & MODULAR_FIA_MASK;
> +}
> +
> +static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915,
> +enum tc_port tc_port)
> +{
> + if (!has_modular_fia(i915))
> + return FIA1;
> +
> + return tc_port / 2;
> +}
> +
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> @@ -29,7 +53,8 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port 
> *dig_port)
>   struct intel_uncore *uncore = >uncore;
>   u32 lane_mask;
>  
> - lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
> + lane_mask = intel_uncore_read(uncore,
> +   PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>  
>   WARN_ON(lane_mask == 0x);
>  
> @@ -78,7 +103,8 @@ void intel_tc_port_set_fia_lane_count(struct 
> intel_digital_port *dig_port,
>  
>   WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
>  
> - val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
> + val = intel_uncore_read(uncore,
> + PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
>   val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
>  
>   switch (required_lanes) {
> @@ -97,7 +123,8 @@ void intel_tc_port_set_fia_lane_count(struct 
> intel_digital_port *dig_port,
>   MISSING_CASE(required_lanes);
>   }
>  
> - intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
> + intel_uncore_write(uncore,
> +PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
>  }
>  
>  static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> @@ -129,7 +156,8 @@ static u32 tc_port_live_status_mask(struct 
> intel_digital_port *dig_port)
>   u32 mask = 0;
>   u32 val;
>  
> - val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
> + val = intel_uncore_read(uncore,
> + PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>  
>   if (val == 0x) {
>   DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
> @@ -159,7 +187,8 @@ static bool icl_tc_phy_status_complete(struct 
> intel_digital_port *dig_port)
>   struct intel_uncore *uncore = >uncore;
>   u32 val;
>  
> - val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS);
> + val = intel_uncore_read(uncore,
> + PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
>   if (val == 0x) {
>   DRM_DEBUG_KMS("Port 

[Intel-gfx] [PATCH v2 4/4] drm/i915: Add modular FIA

2019-07-08 Thread Lucas De Marchi
From: Anusha Srivatsa 

Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
then Display Driver will access the additional instances of
FIA based on pre-assigned offset in GTTMADDR space.

Each Modular FIA instance has its own IOSF Sideband Port ID
and it houses only 2 Type-C Port. In SOC that has more than
two Type-C Ports, there are multiple instances of Modular FIA.
Gunit will need to use different destination ID when it access
different pair of Type-C Port.

The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
Modular FIA is used in the SOC, this register bit exists in all the
instances of Modular FIA. IOM FW is required to program only the MF bit
in first FIA instance that houses the Type-C Port 0 and Port 1, for
Display Driver to read from.

v2 (Lucas):
  - Move all accesses to FIA to be contained in intel_tc.c, along with
display_fia that is now called tc_phy_fia
  - Save the fia instance number on intel_digital_port, so we don't have
to query if modular FIA is used on every access
v3 (Lucas):
  - Make function static

Cc: Jani Nikula 
Signed-off-by: Anusha Srivatsa 
Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/display/intel_tc.c  | 49 
 drivers/gpu/drm/i915/i915_reg.h  | 13 +--
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 drivers/gpu/drm/i915/intel_drv.h |  1 +
 4 files changed, 52 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
b/drivers/gpu/drm/i915/display/intel_tc.c
index f44ee4bfe7c8..671261b55d11 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -8,6 +8,12 @@
 #include "intel_dp_mst.h"
 #include "intel_tc.h"
 
+enum phy_fia {
+   FIA1,
+   FIA2,
+   FIA3,
+};
+
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
static const char * const names[] = {
@@ -22,6 +28,24 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
return names[mode];
 }
 
+static bool has_modular_fia(struct drm_i915_private *i915)
+{
+   if (!INTEL_INFO(i915)->display.has_modular_fia)
+   return false;
+
+   return intel_uncore_read(>uncore,
+PORT_TX_DFLEXDPSP(FIA1)) & MODULAR_FIA_MASK;
+}
+
+static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915,
+  enum tc_port tc_port)
+{
+   if (!has_modular_fia(i915))
+   return FIA1;
+
+   return tc_port / 2;
+}
+
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -29,7 +53,8 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port 
*dig_port)
struct intel_uncore *uncore = >uncore;
u32 lane_mask;
 
-   lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+   lane_mask = intel_uncore_read(uncore,
+ PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
 
WARN_ON(lane_mask == 0x);
 
@@ -78,7 +103,8 @@ void intel_tc_port_set_fia_lane_count(struct 
intel_digital_port *dig_port,
 
WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
 
-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
 
switch (required_lanes) {
@@ -97,7 +123,8 @@ void intel_tc_port_set_fia_lane_count(struct 
intel_digital_port *dig_port,
MISSING_CASE(required_lanes);
}
 
-   intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
+   intel_uncore_write(uncore,
+  PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
 }
 
 static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
@@ -129,7 +156,8 @@ static u32 tc_port_live_status_mask(struct 
intel_digital_port *dig_port)
u32 mask = 0;
u32 val;
 
-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
 
if (val == 0x) {
DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
@@ -159,7 +187,8 @@ static bool icl_tc_phy_status_complete(struct 
intel_digital_port *dig_port)
struct intel_uncore *uncore = >uncore;
u32 val;
 
-   val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS);
+   val = intel_uncore_read(uncore,
+   PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
if (val == 0x) {
DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assuming not complete\n",
  dig_port->tc_port_name);
@@ -177,7 +206,8 @@ static bool icl_tc_phy_set_safe_mode(struct 
intel_digital_port *dig_port,
struct intel_uncore *uncore = >uncore;