Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-19 Thread Abdiel Janulgue


On 05/18/2015 05:55 PM, Chris Wilson wrote:
 On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
 Ensures that the batch buffer is executed by the resource streamer

 Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
 
 1-3:
 Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
 
 Now all you have to do is satisfy Daniel with a few igt.
 -Chris
 

Thanks for the review! :)
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Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-18 Thread Daniel Vetter
On Mon, May 18, 2015 at 01:52:12PM +0300, Abdiel Janulgue wrote:
 
 
 On 05/18/2015 12:01 PM, Daniel Vetter wrote:
  On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
  Ensures that the batch buffer is executed by the resource streamer
 
  Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
  
  Maybe I missed them, but we also need a patch to update gem_exec_params
  from igt.  At least the invalid-flag subtest should fail with this
  applied. Also please add a Testcase: tag once you've added the testcase
  for this new flag.
 
 I'm not sure what you mean here. When I run unmodified gem_exec_params
 with this resource streamer patches applied. I get this results, at
 least on the invalid-flag section:
 
 Subtest invalid-flag: SUCCESS (0.000s)
 
 Is this supposed to fail?

Yup, but because it wasn't updated for the bsd mask feature and
accidentally still passes there it still passes when you add yet another
flag.

Anyway that one needs to be updated to hopefully make sure we'll catch
bit17. And you need flag checks to make sure the new RS flag doesn't go
through on !RCS and pre-hsw.
-Daniel
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http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-18 Thread Chris Wilson
On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
 Ensures that the batch buffer is executed by the resource streamer
 
 Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com

1-3:
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk

Now all you have to do is satisfy Daniel with a few igt.
-Chris

-- 
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[Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-18 Thread Abdiel Janulgue
Ensures that the batch buffer is executed by the resource streamer

Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
 drivers/gpu/drm/i915/intel_ringbuffer.h|  1 +
 include/uapi/drm/i915_drm.h|  7 ++-
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a3190e79..8a0abbb 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1485,6 +1485,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void 
*data,
return -EINVAL;
}
 
+   if (args-flags  I915_EXEC_RESOURCE_STREAMER) {
+   if (!IS_HASWELL(dev)  INTEL_INFO(dev)-gen  8) {
+   DRM_DEBUG(RS is only allowed for Haswell, Gen8 
+ and above\n);
+   return -EINVAL;
+   }
+   if (ring-id != RCS) {
+   DRM_DEBUG(RS is not available on %s\n,
+ring-name);
+   return -EINVAL;
+   }
+
+   dispatch_flags |= I915_DISPATCH_RS;
+   }
+
intel_runtime_pm_get(dev_priv);
 
ret = i915_mutex_lock_interruptible(dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index c761fe0..3521bc0 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -167,6 +167,7 @@ struct  intel_engine_cs {
   unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
 #define I915_DISPATCH_PINNED 0x2
+#define I915_DISPATCH_RS 0x4
void(*cleanup)(struct intel_engine_cs *ring);
 
/* GEN8 signal/wait table - never trust comments!
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 551b673..a4c1a5c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 {
 #define I915_EXEC_BSD_RING1(113)
 #define I915_EXEC_BSD_RING2(213)
 
-#define __I915_EXEC_UNKNOWN_FLAGS -(115)
+/** Tell the kernel that the batchbuffer is processed by
+ *  the resource streamer.
+ */
+#define I915_EXEC_RESOURCE_STREAMER (116)
+
+#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER 1)
 
 #define I915_EXEC_CONTEXT_ID_MASK  (0x)
 #define i915_execbuffer2_set_context_id(eb2, context) \
-- 
1.9.1

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Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-18 Thread Daniel Vetter
On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
 Ensures that the batch buffer is executed by the resource streamer
 
 Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com

Maybe I missed them, but we also need a patch to update gem_exec_params
from igt.  At least the invalid-flag subtest should fail with this
applied. Also please add a Testcase: tag once you've added the testcase
for this new flag.
-Daniel

 ---
  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
  drivers/gpu/drm/i915/intel_ringbuffer.h|  1 +
  include/uapi/drm/i915_drm.h|  7 ++-
  3 files changed, 22 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
 b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 index a3190e79..8a0abbb 100644
 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 @@ -1485,6 +1485,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void 
 *data,
   return -EINVAL;
   }
  
 + if (args-flags  I915_EXEC_RESOURCE_STREAMER) {
 + if (!IS_HASWELL(dev)  INTEL_INFO(dev)-gen  8) {
 + DRM_DEBUG(RS is only allowed for Haswell, Gen8 
 +   and above\n);
 + return -EINVAL;
 + }
 + if (ring-id != RCS) {
 + DRM_DEBUG(RS is not available on %s\n,
 +  ring-name);
 + return -EINVAL;
 + }
 +
 + dispatch_flags |= I915_DISPATCH_RS;
 + }
 +
   intel_runtime_pm_get(dev_priv);
  
   ret = i915_mutex_lock_interruptible(dev);
 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
 b/drivers/gpu/drm/i915/intel_ringbuffer.h
 index c761fe0..3521bc0 100644
 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
 +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
 @@ -167,6 +167,7 @@ struct  intel_engine_cs {
  unsigned dispatch_flags);
  #define I915_DISPATCH_SECURE 0x1
  #define I915_DISPATCH_PINNED 0x2
 +#define I915_DISPATCH_RS 0x4
   void(*cleanup)(struct intel_engine_cs *ring);
  
   /* GEN8 signal/wait table - never trust comments!
 diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
 index 551b673..a4c1a5c 100644
 --- a/include/uapi/drm/i915_drm.h
 +++ b/include/uapi/drm/i915_drm.h
 @@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 {
  #define I915_EXEC_BSD_RING1  (113)
  #define I915_EXEC_BSD_RING2  (213)
  
 -#define __I915_EXEC_UNKNOWN_FLAGS -(115)
 +/** Tell the kernel that the batchbuffer is processed by
 + *  the resource streamer.
 + */
 +#define I915_EXEC_RESOURCE_STREAMER (116)
 +
 +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER 1)
  
  #define I915_EXEC_CONTEXT_ID_MASK(0x)
  #define i915_execbuffer2_set_context_id(eb2, context) \
 -- 
 1.9.1
 
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Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

2015-05-18 Thread Abdiel Janulgue


On 05/18/2015 12:01 PM, Daniel Vetter wrote:
 On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
 Ensures that the batch buffer is executed by the resource streamer

 Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
 
 Maybe I missed them, but we also need a patch to update gem_exec_params
 from igt.  At least the invalid-flag subtest should fail with this
 applied. Also please add a Testcase: tag once you've added the testcase
 for this new flag.

I'm not sure what you mean here. When I run unmodified gem_exec_params
with this resource streamer patches applied. I get this results, at
least on the invalid-flag section:

Subtest invalid-flag: SUCCESS (0.000s)

Is this supposed to fail?

-abdiel

 
 ---
  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
  drivers/gpu/drm/i915/intel_ringbuffer.h|  1 +
  include/uapi/drm/i915_drm.h|  7 ++-
  3 files changed, 22 insertions(+), 1 deletion(-)

 diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
 b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 index a3190e79..8a0abbb 100644
 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
 @@ -1485,6 +1485,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void 
 *data,
  return -EINVAL;
  }
  
 +if (args-flags  I915_EXEC_RESOURCE_STREAMER) {
 +if (!IS_HASWELL(dev)  INTEL_INFO(dev)-gen  8) {
 +DRM_DEBUG(RS is only allowed for Haswell, Gen8 
 +  and above\n);
 +return -EINVAL;
 +}
 +if (ring-id != RCS) {
 +DRM_DEBUG(RS is not available on %s\n,
 + ring-name);
 +return -EINVAL;
 +}
 +
 +dispatch_flags |= I915_DISPATCH_RS;
 +}
 +
  intel_runtime_pm_get(dev_priv);
  
  ret = i915_mutex_lock_interruptible(dev);
 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
 b/drivers/gpu/drm/i915/intel_ringbuffer.h
 index c761fe0..3521bc0 100644
 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
 +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
 @@ -167,6 +167,7 @@ struct  intel_engine_cs {
 unsigned dispatch_flags);
  #define I915_DISPATCH_SECURE 0x1
  #define I915_DISPATCH_PINNED 0x2
 +#define I915_DISPATCH_RS 0x4
  void(*cleanup)(struct intel_engine_cs *ring);
  
  /* GEN8 signal/wait table - never trust comments!
 diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
 index 551b673..a4c1a5c 100644
 --- a/include/uapi/drm/i915_drm.h
 +++ b/include/uapi/drm/i915_drm.h
 @@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 {
  #define I915_EXEC_BSD_RING1 (113)
  #define I915_EXEC_BSD_RING2 (213)
  
 -#define __I915_EXEC_UNKNOWN_FLAGS -(115)
 +/** Tell the kernel that the batchbuffer is processed by
 + *  the resource streamer.
 + */
 +#define I915_EXEC_RESOURCE_STREAMER (116)
 +
 +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER 1)
  
  #define I915_EXEC_CONTEXT_ID_MASK   (0x)
  #define i915_execbuffer2_set_context_id(eb2, context) \
 -- 
 1.9.1

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