Re: [Intel-gfx] [PATCH v3 2/3] drm/i915: rework IS_*_GT* macros

[Chris Wilson]

Quoting Lionel Landwerlin (2017-08-29 21:42:03)
> We can now make use of the intel_device_info.gt field.
> 
> Signed-off-by: Lionel Landwerlin 
Reviewed-by: Chris Wilson 
-Chris
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[Intel-gfx] [PATCH v3 2/3] drm/i915: rework IS_*_GT* macros

[Lionel Landwerlin]

We can now make use of the intel_device_info.gt field.

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/i915_drv.h | 19 +--
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3d417537bd59..51c25b65611c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2869,9 +2869,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_G33(dev_priv)   ((dev_priv)->info.platform == INTEL_G33)
 #define IS_IRONLAKE_M(dev_priv)(INTEL_DEVID(dev_priv) == 0x0046)
 #define IS_IVYBRIDGE(dev_priv) ((dev_priv)->info.platform == INTEL_IVYBRIDGE)
-#define IS_IVB_GT1(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0156 || \
-INTEL_DEVID(dev_priv) == 0x0152 || \
-INTEL_DEVID(dev_priv) == 0x015a)
+#define IS_IVB_GT1(dev_priv)   (IS_IVYBRIDGE(dev_priv) && \
+(dev_priv)->info.gt == 1)
 #define IS_VALLEYVIEW(dev_priv)((dev_priv)->info.platform == 
INTEL_VALLEYVIEW)
 #define IS_CHERRYVIEW(dev_priv)((dev_priv)->info.platform == 
INTEL_CHERRYVIEW)
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.platform == INTEL_HASWELL)
@@ -2893,11 +2892,11 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_BDW_ULX(dev_priv)   (IS_BROADWELL(dev_priv) && \
 (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
 #define IS_BDW_GT3(dev_priv)   (IS_BROADWELL(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+(dev_priv)->info.gt == 3)
 #define IS_HSW_ULT(dev_priv)   (IS_HASWELL(dev_priv) && \
 (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
 #define IS_HSW_GT3(dev_priv)   (IS_HASWELL(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+(dev_priv)->info.gt == 3)
 /* ULX machines are also considered ULT. */
 #define IS_HSW_ULX(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0A0E || \
 INTEL_DEVID(dev_priv) == 0x0A1E)
@@ -2918,15 +2917,15 @@ intel_info(const struct drm_i915_private *dev_priv)
 INTEL_DEVID(dev_priv) == 0x5915 || \
 INTEL_DEVID(dev_priv) == 0x591E)
 #define IS_SKL_GT2(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0010)
+(dev_priv)->info.gt == 2)
 #define IS_SKL_GT3(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+(dev_priv)->info.gt == 3)
 #define IS_SKL_GT4(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0030)
+(dev_priv)->info.gt == 4)
 #define IS_KBL_GT2(dev_priv)   (IS_KABYLAKE(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0010)
+(dev_priv)->info.gt == 2)
 #define IS_KBL_GT3(dev_priv)   (IS_KABYLAKE(dev_priv) && \
-(INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+(dev_priv)->info.gt == 3)
 #define IS_CFL_ULT(dev_priv)   (IS_COFFEELAKE(dev_priv) && \
 (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
 
-- 
2.14.1

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