[Intel-gfx] [PATCH v3 2/4] drm/i915: Only set CURSOR_PIPE_CSC_ENABLE when cursor is enabled
From: Ville Syrjälä
It seems cleaner if we keep CURCNTR at 0 when the cursor is disabled,
so don't set the CURSOR_PIPE_CSC_ENABLE bit unless the cursor is
enabled.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 8a5cb6b..82c0ad1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8317,9 +8317,10 @@ static void i9xx_update_cursor(struct drm_crtc *crtc,
u32 base)
return;
}
cntl |= pipe << 28; /* Connect to correct pipe */
+
+ if (IS_HASWELL(dev) || IS_BROADWELL(dev))
+ cntl |= CURSOR_PIPE_CSC_ENABLE;
}
- if (IS_HASWELL(dev) || IS_BROADWELL(dev))
- cntl |= CURSOR_PIPE_CSC_ENABLE;
if (intel_crtc->cursor_cntl != cntl) {
I915_WRITE(CURCNTR(pipe), cntl);
--
1.8.5.5
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Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Only set CURSOR_PIPE_CSC_ENABLE when cursor is enabled
On Fri, Sep 12, 2014 at 08:53:33PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > It seems cleaner if we keep CURCNTR at 0 when the cursor is disabled, > so don't set the CURSOR_PIPE_CSC_ENABLE bit unless the cursor is > enabled. > > Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Only set CURSOR_PIPE_CSC_ENABLE when cursor is enabled
On Sat, Sep 13, 2014 at 05:17:29PM +0100, Chris Wilson wrote: > On Fri, Sep 12, 2014 at 08:53:33PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > It seems cleaner if we keep CURCNTR at 0 when the cursor is disabled, > > so don't set the CURSOR_PIPE_CSC_ENABLE bit unless the cursor is > > enabled. > > > > Signed-off-by: Ville Syrjälä > Reviewed-by: Chris Wilson Merged the first 2 patches from this series to dinq, thanks. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
