Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

2018-05-21 Thread Ramalingam C 



On Friday 18 May 2018 09:45 PM, Shankar, Uma wrote:



-Original Message-
From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
Ramalingam C
Sent: Tuesday, April 3, 2018 7:28 PM
To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
jani.nik...@linux.intel.com; Winkler, Tomas ;
Usyskin, Alexander 
Cc: Vivi, Rodrigo 
Subject: [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

Implements the DP adaptation specific HDCP2.2 functions.

These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.

Note: Chris Wilson suggested alternate method for waiting for CP_IRQ, than
completions concept. WIP to understand and implement that, if needed. Just to
unblock the review of other changes, v2 still continues with completions.

v2:
  wait for cp_irq is merged with this patch. Rebased.
v3:
  wait_queue is used for wait for cp_irq [Chris Wilson]

Signed-off-by: Ramalingam C 
---
drivers/gpu/drm/i915/intel_dp.c   | 352
++
drivers/gpu/drm/i915/intel_drv.h  |   7 +
drivers/gpu/drm/i915/intel_hdcp.c |   5 +
3 files changed, 364 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f92c0326fff5..e5cb54ceda38 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -31,6 +31,7 @@
#include 
#include 
#include 
+#include 
#include 
#include 
#include 
@@ -5070,6 +5071,28 @@ void intel_dp_encoder_suspend(struct intel_encoder
*intel_encoder)
pps_unlock(intel_dp);
}

+static int intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp,
+int timeout)
+{
+   long ret;
+
+   /* Reinit */
+   atomic_set(&hdcp->cp_irq_recved, 0);

I feel "received" would sound better instead of the current abbreviation.


+
+#define C (atomic_read(&hdcp->cp_irq_recved) > 0)
+   ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
+  msecs_to_jiffies(timeout));
+
+   if (ret > 0) {
+   atomic_set(&hdcp->cp_irq_recved, 0);
+   return 0;
+   } else if (!ret) {
+   return -ETIMEDOUT;
+   }
+   return (int)ret;
+}
+
+
static
int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
u8 *an)
@@ -5288,6 +5311,329 @@ int intel_dp_hdcp_capable(struct intel_digital_port
*intel_dig_port,
return 0;
}

+static inline

Don’t make this inline.


+int intel_dpcd_offset_for_hdcp2_msgid(uint8_t byte, unsigned int
+*offset) {
+   switch (byte) {
+   case HDCP_2_2_AKE_INIT:
+   *offset = DP_HDCP_2_2_AKE_INIT_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_CERT:
+   *offset = DP_HDCP_2_2_AKE_SEND_CERT_OFFSET;
+   break;
+   case HDCP_2_2_AKE_NO_STORED_KM:
+   *offset = DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET;
+   break;
+   case HDCP_2_2_AKE_STORED_KM:
+   *offset = DP_HDCP_2_2_AKE_STORED_KM_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_HPRIME:
+   *offset = DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_PARING_INFO:
+   *offset = DP_HDCP_2_2_AKE_SEND_PARING_INFO_OFFSET;
+   break;
+   case HDCP_2_2_LC_INIT:
+   *offset = DP_HDCP_2_2_LC_INIT_OFFSET;
+   break;
+   case HDCP_2_2_LC_SEND_LPRIME:
+   *offset = DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET;
+   break;
+   case HDCP_2_2_SKE_SEND_EKS:
+   *offset = DP_HDCP_2_2_SKE_SEND_EKS_OFFSET;
+   break;
+   case HDCP_2_2_REP_SEND_RECVID_LIST:
+   *offset = DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET;
+   break;
+   case HDCP_2_2_REP_SEND_ACK:
+   *offset = DP_HDCP_2_2_REP_SEND_ACK_OFFSET;
+   break;
+   case HDCP_2_2_REP_STREAM_MANAGE:
+   *offset = DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET;
+   break;
+   case HDCP_2_2_REP_STREAM_READY:
+   *offset = DP_HDCP_2_2_REP_STREAM_READY_OFFSET;
+   break;
+   case HDCP_2_2_ERRATA_DP_STREAM_TYPE:
+   *offset = DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET;
+   break;
+   default:
+   DRM_ERROR("Unrecognized Msg ID\n");
+   return -EINVAL;
+   }

Leave a blank line.


+   return 0;
+}
+
+static inline
+int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
+ uint8_t *rx_status)
+{
+   ssize_t ret;
+
+   ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
+  DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
+  HDCP_2_2_DP_RXSTATUS_LEN);
+   if (ret != HDCP_2_2_D

Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

2018-05-18 Thread Shankar, Uma 


>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>jani.nik...@linux.intel.com; Winkler, Tomas ;
>Usyskin, Alexander 
>Cc: Vivi, Rodrigo 
>Subject: [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP
>
>Implements the DP adaptation specific HDCP2.2 functions.
>
>These functions perform the DPCD read and write for communicating the
>HDCP2.2 auth message back and forth.
>
>Note: Chris Wilson suggested alternate method for waiting for CP_IRQ, than
>completions concept. WIP to understand and implement that, if needed. Just to
>unblock the review of other changes, v2 still continues with completions.
>
>v2:
>  wait for cp_irq is merged with this patch. Rebased.
>v3:
>  wait_queue is used for wait for cp_irq [Chris Wilson]
>
>Signed-off-by: Ramalingam C 
>---
> drivers/gpu/drm/i915/intel_dp.c   | 352
>++
> drivers/gpu/drm/i915/intel_drv.h  |   7 +
> drivers/gpu/drm/i915/intel_hdcp.c |   5 +
> 3 files changed, 364 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>index f92c0326fff5..e5cb54ceda38 100644
>--- a/drivers/gpu/drm/i915/intel_dp.c
>+++ b/drivers/gpu/drm/i915/intel_dp.c
>@@ -31,6 +31,7 @@
> #include 
> #include 
> #include 
>+#include 
> #include 
> #include 
> #include 
>@@ -5070,6 +5071,28 @@ void intel_dp_encoder_suspend(struct intel_encoder
>*intel_encoder)
>   pps_unlock(intel_dp);
> }
>
>+static int intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp,
>+   int timeout)
>+{
>+  long ret;
>+
>+  /* Reinit */
>+  atomic_set(&hdcp->cp_irq_recved, 0);

I feel "received" would sound better instead of the current abbreviation.

>+
>+#define C (atomic_read(&hdcp->cp_irq_recved) > 0)
>+  ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
>+ msecs_to_jiffies(timeout));
>+
>+  if (ret > 0) {
>+  atomic_set(&hdcp->cp_irq_recved, 0);
>+  return 0;
>+  } else if (!ret) {
>+  return -ETIMEDOUT;
>+  }
>+  return (int)ret;
>+}
>+
>+
> static
> int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>   u8 *an)
>@@ -5288,6 +5311,329 @@ int intel_dp_hdcp_capable(struct intel_digital_port
>*intel_dig_port,
>   return 0;
> }
>
>+static inline

Don’t make this inline.

>+int intel_dpcd_offset_for_hdcp2_msgid(uint8_t byte, unsigned int
>+*offset) {
>+  switch (byte) {
>+  case HDCP_2_2_AKE_INIT:
>+  *offset = DP_HDCP_2_2_AKE_INIT_OFFSET;
>+  break;
>+  case HDCP_2_2_AKE_SEND_CERT:
>+  *offset = DP_HDCP_2_2_AKE_SEND_CERT_OFFSET;
>+  break;
>+  case HDCP_2_2_AKE_NO_STORED_KM:
>+  *offset = DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET;
>+  break;
>+  case HDCP_2_2_AKE_STORED_KM:
>+  *offset = DP_HDCP_2_2_AKE_STORED_KM_OFFSET;
>+  break;
>+  case HDCP_2_2_AKE_SEND_HPRIME:
>+  *offset = DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET;
>+  break;
>+  case HDCP_2_2_AKE_SEND_PARING_INFO:
>+  *offset = DP_HDCP_2_2_AKE_SEND_PARING_INFO_OFFSET;
>+  break;
>+  case HDCP_2_2_LC_INIT:
>+  *offset = DP_HDCP_2_2_LC_INIT_OFFSET;
>+  break;
>+  case HDCP_2_2_LC_SEND_LPRIME:
>+  *offset = DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET;
>+  break;
>+  case HDCP_2_2_SKE_SEND_EKS:
>+  *offset = DP_HDCP_2_2_SKE_SEND_EKS_OFFSET;
>+  break;
>+  case HDCP_2_2_REP_SEND_RECVID_LIST:
>+  *offset = DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET;
>+  break;
>+  case HDCP_2_2_REP_SEND_ACK:
>+  *offset = DP_HDCP_2_2_REP_SEND_ACK_OFFSET;
>+  break;
>+  case HDCP_2_2_REP_STREAM_MANAGE:
>+  *offset = DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET;
>+  break;
>+  case HDCP_2_2_REP_STREAM_READY:
>+  *offset = DP_HDCP_2_2_REP_STREAM_READY_OFFSET;
>+  break;
>+  case HDCP_2_2_ERRATA_DP_STREAM_TYPE:
>+  *offset = DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET;
>+  break;
>+  default:
>+  DRM_ERROR("Unrecognized Msg ID\n");
>+  return -EINVAL;
>+  }

Leave a blank line.

>+  return 0;
>+}
>+
>+static inline
>+int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
>+uint8_t *rx_status)
>+{
>+  ssize_t ret;
>+
>+  ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
>+ DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
>+ HDCP_2_2_DP_RXSTATUS_LEN);
>

Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

2018-04-03 Thread kbuild test robot 
Hi Ramalingam,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20180403]
[cannot apply to v4.16]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-Implement-HDCP2-2/20180404-031743
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a1-201813 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All warnings (new ones prefixed by >>):

   drivers/gpu//drm/i915/intel_dp.c: In function 
'intel_dp_hdcp2_read_rx_status':
>> drivers/gpu//drm/i915/intel_dp.c:5377:3: warning: format '%ld' expects 
>> argument of type 'long int', but argument 2 has type 'ssize_t' [-Wformat=]
  DRM_ERROR("Read bstatus from DP/AUX failed (%ld)\n", ret);
  ^
   In file included from drivers/gpu//drm/i915/intel_dp.c:34:0:
   drivers/gpu//drm/i915/intel_dp.c: At top level:
   include/linux/mei_hdcp.h:144:12: warning: 'mei_cldev_register_notify' 
defined but not used [-Wunused-function]
static int mei_cldev_register_notify(struct notifier_block *nb)
   ^
   include/linux/mei_hdcp.h:148:12: warning: 'mei_cldev_unregister_notify' 
defined but not used [-Wunused-function]
static int mei_cldev_unregister_notify(struct notifier_block *nb)
   ^
   Cyclomatic Complexity 5 include/linux/compiler.h:__read_once_size
   Cyclomatic Complexity 5 include/linux/compiler.h:__write_once_size
   Cyclomatic Complexity 3 include/linux/string.h:memset
   Cyclomatic Complexity 4 include/linux/string.h:memcpy
   Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:ffs
   Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls
   Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32
   Cyclomatic Complexity 3 include/linux/log2.h:is_power_of_2
   Cyclomatic Complexity 1 include/linux/list.h:INIT_LIST_HEAD
   Cyclomatic Complexity 1 include/linux/err.h:ERR_PTR
   Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:atomic_read
   Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:atomic_set
   Cyclomatic Complexity 1 include/asm-generic/atomic-long.h:atomic_long_read
   Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order
   Cyclomatic Complexity 1 include/linux/mutex.h:__mutex_owner
   Cyclomatic Complexity 1 include/linux/mutex.h:mutex_is_locked
   Cyclomatic Complexity 1 include/linux/jiffies.h:_msecs_to_jiffies
   Cyclomatic Complexity 3 include/linux/jiffies.h:msecs_to_jiffies
   Cyclomatic Complexity 1 include/linux/jiffies.h:_usecs_to_jiffies
   Cyclomatic Complexity 3 include/linux/jiffies.h:usecs_to_jiffies
   Cyclomatic Complexity 1 include/linux/kasan.h:kasan_kmalloc
   Cyclomatic Complexity 28 include/linux/slab.h:kmalloc_index
   Cyclomatic Complexity 1 include/linux/slab.h:kmem_cache_alloc_trace
   Cyclomatic Complexity 1 include/linux/slab.h:kmalloc_order_trace
   Cyclomatic Complexity 67 include/linux/slab.h:kmalloc_large
   Cyclomatic Complexity 5 include/linux/slab.h:kmalloc
   Cyclomatic Complexity 1 include/linux/slab.h:kzalloc
   Cyclomatic Complexity 1 include/linux/ww_mutex.h:ww_mutex_is_locked
   Cyclomatic Complexity 1 include/drm/drm_modeset_lock.h:drm_modeset_is_locked
   Cyclomatic Complexity 1 
include/drm/drm_modeset_helper_vtables.h:drm_connector_helper_add
   Cyclomatic Complexity 1 include/drm/drm_dp_helper.h:drm_dp_max_lane_count
   Cyclomatic Complexity 3 include/drm/drm_dp_helper.h:drm_dp_enhanced_frame_cap
   Cyclomatic Complexity 1 include/drm/drm_dp_helper.h:drm_dp_is_branch
   Cyclomatic Complexity 1 include/drm/drm_dp_helper.h:drm_dp_has_quirk
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/i915_reg.h:i915_mmio_reg_offset
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/i915_reg.h:i915_mmio_reg_equal
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/i915_reg.h:i915_mmio_reg_valid
   Cyclomatic Complexity 2 drivers/gpu//drm/i915/i915_utils.h:onoff
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/i915_drv.h:intel_info
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/i915_drv.h:msecs_to_jiffies_timeout
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/intel_drv.h:intel_get_crtc_for_pipe
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_drv.h:intel_crtc_has_type
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/intel_drv.h:intel_crtc_has_dp_encoder
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/intel_drv.h:intel_dp_unused_lane_mask
   Cyclomatic Complexity 3 
drivers/gpu//drm/i915/intel_dp.c:intel_dp_rate_limit_len
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/intel_dp.c:intel_dp_common_len_rate_limit
   Cyclomatic Complexity 1 
drivers/gpu//drm/i915/intel_dp.c:intel_dp_max_common_rate
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_dp.c:intel_dp_rate_index
   Cyclomatic Complexity 3 drivers/gp

Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

2018-04-03 Thread kbuild test robot 
Hi Ramalingam,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20180403]
[cannot apply to v4.16]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-Implement-HDCP2-2/20180404-031743
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x071-201813 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All warnings (new ones prefixed by >>):

   In file included from include/drm/drm_mm.h:49:0,
from include/drm/drmP.h:73,
from drivers/gpu/drm/i915/intel_dp.c:36:
   drivers/gpu/drm/i915/intel_dp.c: In function 'intel_dp_hdcp2_read_rx_status':
>> drivers/gpu/drm/i915/intel_dp.c:5377:13: warning: format '%ld' expects 
>> argument of type 'long int', but argument 2 has type 'ssize_t {aka int}' 
>> [-Wformat=]
  DRM_ERROR("Read bstatus from DP/AUX failed (%ld)\n", ret);
^
   include/drm/drm_print.h:239:10: note: in definition of macro 'DRM_ERROR'
 drm_err(fmt, ##__VA_ARGS__)
 ^~~
   In file included from drivers/gpu/drm/i915/intel_dp.c:34:0:
   At top level:
   include/linux/mei_hdcp.h:148:12: warning: 'mei_cldev_unregister_notify' 
defined but not used [-Wunused-function]
static int mei_cldev_unregister_notify(struct notifier_block *nb)
   ^~~
   include/linux/mei_hdcp.h:144:12: warning: 'mei_cldev_register_notify' 
defined but not used [-Wunused-function]
static int mei_cldev_register_notify(struct notifier_block *nb)
   ^

vim +5377 drivers/gpu/drm/i915/intel_dp.c

  5366  
  5367  static inline
  5368  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port 
*intel_dig_port,
  5369uint8_t *rx_status)
  5370  {
  5371  ssize_t ret;
  5372  
  5373  ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
  5374 DP_HDCP_2_2_REG_RXSTATUS_OFFSET, 
rx_status,
  5375 HDCP_2_2_DP_RXSTATUS_LEN);
  5376  if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
> 5377  DRM_ERROR("Read bstatus from DP/AUX failed (%ld)\n", 
> ret);
  5378  return ret >= 0 ? -EIO : ret;
  5379  }
  5380  
  5381  return 0;
  5382  }
  5383  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


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[Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

2018-04-03 Thread Ramalingam C 
Implements the DP adaptation specific HDCP2.2 functions.

These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.

Note: Chris Wilson suggested alternate method for waiting for CP_IRQ,
than completions concept. WIP to understand and implement that,
if needed. Just to unblock the review of other changes, v2 still
continues with completions.

v2:
  wait for cp_irq is merged with this patch. Rebased.
v3:
  wait_queue is used for wait for cp_irq [Chris Wilson]

Signed-off-by: Ramalingam C 
---
 drivers/gpu/drm/i915/intel_dp.c   | 352 ++
 drivers/gpu/drm/i915/intel_drv.h  |   7 +
 drivers/gpu/drm/i915/intel_hdcp.c |   5 +
 3 files changed, 364 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f92c0326fff5..e5cb54ceda38 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -31,6 +31,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -5070,6 +5071,28 @@ void intel_dp_encoder_suspend(struct intel_encoder 
*intel_encoder)
pps_unlock(intel_dp);
 }
 
+static int intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp,
+int timeout)
+{
+   long ret;
+
+   /* Reinit */
+   atomic_set(&hdcp->cp_irq_recved, 0);
+
+#define C (atomic_read(&hdcp->cp_irq_recved) > 0)
+   ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
+  msecs_to_jiffies(timeout));
+
+   if (ret > 0) {
+   atomic_set(&hdcp->cp_irq_recved, 0);
+   return 0;
+   } else if (!ret) {
+   return -ETIMEDOUT;
+   }
+   return (int)ret;
+}
+
+
 static
 int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
u8 *an)
@@ -5288,6 +5311,329 @@ int intel_dp_hdcp_capable(struct intel_digital_port 
*intel_dig_port,
return 0;
 }
 
+static inline
+int intel_dpcd_offset_for_hdcp2_msgid(uint8_t byte, unsigned int *offset)
+{
+   switch (byte) {
+   case HDCP_2_2_AKE_INIT:
+   *offset = DP_HDCP_2_2_AKE_INIT_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_CERT:
+   *offset = DP_HDCP_2_2_AKE_SEND_CERT_OFFSET;
+   break;
+   case HDCP_2_2_AKE_NO_STORED_KM:
+   *offset = DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET;
+   break;
+   case HDCP_2_2_AKE_STORED_KM:
+   *offset = DP_HDCP_2_2_AKE_STORED_KM_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_HPRIME:
+   *offset = DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET;
+   break;
+   case HDCP_2_2_AKE_SEND_PARING_INFO:
+   *offset = DP_HDCP_2_2_AKE_SEND_PARING_INFO_OFFSET;
+   break;
+   case HDCP_2_2_LC_INIT:
+   *offset = DP_HDCP_2_2_LC_INIT_OFFSET;
+   break;
+   case HDCP_2_2_LC_SEND_LPRIME:
+   *offset = DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET;
+   break;
+   case HDCP_2_2_SKE_SEND_EKS:
+   *offset = DP_HDCP_2_2_SKE_SEND_EKS_OFFSET;
+   break;
+   case HDCP_2_2_REP_SEND_RECVID_LIST:
+   *offset = DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET;
+   break;
+   case HDCP_2_2_REP_SEND_ACK:
+   *offset = DP_HDCP_2_2_REP_SEND_ACK_OFFSET;
+   break;
+   case HDCP_2_2_REP_STREAM_MANAGE:
+   *offset = DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET;
+   break;
+   case HDCP_2_2_REP_STREAM_READY:
+   *offset = DP_HDCP_2_2_REP_STREAM_READY_OFFSET;
+   break;
+   case HDCP_2_2_ERRATA_DP_STREAM_TYPE:
+   *offset = DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET;
+   break;
+   default:
+   DRM_ERROR("Unrecognized Msg ID\n");
+   return -EINVAL;
+   }
+   return 0;
+}
+
+static inline
+int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
+ uint8_t *rx_status)
+{
+   ssize_t ret;
+
+   ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
+  DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
+  HDCP_2_2_DP_RXSTATUS_LEN);
+   if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
+   DRM_ERROR("Read bstatus from DP/AUX failed (%ld)\n", ret);
+   return ret >= 0 ? -EIO : ret;
+   }
+
+   return 0;
+}
+
+static inline
+int intel_dp_hdcp2_timeout_for_msg(uint8_t msg_id, bool paired)
+{
+   int timeout = -EINVAL;
+
+   switch (msg_id) {
+   case HDCP_2_2_AKE_SEND_CERT:
+   timeout = HDCP_2_2_CERT_TIMEOUT;
+   break;
+   case HDCP_2_2_AKE_SEND_HPRIME:
+   if (paired)
+   timeout = HDCP_2_2_HPRIME_PAIRED_TIMEOUT;
+   else
+   timeout = HDCP