Re: [Intel-gfx] [PATCH v4 06/11] drm/i915: refactor pll code out into intel_dpll.c

[Ville Syrjälä]

On Wed, Dec 16, 2020 at 01:29:13PM +0200, Jani Nikula wrote:

> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index dfa3966e5fa1..37a9f304cb55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1811,4 +1811,17 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
>   return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
>  }
>  
> +static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> +{
> + if (dev_priv->params.panel_use_ssc >= 0)
> + return dev_priv->params.panel_use_ssc != 0;
> + return dev_priv->vbt.lvds_use_ssc
> + && !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
> +}
> +
> +static inline u32 i9xx_dpll_compute_fp(struct dpll *dpll)
> +{
> + return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;
> +}

Was wondering why this is here, but looks like it's the i830 pipe power
well thing that needs it.

Reviewed-by: Ville Syrjälä 

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH v4 06/11] drm/i915: refactor pll code out into intel_dpll.c

[Jani Nikula]

From: Dave Airlie 

This pulls a large chunk of the pll calculation code out of
intel_display.c to a new file.

One function makes sense to be an inline, otherwise this
is pretty much a straight copy cover. Also all the
remaining hooks for g45 and older end up the same now.

Signed-off-by: Dave Airlie 
[Jani: cleaned up intel_dpll.h a bit, de-duped intel_panel_use_ssc().]
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/Makefile |1 +
 drivers/gpu/drm/i915/display/intel_display.c  | 1402 +
 drivers/gpu/drm/i915/display/intel_display.h  |3 +
 .../drm/i915/display/intel_display_types.h|   13 +
 drivers/gpu/drm/i915/display/intel_dpll.c | 1363 
 drivers/gpu/drm/i915/display/intel_dpll.h |   23 +
 6 files changed, 1414 insertions(+), 1391 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_dpll.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_dpll.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f2e907333f72..f2424d67f306 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -203,6 +203,7 @@ i915-y += \
display/intel_display.o \
display/intel_display_power.o \
display/intel_dpio_phy.o \
+   display/intel_dpll.o \
display/intel_dpll_mgr.o \
display/intel_dsb.o \
display/intel_fbc.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 530222e68ee2..a559abf602cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -48,6 +48,7 @@
 #include "display/intel_display_debugfs.h"
 #include "display/intel_dp.h"
 #include "display/intel_dp_mst.h"
+#include "display/intel_dpll.h"
 #include "display/intel_dpll_mgr.h"
 #include "display/intel_dsi.h"
 #include "display/intel_dvo.h"
@@ -114,17 +115,6 @@ static void ilk_pfit_enable(const struct intel_crtc_state 
*crtc_state);
 static void intel_modeset_setup_hw_state(struct drm_device *dev,
 struct drm_modeset_acquire_ctx *ctx);
 
-struct intel_limit {
-   struct {
-   int min, max;
-   } dot, vco, n, m, m1, m2, p, p1;
-
-   struct {
-   int dot_limit;
-   int p2_slow, p2_fast;
-   } p2;
-};
-
 /* returns HPLL frequency in kHz */
 int vlv_get_hpll_vco(struct drm_i915_private *dev_priv)
 {
@@ -192,271 +182,6 @@ static u32 intel_fdi_link_freq(struct drm_i915_private 
*dev_priv,
return dev_priv->fdi_pll_freq;
 }
 
-static const struct intel_limit intel_limits_i8xx_dac = {
-   .dot = { .min = 25000, .max = 35 },
-   .vco = { .min = 908000, .max = 1512000 },
-   .n = { .min = 2, .max = 16 },
-   .m = { .min = 96, .max = 140 },
-   .m1 = { .min = 18, .max = 26 },
-   .m2 = { .min = 6, .max = 16 },
-   .p = { .min = 4, .max = 128 },
-   .p1 = { .min = 2, .max = 33 },
-   .p2 = { .dot_limit = 165000,
-   .p2_slow = 4, .p2_fast = 2 },
-};
-
-static const struct intel_limit intel_limits_i8xx_dvo = {
-   .dot = { .min = 25000, .max = 35 },
-   .vco = { .min = 908000, .max = 1512000 },
-   .n = { .min = 2, .max = 16 },
-   .m = { .min = 96, .max = 140 },
-   .m1 = { .min = 18, .max = 26 },
-   .m2 = { .min = 6, .max = 16 },
-   .p = { .min = 4, .max = 128 },
-   .p1 = { .min = 2, .max = 33 },
-   .p2 = { .dot_limit = 165000,
-   .p2_slow = 4, .p2_fast = 4 },
-};
-
-static const struct intel_limit intel_limits_i8xx_lvds = {
-   .dot = { .min = 25000, .max = 35 },
-   .vco = { .min = 908000, .max = 1512000 },
-   .n = { .min = 2, .max = 16 },
-   .m = { .min = 96, .max = 140 },
-   .m1 = { .min = 18, .max = 26 },
-   .m2 = { .min = 6, .max = 16 },
-   .p = { .min = 4, .max = 128 },
-   .p1 = { .min = 1, .max = 6 },
-   .p2 = { .dot_limit = 165000,
-   .p2_slow = 14, .p2_fast = 7 },
-};
-
-static const struct intel_limit intel_limits_i9xx_sdvo = {
-   .dot = { .min = 2, .max = 40 },
-   .vco = { .min = 140, .max = 280 },
-   .n = { .min = 1, .max = 6 },
-   .m = { .min = 70, .max = 120 },
-   .m1 = { .min = 8, .max = 18 },
-   .m2 = { .min = 3, .max = 7 },
-   .p = { .min = 5, .max = 80 },
-   .p1 = { .min = 1, .max = 8 },
-   .p2 = { .dot_limit = 20,
-   .p2_slow = 10, .p2_fast = 5 },
-};
-
-static const struct intel_limit intel_limits_i9xx_lvds = {
-   .dot = { .min = 2, .max = 40 },
-   .vco = { .min = 140, .max = 280 },
-   .n = { .min = 1, .max = 6 },
-   .m = { .min = 70, .max = 120 },
-   .m1 = { .min = 8, .max = 18 },
-   .m2 = { .min = 3, .max = 7 },
-   .p = { .min = 7, .max = 98 },
-   .p1 = { .min = 1, .max = 8 },
-   .p2 = { .dot_limit = 112000,
-   .p2_slow = 14,