Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-09-17 Thread Maarten Lankhorst 
Op 16-09-2019 om 21:19 schreef Manasi Navare:
> On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 29-07-2019 om 21:17 schreef Manasi Navare:
>>> Hi Ville,
>>>
>>> Thanks for your review, so do we want to merge this as is or
>>> do we need some function to reject the 8K mode on ICL in 
>>> intel_dp_mode_valid()?
>>>
>>> Manasi
>> I've pushed this series as-is because it blocks my bigjoiner work. We should 
>> probably reject modes in the connector specific functions if we can't handle 
>> it. :)
> Thanks Maarten. So in case of intel_dp_mode_valid() for example the 8K mode 
> will be rejected if big joiner not supported correct?
Yeah, limits are too high. :)
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Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-09-16 Thread Manasi Navare 
On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote:
> Hey,
> 
> Op 29-07-2019 om 21:17 schreef Manasi Navare:
> > Hi Ville,
> >
> > Thanks for your review, so do we want to merge this as is or
> > do we need some function to reject the 8K mode on ICL in 
> > intel_dp_mode_valid()?
> >
> > Manasi
> 
> I've pushed this series as-is because it blocks my bigjoiner work. We should 
> probably reject modes in the connector specific functions if we can't handle 
> it. :)

Thanks Maarten. So in case of intel_dp_mode_valid() for example the 8K mode 
will be rejected if big joiner not supported correct?

Manasi

> 
> 
> >
> > On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote:
> >> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> >>> On ICL+, the vertical limits for the transcoders are increased to 8192
> >>> and horizontal limits are bumped to 16K so bump up
> >>> limits in intel_mode_valid()
> >>>
> >>> v4:
> >>> * Increase the hdisplay to 16K (Ville)
> >>> v3:
> >>> * Supported starting ICL (Ville)
> >>> * Use the higher limits from TRANS_VTOTAL register (Ville)
> >>> v2:
> >>> * Checkpatch warning (Manasi)
> >>>
> >>> Cc: Maarten Lankhorst 
> >>> Cc: Ville Syrjälä 
> >>> Signed-off-by: Manasi Navare 
> >> Reviewed-by: Ville Syrjälä 
> >>
> >>> ---
> >>>  drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
> >>>  1 file changed, 7 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> >>> b/drivers/gpu/drm/i915/display/intel_display.c
> >>> index f07081815b80..15006764862b 100644
> >>> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >>> @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
> >>>  DRM_MODE_FLAG_CLKDIV2))
> >>>   return MODE_BAD;
> >>>  
> >>> - if (INTEL_GEN(dev_priv) >= 9 ||
> >>> - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> >>> + if (INTEL_GEN(dev_priv) >= 11) {
> >>> + hdisplay_max = 16384;
> >>> + vdisplay_max = 8192;
> >>> + htotal_max = 16384;
> >>> + vtotal_max = 8192;
> >>> + } else if (INTEL_GEN(dev_priv) >= 9 ||
> >>> +IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> >>>   hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
> >>>   vdisplay_max = 4096;
> >>>   htotal_max = 8192;
> >>> -- 
> >>> 2.19.1
> >> -- 
> >> Ville Syrjälä
> >> Intel
> 
> 
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Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-09-13 Thread Maarten Lankhorst 
Hey,

Op 29-07-2019 om 21:17 schreef Manasi Navare:
> Hi Ville,
>
> Thanks for your review, so do we want to merge this as is or
> do we need some function to reject the 8K mode on ICL in 
> intel_dp_mode_valid()?
>
> Manasi

I've pushed this series as-is because it blocks my bigjoiner work. We should 
probably reject modes in the connector specific functions if we can't handle 
it. :)


>
> On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote:
>> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
>>> On ICL+, the vertical limits for the transcoders are increased to 8192
>>> and horizontal limits are bumped to 16K so bump up
>>> limits in intel_mode_valid()
>>>
>>> v4:
>>> * Increase the hdisplay to 16K (Ville)
>>> v3:
>>> * Supported starting ICL (Ville)
>>> * Use the higher limits from TRANS_VTOTAL register (Ville)
>>> v2:
>>> * Checkpatch warning (Manasi)
>>>
>>> Cc: Maarten Lankhorst 
>>> Cc: Ville Syrjälä 
>>> Signed-off-by: Manasi Navare 
>> Reviewed-by: Ville Syrjälä 
>>
>>> ---
>>>  drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
>>>  1 file changed, 7 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
>>> b/drivers/gpu/drm/i915/display/intel_display.c
>>> index f07081815b80..15006764862b 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
>>>DRM_MODE_FLAG_CLKDIV2))
>>> return MODE_BAD;
>>>  
>>> -   if (INTEL_GEN(dev_priv) >= 9 ||
>>> -   IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
>>> +   if (INTEL_GEN(dev_priv) >= 11) {
>>> +   hdisplay_max = 16384;
>>> +   vdisplay_max = 8192;
>>> +   htotal_max = 16384;
>>> +   vtotal_max = 8192;
>>> +   } else if (INTEL_GEN(dev_priv) >= 9 ||
>>> +  IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
>>> hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
>>> vdisplay_max = 4096;
>>> htotal_max = 8192;
>>> -- 
>>> 2.19.1
>> -- 
>> Ville Syrjälä
>> Intel


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Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-07-29 Thread Manasi Navare 
Hi Ville,

Thanks for your review, so do we want to merge this as is or
do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()?

Manasi

On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> > On ICL+, the vertical limits for the transcoders are increased to 8192
> > and horizontal limits are bumped to 16K so bump up
> > limits in intel_mode_valid()
> > 
> > v4:
> > * Increase the hdisplay to 16K (Ville)
> > v3:
> > * Supported starting ICL (Ville)
> > * Use the higher limits from TRANS_VTOTAL register (Ville)
> > v2:
> > * Checkpatch warning (Manasi)
> > 
> > Cc: Maarten Lankhorst 
> > Cc: Ville Syrjälä 
> > Signed-off-by: Manasi Navare 
> 
> Reviewed-by: Ville Syrjälä 
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
> >  1 file changed, 7 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index f07081815b80..15006764862b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
> >DRM_MODE_FLAG_CLKDIV2))
> > return MODE_BAD;
> >  
> > -   if (INTEL_GEN(dev_priv) >= 9 ||
> > -   IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > +   if (INTEL_GEN(dev_priv) >= 11) {
> > +   hdisplay_max = 16384;
> > +   vdisplay_max = 8192;
> > +   htotal_max = 16384;
> > +   vtotal_max = 8192;
> > +   } else if (INTEL_GEN(dev_priv) >= 9 ||
> > +  IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
> > vdisplay_max = 4096;
> > htotal_max = 8192;
> > -- 
> > 2.19.1
> 
> -- 
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-07-12 Thread Ville Syrjälä 
On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> On ICL+, the vertical limits for the transcoders are increased to 8192
> and horizontal limits are bumped to 16K so bump up
> limits in intel_mode_valid()
> 
> v4:
> * Increase the hdisplay to 16K (Ville)
> v3:
> * Supported starting ICL (Ville)
> * Use the higher limits from TRANS_VTOTAL register (Ville)
> v2:
> * Checkpatch warning (Manasi)
> 
> Cc: Maarten Lankhorst 
> Cc: Ville Syrjälä 
> Signed-off-by: Manasi Navare 

Reviewed-by: Ville Syrjälä 

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f07081815b80..15006764862b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
>  DRM_MODE_FLAG_CLKDIV2))
>   return MODE_BAD;
>  
> - if (INTEL_GEN(dev_priv) >= 9 ||
> - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> + if (INTEL_GEN(dev_priv) >= 11) {
> + hdisplay_max = 16384;
> + vdisplay_max = 8192;
> + htotal_max = 16384;
> + vtotal_max = 8192;
> + } else if (INTEL_GEN(dev_priv) >= 9 ||
> +IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
>   hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
>   vdisplay_max = 4096;
>   htotal_max = 8192;
> -- 
> 2.19.1

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

2019-07-12 Thread Manasi Navare 
On ICL+, the vertical limits for the transcoders are increased to 8192
and horizontal limits are bumped to 16K so bump up
limits in intel_mode_valid()

v4:
* Increase the hdisplay to 16K (Ville)
v3:
* Supported starting ICL (Ville)
* Use the higher limits from TRANS_VTOTAL register (Ville)
v2:
* Checkpatch warning (Manasi)

Cc: Maarten Lankhorst 
Cc: Ville Syrjälä 
Signed-off-by: Manasi Navare 
---
 drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index f07081815b80..15006764862b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
   DRM_MODE_FLAG_CLKDIV2))
return MODE_BAD;
 
-   if (INTEL_GEN(dev_priv) >= 9 ||
-   IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
+   if (INTEL_GEN(dev_priv) >= 11) {
+   hdisplay_max = 16384;
+   vdisplay_max = 8192;
+   htotal_max = 16384;
+   vtotal_max = 8192;
+   } else if (INTEL_GEN(dev_priv) >= 9 ||
+  IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
vdisplay_max = 4096;
htotal_max = 8192;
-- 
2.19.1

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