Re: [Intel-gfx] [PATCH v8 1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

2018-02-06 Thread Yaodong Li 



On 02/06/2018 01:11 PM, Michal Wajdeczko wrote:
On Tue, 06 Feb 2018 06:15:54 +0100, Sagar Arun Kamble 
 wrote:




On 2/6/2018 5:32 AM, Jackie Li wrote:

intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
should not be defined in intel_guc_reg.h

This patch creates a better file structure by moving non-register 
related
GuC WOPCM macro definitions into a new header intel_guc_wopcm.h and 
moving

GuC WOPCM related functions to a new source file intel_guc_wopcm.c as
future patches will increase the complexity of determining the GuC 
WOPCM

offset and size.


Hmm, I'm not sure that we need such low-details explanation that repeats
filenames listed below. Maybe it can like this:

"New file structure is needed as future patches will increase the
complexity of determining the GuC WOPCM offset and size."



v8:
  - Fixed naming, coding style issues and typo in commit message 
(Sagar)
  - Updated commit message to explain why we need create new file 
for GuC

    WOPCM related code (Chris)

Cc: Michal Wajdeczko 
Cc: Sagar Arun Kamble 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Sagar Arun Kamble  (v7)
Signed-off-by: Jackie Li 

Minor change in function comment needed below as per kernel-doc format.
Otherwise, change is good.
Reviewed-by: Sagar Arun Kamble 

---
  drivers/gpu/drm/i915/Makefile  |  1 +
  drivers/gpu/drm/i915/intel_guc.c   | 11 
  drivers/gpu/drm/i915/intel_guc.h   |  2 +-
  drivers/gpu/drm/i915/intel_guc_reg.h   |  4 ---
  drivers/gpu/drm/i915/intel_guc_wopcm.c | 46 
++
  drivers/gpu/drm/i915/intel_guc_wopcm.h | 39 


  drivers/gpu/drm/i915/intel_uc.c    |  2 +-
  drivers/gpu/drm/i915/intel_uc_fw.c |  2 +-
  8 files changed, 89 insertions(+), 18 deletions(-)
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.c
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.h

diff --git a/drivers/gpu/drm/i915/Makefile 
b/drivers/gpu/drm/i915/Makefile

index 3bddd8a..1dc9988 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -88,6 +88,7 @@ i915-y += intel_uc.o \
    intel_guc_fw.o \
    intel_guc_log.o \
    intel_guc_submission.o \
+  intel_guc_wopcm.o \
    intel_huc.o
    # autogenerated null render state
diff --git a/drivers/gpu/drm/i915/intel_guc.c 
b/drivers/gpu/drm/i915/intel_guc.c

index 21140cc..9f45e6d 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -509,14 +509,3 @@ struct i915_vma *intel_guc_allocate_vma(struct 
intel_guc *guc, u32 size)

  i915_gem_object_put(obj);
  return vma;
  }
-
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv)
-{
-    u32 wopcm_size = GUC_WOPCM_TOP;
-
-    /* On BXT, the top of WOPCM is reserved for RC6 context */
-    if (IS_GEN9_LP(dev_priv))
-    wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
-
-    return wopcm_size;
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h 
b/drivers/gpu/drm/i915/intel_guc.h

index 52856a9..9e0a97e 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -31,6 +31,7 @@
  #include "intel_guc_ct.h"
  #include "intel_guc_log.h"
  #include "intel_guc_reg.h"
+#include "intel_guc_wopcm.h"
  #include "intel_uc_fw.h"
  #include "i915_vma.h"
  @@ -130,6 +131,5 @@ int intel_guc_auth_huc(struct intel_guc *guc, 
u32 rsa_offset);

  int intel_guc_suspend(struct drm_i915_private *dev_priv);
  int intel_guc_resume(struct drm_i915_private *dev_priv);
  struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 
size);

-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
    #endif
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h 
b/drivers/gpu/drm/i915/intel_guc_reg.h

index 19a9247..1f52fb8 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -68,7 +68,6 @@
  #define DMA_GUC_WOPCM_OFFSET    _MMIO(0xc340)
  #define   HUC_LOADING_AGENT_VCR  (0<<1)
  #define   HUC_LOADING_AGENT_GUC  (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE  0x8    /* 512KB */
  #define GUC_MAX_IDLE_COUNT    _MMIO(0xC3E4)
    #define HUC_STATUS2 _MMIO(0xD3B0)
@@ -76,9 +75,6 @@
    /* Defines WOPCM space available to GuC firmware */
  #define GUC_WOPCM_SIZE    _MMIO(0xc050)
-/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
-#define   GUC_WOPCM_TOP  (0x80 << 12)    /* 512KB */
-#define   BXT_GUC_WOPCM_RC6_RESERVED  (0x10 << 12)    /* 64KB  */
    /* GuC addresses above GUC_GGTT_TOP also don't map through the 
GTT */

  #define GUC_GGTT_TOP    0xFEE0
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c 
b/drivers/gpu/drm/i915/intel_guc_wopcm.c

new file mode 100644
index 000..73be9af
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright © 2017 Intel Corporation

Re: [Intel-gfx] [PATCH v8 1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

2018-02-06 Thread Michal Wajdeczko 
On Tue, 06 Feb 2018 06:15:54 +0100, Sagar Arun Kamble  
 wrote:




On 2/6/2018 5:32 AM, Jackie Li wrote:

intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
should not be defined in intel_guc_reg.h

This patch creates a better file structure by moving non-register  
related
GuC WOPCM macro definitions into a new header intel_guc_wopcm.h and  
moving

GuC WOPCM related functions to a new source file intel_guc_wopcm.c as
future patches will increase the complexity of determining the GuC WOPCM
offset and size.


Hmm, I'm not sure that we need such low-details explanation that repeats
filenames listed below. Maybe it can like this:

"New file structure is needed as future patches will increase the
complexity of determining the GuC WOPCM offset and size."



v8:
  - Fixed naming, coding style issues and typo in commit message (Sagar)
  - Updated commit message to explain why we need create new file for  
GuC

WOPCM related code (Chris)

Cc: Michal Wajdeczko 
Cc: Sagar Arun Kamble 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Sagar Arun Kamble  (v7)
Signed-off-by: Jackie Li 

Minor change in function comment needed below as per kernel-doc format.
Otherwise, change is good.
Reviewed-by: Sagar Arun Kamble 

---
  drivers/gpu/drm/i915/Makefile  |  1 +
  drivers/gpu/drm/i915/intel_guc.c   | 11 
  drivers/gpu/drm/i915/intel_guc.h   |  2 +-
  drivers/gpu/drm/i915/intel_guc_reg.h   |  4 ---
  drivers/gpu/drm/i915/intel_guc_wopcm.c | 46  
++
  drivers/gpu/drm/i915/intel_guc_wopcm.h | 39  


  drivers/gpu/drm/i915/intel_uc.c|  2 +-
  drivers/gpu/drm/i915/intel_uc_fw.c |  2 +-
  8 files changed, 89 insertions(+), 18 deletions(-)
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.c
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.h

diff --git a/drivers/gpu/drm/i915/Makefile  
b/drivers/gpu/drm/i915/Makefile

index 3bddd8a..1dc9988 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -88,6 +88,7 @@ i915-y += intel_uc.o \
  intel_guc_fw.o \
  intel_guc_log.o \
  intel_guc_submission.o \
+ intel_guc_wopcm.o \
  intel_huc.o
# autogenerated null render state
diff --git a/drivers/gpu/drm/i915/intel_guc.c  
b/drivers/gpu/drm/i915/intel_guc.c

index 21140cc..9f45e6d 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -509,14 +509,3 @@ struct i915_vma *intel_guc_allocate_vma(struct  
intel_guc *guc, u32 size)

i915_gem_object_put(obj);
return vma;
  }
-
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv)
-{
-   u32 wopcm_size = GUC_WOPCM_TOP;
-
-   /* On BXT, the top of WOPCM is reserved for RC6 context */
-   if (IS_GEN9_LP(dev_priv))
-   wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
-
-   return wopcm_size;
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h  
b/drivers/gpu/drm/i915/intel_guc.h

index 52856a9..9e0a97e 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -31,6 +31,7 @@
  #include "intel_guc_ct.h"
  #include "intel_guc_log.h"
  #include "intel_guc_reg.h"
+#include "intel_guc_wopcm.h"
  #include "intel_uc_fw.h"
  #include "i915_vma.h"
  @@ -130,6 +131,5 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32  
rsa_offset);

  int intel_guc_suspend(struct drm_i915_private *dev_priv);
  int intel_guc_resume(struct drm_i915_private *dev_priv);
  struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32  
size);

-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
#endif
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h  
b/drivers/gpu/drm/i915/intel_guc_reg.h

index 19a9247..1f52fb8 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -68,7 +68,6 @@
  #define DMA_GUC_WOPCM_OFFSET  _MMIO(0xc340)
  #define   HUC_LOADING_AGENT_VCR (0<<1)
  #define   HUC_LOADING_AGENT_GUC (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE 0x8   /* 512KB */
  #define GUC_MAX_IDLE_COUNT_MMIO(0xC3E4)
#define HUC_STATUS2 _MMIO(0xD3B0)
@@ -76,9 +75,6 @@
/* Defines WOPCM space available to GuC firmware */
  #define GUC_WOPCM_SIZE_MMIO(0xc050)
-/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
-#define   GUC_WOPCM_TOP  (0x80 << 12)/* 512KB */
-#define   BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12)/* 64KB  */
/* GuC addresses above GUC_GGTT_TOP also don't map through the GTT  
*/

  #define GUC_GGTT_TOP  0xFEE0
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c  
b/drivers/gpu/drm/i915/intel_guc_wopcm.c

new file mode 100644
index 000..73be9af
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -0,0 +1,4

Re: [Intel-gfx] [PATCH v8 1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

2018-02-05 Thread Sagar Arun Kamble 


On 2/6/2018 5:32 AM, Jackie Li wrote:

intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
should not be defined in intel_guc_reg.h

This patch creates a better file structure by moving non-register related
GuC WOPCM macro definitions into a new header intel_guc_wopcm.h and moving
GuC WOPCM related functions to a new source file intel_guc_wopcm.c as
future patches will increase the complexity of determining the GuC WOPCM
offset and size.

v8:
  - Fixed naming, coding style issues and typo in commit message (Sagar)
  - Updated commit message to explain why we need create new file for GuC
WOPCM related code (Chris)

Cc: Michal Wajdeczko 
Cc: Sagar Arun Kamble 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Sagar Arun Kamble  (v7)
Signed-off-by: Jackie Li 

Minor change in function comment needed below as per kernel-doc format.
Otherwise, change is good.
Reviewed-by: Sagar Arun Kamble 

---
  drivers/gpu/drm/i915/Makefile  |  1 +
  drivers/gpu/drm/i915/intel_guc.c   | 11 
  drivers/gpu/drm/i915/intel_guc.h   |  2 +-
  drivers/gpu/drm/i915/intel_guc_reg.h   |  4 ---
  drivers/gpu/drm/i915/intel_guc_wopcm.c | 46 ++
  drivers/gpu/drm/i915/intel_guc_wopcm.h | 39 
  drivers/gpu/drm/i915/intel_uc.c|  2 +-
  drivers/gpu/drm/i915/intel_uc_fw.c |  2 +-
  8 files changed, 89 insertions(+), 18 deletions(-)
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.c
  create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3bddd8a..1dc9988 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -88,6 +88,7 @@ i915-y += intel_uc.o \
  intel_guc_fw.o \
  intel_guc_log.o \
  intel_guc_submission.o \
+ intel_guc_wopcm.o \
  intel_huc.o
  
  # autogenerated null render state

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 21140cc..9f45e6d 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -509,14 +509,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc 
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
  }
-
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv)
-{
-   u32 wopcm_size = GUC_WOPCM_TOP;
-
-   /* On BXT, the top of WOPCM is reserved for RC6 context */
-   if (IS_GEN9_LP(dev_priv))
-   wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
-
-   return wopcm_size;
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 52856a9..9e0a97e 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -31,6 +31,7 @@
  #include "intel_guc_ct.h"
  #include "intel_guc_log.h"
  #include "intel_guc_reg.h"
+#include "intel_guc_wopcm.h"
  #include "intel_uc_fw.h"
  #include "i915_vma.h"
  
@@ -130,6 +131,5 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);

  int intel_guc_suspend(struct drm_i915_private *dev_priv);
  int intel_guc_resume(struct drm_i915_private *dev_priv);
  struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
  
  #endif

diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h 
b/drivers/gpu/drm/i915/intel_guc_reg.h
index 19a9247..1f52fb8 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -68,7 +68,6 @@
  #define DMA_GUC_WOPCM_OFFSET  _MMIO(0xc340)
  #define   HUC_LOADING_AGENT_VCR (0<<1)
  #define   HUC_LOADING_AGENT_GUC (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE 0x8   /* 512KB */
  #define GUC_MAX_IDLE_COUNT_MMIO(0xC3E4)
  
  #define HUC_STATUS2 _MMIO(0xD3B0)

@@ -76,9 +75,6 @@
  
  /* Defines WOPCM space available to GuC firmware */

  #define GUC_WOPCM_SIZE_MMIO(0xc050)
-/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
-#define   GUC_WOPCM_TOP  (0x80 << 12)/* 512KB */
-#define   BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12)/* 64KB  */
  
  /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */

  #define GUC_GGTT_TOP  0xFEE0
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c 
b/drivers/gpu/drm/i915/intel_guc_wopcm.c
new file mode 100644
index 000..73be9af
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, dis

[Intel-gfx] [PATCH v8 1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

2018-02-05 Thread Jackie Li 
intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
should not be defined in intel_guc_reg.h

This patch creates a better file structure by moving non-register related
GuC WOPCM macro definitions into a new header intel_guc_wopcm.h and moving
GuC WOPCM related functions to a new source file intel_guc_wopcm.c as
future patches will increase the complexity of determining the GuC WOPCM
offset and size.

v8:
 - Fixed naming, coding style issues and typo in commit message (Sagar)
 - Updated commit message to explain why we need create new file for GuC
   WOPCM related code (Chris)

Cc: Michal Wajdeczko 
Cc: Sagar Arun Kamble 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Sagar Arun Kamble  (v7)
Signed-off-by: Jackie Li 
---
 drivers/gpu/drm/i915/Makefile  |  1 +
 drivers/gpu/drm/i915/intel_guc.c   | 11 
 drivers/gpu/drm/i915/intel_guc.h   |  2 +-
 drivers/gpu/drm/i915/intel_guc_reg.h   |  4 ---
 drivers/gpu/drm/i915/intel_guc_wopcm.c | 46 ++
 drivers/gpu/drm/i915/intel_guc_wopcm.h | 39 
 drivers/gpu/drm/i915/intel_uc.c|  2 +-
 drivers/gpu/drm/i915/intel_uc_fw.c |  2 +-
 8 files changed, 89 insertions(+), 18 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.c
 create mode 100644 drivers/gpu/drm/i915/intel_guc_wopcm.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3bddd8a..1dc9988 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -88,6 +88,7 @@ i915-y += intel_uc.o \
  intel_guc_fw.o \
  intel_guc_log.o \
  intel_guc_submission.o \
+ intel_guc_wopcm.o \
  intel_huc.o
 
 # autogenerated null render state
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 21140cc..9f45e6d 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -509,14 +509,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc 
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
 }
-
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv)
-{
-   u32 wopcm_size = GUC_WOPCM_TOP;
-
-   /* On BXT, the top of WOPCM is reserved for RC6 context */
-   if (IS_GEN9_LP(dev_priv))
-   wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
-
-   return wopcm_size;
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 52856a9..9e0a97e 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -31,6 +31,7 @@
 #include "intel_guc_ct.h"
 #include "intel_guc_log.h"
 #include "intel_guc_reg.h"
+#include "intel_guc_wopcm.h"
 #include "intel_uc_fw.h"
 #include "i915_vma.h"
 
@@ -130,6 +131,5 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 
rsa_offset);
 int intel_guc_suspend(struct drm_i915_private *dev_priv);
 int intel_guc_resume(struct drm_i915_private *dev_priv);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
 
 #endif
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h 
b/drivers/gpu/drm/i915/intel_guc_reg.h
index 19a9247..1f52fb8 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -68,7 +68,6 @@
 #define DMA_GUC_WOPCM_OFFSET   _MMIO(0xc340)
 #define   HUC_LOADING_AGENT_VCR  (0<<1)
 #define   HUC_LOADING_AGENT_GUC  (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE 0x8   /* 512KB */
 #define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
 
 #define HUC_STATUS2 _MMIO(0xD3B0)
@@ -76,9 +75,6 @@
 
 /* Defines WOPCM space available to GuC firmware */
 #define GUC_WOPCM_SIZE _MMIO(0xc050)
-/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
-#define   GUC_WOPCM_TOP  (0x80 << 12)  /* 512KB */
-#define   BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12)  /* 64KB  */
 
 /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */
 #define GUC_GGTT_TOP   0xFEE0
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c 
b/drivers/gpu/drm/i915/intel_guc_wopcm.c
new file mode 100644
index 000..73be9af
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission no