[Intel-gfx] [PULL] drm-intel-next-queued
Hi Dave & Daniel -
Last feature pull for v5.11.
drm-intel-next-queued-2020-11-27:
drm/i915 features for v5.11:
Highlights:
- Enable big joiner to join two pipes to one port to overcome pipe restrictions
(Manasi, Ville, Maarten)
Display:
- More DG1 enabling (Lucas, Aditya)
- Fixes to cases without display (Lucas, José, Jani)
- Initial PSR state improvements (José)
- JSL eDP vswing updates (Tejas)
- Handle EDID declared max 16 bpc (Ville)
- Display refactoring (Ville)
Other:
- GVT features
- Backmerge
BR,
Jani.
The following changes since commit e047c7be173caab95f3876ab30c03ebcf654c300:
Merge tag 'drm-intel-next-queued-2020-11-03' of
git://anongit.freedesktop.org/drm/drm-intel into drm-next (2020-11-04 12:17:34
+1000)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel
tags/drm-intel-next-queued-2020-11-27
for you to fetch changes up to b3bf99daaee96a141536ce5c60a0d6dba6ec1d23:
drm/i915/display: Defer initial modeset until after GGTT is initialised
(2020-11-26 11:01:52 +)
drm/i915 features for v5.11:
Highlights:
- Enable big joiner to join two pipes to one port to overcome pipe restrictions
(Manasi, Ville, Maarten)
Display:
- More DG1 enabling (Lucas, Aditya)
- Fixes to cases without display (Lucas, José, Jani)
- Initial PSR state improvements (José)
- JSL eDP vswing updates (Tejas)
- Handle EDID declared max 16 bpc (Ville)
- Display refactoring (Ville)
Other:
- GVT features
- Backmerge
Aditya Swarup (1):
drm/i915/dg1: Enable ports
Anusha Srivatsa (1):
drm/i915/ehl: Remove invalid PCI ID
Bob Paauwe (1):
drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platforms
Chris Wilson (2):
drm/i915/display: Whitespace cleanups
drm/i915/display: Defer initial modeset until after GGTT is initialised
Colin Xu (3):
drm/i915/gvt: Save/restore HW status to support GVT suspend/resume
drm/i915: Add GVT resume routine to i915
drm/i915/gvt: Fix virtual display setup for BXT/APL
Deepak R Varma (1):
drm/i915/gvt: replace idr_init() by idr_init_base()
Imre Deak (1):
drm/i915/tgl: Fix typo during output setup
Jani Nikula (3):
Merge drm/drm-next into drm-intel-next-queued
drm/i915/display: return earlier from intel_modeset_init() without display
Merge tag 'gvt-next-2020-11-23' of https://github.com/intel/gvt-linux
into drm-intel-next-queued
José Roberto de Souza (4):
drm/i915/display: Use initial_fastset_check() to compute and apply the
initial PSR state
drm/i915/display: Do not reset display when there is none
drm/i915/display: Group DC9 mask set
drm/i915/display: Make get_allowed_dc_mask().max_dc set a chain of if and
elses
Julian Stecklina (1):
drm/i915/gvt: treat intel_gvt_mpt as const in gvt code
Lionel Landwerlin (1):
drm/i915/perf: workaround register corruption in OATAILPTR
Lucas De Marchi (6):
drm/i915/dg1: map/unmap pll clocks
drm/i915/display: add namespace to intel_prepare_reset
drm/i915/display: add namespace to intel_finish_reset
drm/i915: re-order if/else ladder for hpd_irq_setup
drm/i915: move display-related to the end of intel_irq_init()
drm/i915: Do not setup hpd without display
Maarten Lankhorst (5):
drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split
drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
drm/i915: Try to make bigjoiner work in atomic check
drm/i915: Add bigjoiner aware plane clipping checks
drm/i915: Add debugfs dumping for bigjoiner, v3.
Manasi Navare (9):
drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes
drm/i915: Move encoder->get_config to a new function
drm/i915: Add a wrapper function around get_pipe_config
drm/i915: Pass intel_atomic_state instead of drm_atomic_state
drm/i915/dp: Add from_crtc_state to copy color blobs
drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave
drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
drm/i915: HW state readout for Bigjoiner case
drm/i915: Do not call hsw_set_frame_start_delay for dsi
Tejas Upadhyay (2):
drm/i915/ehl: Implement W/A 22010492432
drm/i915/edp/jsl: Update vswing table for HBR and HBR2
Ville Syrjälä (26):
drm/i915: Sort EHL/JSL PCI IDs
drm/i915: Include fb modifier in state dumps
drm/i915: Add plane .{min,max}_width() and .max_height() vfuncs
drm/i915: Move hw.active assignment into intel_crtc_get_pipe_config()
drm/i915: s/intel_mode_from_pipe_config/intel_mode_from_crtc_timings/
drm/i915: Introduce intel_crtc_readout_derived_state()
drm/i915: Pass intel_atomic_state around
drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+
wm code
[Intel-gfx] [PULL] drm-intel-next-queued
Hi Dave & Daniel - Here's the first batch of i915 changes for v5.11. I'm trying out tagging and generating the pull request directly from drm-intel-next-queued in one step this time, skipping the previous two-step process. The idea is to ditch drm-intel-next-queued in the future, and do everything directly to/from drm-intel-next. BR, Jani. drm-intel-next-queued-2020-11-03: drm/i915 features for v5.11 Highlights: - More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata) - Integer scaling filter support (Pankaj Bharadiya) - Asynchronous flip support (Karthik) Generic: - Fix gen12 forcewake tables (Matt) - Haswell PCI ID updates (Alexei Podtelezhnikov) Display: - ICL+ DSI command mode enabling (Vandita) - Shutdown displays grafecully on reboot/shutdown (Ville) - Don't register display debugfs when there is no display (Lucas) - Fix RKL CDCLK table (Matt) - Limit EHL/JSL eDP to HBR2 (José) - Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre) - Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville) - State checker and dump fixes (Ville) - DP AUX backlight updates (Aaron Ma, Sean Paul) - Add DP LTTPR non-transparent link training mode (Imre) - PSR2 selective fetch enabling (José) - VBT updates (José) - HDCP updates (Ramalingam) Cleanups and refactoring: - HPD pin, AUX channel, and Type-C port identifier cleanup (Ville) - Hotplug and irq refactoring (Ville) - Better DDI encoder and AUX channel names (Ville) - Color LUT code cleanups (Ville) - Combo PHY code cleanups (Ville) - LSPCON code cleanups (Ville) - Documentation fixes (Mauro, Chris) BR, Jani. The following changes since commit 8fea92536e3efff14fa4cde7ed37c595b40a52b5: drm/i915: Update DRIVER_DATE to 20200917 (2020-09-17 16:43:57 -0400) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-queued-2020-11-03 for you to fetch changes up to 139caf7ca2866cd0a45814ff938cb0c33920a266: drm/i915: Update DRIVER_DATE to 20201103 (2020-11-03 14:21:25 +0200) drm/i915 features for v5.11 Highlights: - More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata) - Integer scaling filter support (Pankaj Bharadiya) - Asynchronous flip support (Karthik) Generic: - Fix gen12 forcewake tables (Matt) - Haswell PCI ID updates (Alexei Podtelezhnikov) Display: - ICL+ DSI command mode enabling (Vandita) - Shutdown displays grafecully on reboot/shutdown (Ville) - Don't register display debugfs when there is no display (Lucas) - Fix RKL CDCLK table (Matt) - Limit EHL/JSL eDP to HBR2 (José) - Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre) - Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville) - State checker and dump fixes (Ville) - DP AUX backlight updates (Aaron Ma, Sean Paul) - Add DP LTTPR non-transparent link training mode (Imre) - PSR2 selective fetch enabling (José) - VBT updates (José) - HDCP updates (Ramalingam) Cleanups and refactoring: - HPD pin, AUX channel, and Type-C port identifier cleanup (Ville) - Hotplug and irq refactoring (Ville) - Better DDI encoder and AUX channel names (Ville) - Color LUT code cleanups (Ville) - Combo PHY code cleanups (Ville) - LSPCON code cleanups (Ville) - Documentation fixes (Mauro, Chris) Aaron Ma (2): drm/i915/dpcd_bl: uncheck PWM_PIN_CAP when detect eDP backlight capabilities drm/i915: Force DPCD backlight mode for BOE 2270 panel Aditya Swarup (3): drm/i915/display: allow to skip certain power wells drm/i915/dg1: Add DPLL macros for DG1 drm/i915/dg1: Add and setup DPLLs for DG1 Alexei Podtelezhnikov (4): drm/i915: Update Haswell PCI IDs drm/i915: Reclassify SKL 0x192a as GT3 drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT drm/i915: Add SKL GT1.5 PCI IDs Anshuman Gupta (2): drm/i915/dg1: DG1 does not support DC6 drm/i915/dg1: Update DMC_DEBUG register Chris Wilson (5): drm/i915: Force VT'd workarounds when running as a guest OS drm/i915: Drop runtime-pm assert from vgpu io accessors drm/i915/display: Unkerneldoc cnl_program_nearest_filter_coefs drm/i915: Reset the interrupt mask on disabling interrupts drm/i915: Reduce severity for fixing up mistaken VBT tc->legacy_port Clinton A Taylor (1): drm/i915/dg1: invert HPD pins Imre Deak (12): drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programming drm/i915: Move the initial fastset commit check to encoder hooks drm/i915: Check for unsupported DP link rates during initial commit drm/i915: Add an encoder hook to sanitize its state during init/resume drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock drm/i915: Fix DP link training pattern mask drm/i915: Simplify the link training functions
Re: [Intel-gfx] [PULL] drm-intel-next-queued
On Sat, Aug 3, 2013 at 5:47 AM, Ben Widawsky wrote: > Hi Daniel. > > Jesse and Chris get egging me on to merge some patches. Dave has already > merged the one patch for -fixes, so I have nothing but patches for > -next-queued. It should be a straight fast-forward. QA has been running > my -fixes, and -nightly branches, which I've maintained as you do. > > The patches merged have all been either reviewed-by someone, and/or > myself. I tried to merge all the easy to miss ones, and I avoided > dangerous ones including big series. > > There were a couple of stray patches which I wasn't capable of > reviewing, so you'll have to fish for those. In addition I've made > bundles in patchwork for the series which got submitted that either had > outstanding work, or needed review. > > Damien: > http://patchwork.kernel.org/bundle/bwidawsk/infoframe%20fixes/ > > Paulo: > http://patchwork.kernel.org/bundle/bwidawsk/PC8+/ > > Ben: > http://patchwork.kernel.org/bundle/bwidawsk/VMAs%20v2/ > > Ville (A lot of this is reviewed): > http://patchwork.kernel.org/bundle/bwidawsk/watermarks/ > > > I won't be offended if you scrap this branch - as I said, it was > primarily to quiet Jesse, and Chris. > > I hope you enjoyed your vacation :P Was great ;-) I've shuffled patches a bit (so that I could send a non-broken pull request to Dave mostly), so didn't take your branch unchanged. I've also dropped the hsw/iris pte stuff (will write replies to the relevant patches later) and " drm: Remove unused drm_mode_validate_clocks" since it's a drm core patch but lacked Dave's ack. I'll crawl through my mail backlog later .. Thanks for doing this, Daniel > > --- > > The following changes since commit fae5cbff3e3e4097de2e76178d462b90626c2bdb: > > drm/i915: clean up crtc timings computation (2013-07-27 00:02:38 +0200) > > are available in the git repository at: > > http://cgit.freedesktop.org/~bwidawsk/drm-intel/ drm-intel-next-queued > > for you to fetch changes up to 2178d41e557267cbb54dfef1353be31bc60b2245: > > drm/i915: Do not dereference NULL crtc or fb until after checking > (2013-08-02 14:13:45 -0700) > > > Ben Widawsky (1): > drm/i915/hsw: Change default LLC age to 3 > > Chris Wilson (5): > drm/i915: Squelch repeated reasoning for why FBC cannot be activated > drm/i915: Use the same pte_encoding for ppgtt as for gtt > drm/i915: Use Write-Through cacheing for the display plane on Iris > drm/i915: Tidy the macro casting by using an inline function > drm/i915: Do not dereference NULL crtc or fb until after checking > > Stéphane Marchesin (2): > drm/i915: Remove useless define > drm: Remove unused drm_mode_validate_clocks > > drivers/gpu/drm/drm_modes.c | 37 > - > drivers/gpu/drm/i915/i915_debugfs.c | 6 ++ > drivers/gpu/drm/i915/i915_dma.c | 3 +++ > drivers/gpu/drm/i915/i915_drv.h | 17 + > drivers/gpu/drm/i915/i915_gem.c | 34 +++--- > drivers/gpu/drm/i915/i915_gem_gtt.c | 22 +- > drivers/gpu/drm/i915/intel_display.c | 1 - > drivers/gpu/drm/i915/intel_dp.c | 9 + > drivers/gpu/drm/i915/intel_pm.c | 59 > +-- > include/drm/drm_crtc.h | 3 --- > include/uapi/drm/i915_drm.h | 1 + > 11 files changed, 105 insertions(+), 87 deletions(-) > > > -- > Ben Widawsky, Intel Open Source Technology Center -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-intel-next-queued
Hi Daniel. Jesse and Chris get egging me on to merge some patches. Dave has already merged the one patch for -fixes, so I have nothing but patches for -next-queued. It should be a straight fast-forward. QA has been running my -fixes, and -nightly branches, which I've maintained as you do. The patches merged have all been either reviewed-by someone, and/or myself. I tried to merge all the easy to miss ones, and I avoided dangerous ones including big series. There were a couple of stray patches which I wasn't capable of reviewing, so you'll have to fish for those. In addition I've made bundles in patchwork for the series which got submitted that either had outstanding work, or needed review. Damien: http://patchwork.kernel.org/bundle/bwidawsk/infoframe%20fixes/ Paulo: http://patchwork.kernel.org/bundle/bwidawsk/PC8+/ Ben: http://patchwork.kernel.org/bundle/bwidawsk/VMAs%20v2/ Ville (A lot of this is reviewed): http://patchwork.kernel.org/bundle/bwidawsk/watermarks/ I won't be offended if you scrap this branch - as I said, it was primarily to quiet Jesse, and Chris. I hope you enjoyed your vacation :P --- The following changes since commit fae5cbff3e3e4097de2e76178d462b90626c2bdb: drm/i915: clean up crtc timings computation (2013-07-27 00:02:38 +0200) are available in the git repository at: http://cgit.freedesktop.org/~bwidawsk/drm-intel/ drm-intel-next-queued for you to fetch changes up to 2178d41e557267cbb54dfef1353be31bc60b2245: drm/i915: Do not dereference NULL crtc or fb until after checking (2013-08-02 14:13:45 -0700) Ben Widawsky (1): drm/i915/hsw: Change default LLC age to 3 Chris Wilson (5): drm/i915: Squelch repeated reasoning for why FBC cannot be activated drm/i915: Use the same pte_encoding for ppgtt as for gtt drm/i915: Use Write-Through cacheing for the display plane on Iris drm/i915: Tidy the macro casting by using an inline function drm/i915: Do not dereference NULL crtc or fb until after checking Stéphane Marchesin (2): drm/i915: Remove useless define drm: Remove unused drm_mode_validate_clocks drivers/gpu/drm/drm_modes.c | 37 - drivers/gpu/drm/i915/i915_debugfs.c | 6 ++ drivers/gpu/drm/i915/i915_dma.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 17 + drivers/gpu/drm/i915/i915_gem.c | 34 +++--- drivers/gpu/drm/i915/i915_gem_gtt.c | 22 +- drivers/gpu/drm/i915/intel_display.c | 1 - drivers/gpu/drm/i915/intel_dp.c | 9 + drivers/gpu/drm/i915/intel_pm.c | 59 +-- include/drm/drm_crtc.h | 3 --- include/uapi/drm/i915_drm.h | 1 + 11 files changed, 105 insertions(+), 87 deletions(-) -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
