Re: [Intel-gfx] [RFCv3 13/14] drm/i915: Split cursor update code from cursor ioctl handling

[Chris Wilson]

On Tue, Mar 18, 2014 at 05:22:58PM -0700, Matt Roper wrote:
> Legacy cursor ioctls took GEM buffer handles from userspace directly
> whereas the new unified plane handling assigns drm_framebuffer's to
> cursor planes.  Splitting the code that actually updates the cursor
> plane from the code that handles object lookup and reference counting
> allows us to share common code between both interfaces.

This exposes an internal fb, a bo that was private is now public.

So maybe drm_framebuffer_init_private() and
intel_private_framebuffer_create().
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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[Intel-gfx] [RFCv3 13/14] drm/i915: Split cursor update code from cursor ioctl handling

[Matt Roper]

Legacy cursor ioctls took GEM buffer handles from userspace directly
whereas the new unified plane handling assigns drm_framebuffer's to
cursor planes.  Splitting the code that actually updates the cursor
plane from the code that handles object lookup and reference counting
allows us to share common code between both interfaces.

Cc: Intel Graphics Development 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/intel_display.c | 197 ---
 drivers/gpu/drm/i915/intel_drv.h |   2 -
 2 files changed, 134 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d43b31d..f661469 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -43,7 +43,8 @@
 #include 
 
 static void intel_increase_pllclock(struct drm_crtc *crtc);
-static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
+static void intel_crtc_update_cursor(struct drm_crtc *crtc,
+struct drm_framebuffer *fb);
 
 static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_config *pipe_config);
@@ -56,6 +57,11 @@ static int intel_framebuffer_init(struct drm_device *dev,
  struct intel_framebuffer *ifb,
  struct drm_mode_fb_cmd2 *mode_cmd,
  struct drm_i915_gem_object *obj);
+static struct drm_framebuffer *
+intel_user_framebuffer_create(struct drm_device *dev,
+ struct drm_file *filp,
+ struct drm_mode_fb_cmd2 *mode_cmd);
+static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb);
 
 typedef struct {
int min, max;
@@ -3709,7 +3715,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_enable_pipe(intel_crtc);
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
-   intel_crtc_update_cursor(crtc, true);
+   intel_crtc_update_cursor(crtc, crtc->cursor->fb);
 
if (intel_crtc->config.has_pch_encoder)
ironlake_pch_enable(crtc);
@@ -3753,7 +3759,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc 
*crtc)
 
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
-   intel_crtc_update_cursor(crtc, true);
+   intel_crtc_update_cursor(crtc, crtc->cursor->fb);
 
hsw_enable_ips(intel_crtc);
 
@@ -3781,7 +3787,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc 
*crtc)
 
hsw_disable_ips(intel_crtc);
 
-   intel_crtc_update_cursor(crtc, false);
+   intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
 }
@@ -3909,7 +3915,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
if (dev_priv->fbc.plane == plane)
intel_disable_fbc(dev);
 
-   intel_crtc_update_cursor(crtc, false);
+   intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
 
@@ -4396,7 +4402,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
-   intel_crtc_update_cursor(crtc, true);
+   intel_crtc_update_cursor(crtc, crtc->cursor->fb);
 
intel_update_fbc(dev);
 
@@ -4440,7 +4446,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
/* The fixup needs to happen before cursor is enabled */
if (IS_G4X(dev))
g4x_fixup_plane(dev_priv, pipe);
-   intel_crtc_update_cursor(crtc, true);
+   intel_crtc_update_cursor(crtc, crtc->cursor->fb);
 
/* Give the overlay scaler a chance to enable if it's on this pipe */
intel_crtc_dpms_overlay(intel_crtc, true);
@@ -4491,7 +4497,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
intel_disable_fbc(dev);
 
intel_crtc_dpms_overlay(intel_crtc, false);
-   intel_crtc_update_cursor(crtc, false);
+   intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
 
@@ -7739,7 +7745,7 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 
base)
 
 /* If no-part of the cursor is visible on the framebuffer, then the GPU may 
hang... */
 static void intel_crtc_update_cursor(struct drm_crtc *crtc,
-bool on)
+struct drm_framebuffer *fb)
 {
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7750,32 +7756,36 @@ static void intel_crtc_update_cursor(struct drm_crtc 
*crtc,
u32 base = 0, pos = 0;