Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
>-Original Message-
>From: Roper, Matthew D
>Sent: Friday, December 21, 2018 6:54 AM
>To: Shankar, Uma
>Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
>; Syrjala, Ville ;
>Sharma,
>Shashank
>Subject: Re: [v4 1/4] drm/i915: Remove gamma_mode state variable
>
>On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
>> Removed crtc state variable for gamma mode as it's redundant since
>> currently we have fixed modes on respective hardware platforms. This
>> was making this state variable irrelevant.
>>
>> Credits-to: Matt Roper
>>
>> Signed-off-by: Uma Shankar
>> ---
>> drivers/gpu/drm/i915/intel_color.c | 5 +
>> drivers/gpu/drm/i915/intel_display.c | 3 ---
>> drivers/gpu/drm/i915/intel_drv.h | 3 ---
>> 3 files changed, 1 insertion(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_color.c
>> b/drivers/gpu/drm/i915/intel_color.c
>> index 37fd9dd..f32e4a7 100644
>> --- a/drivers/gpu/drm/i915/intel_color.c
>> +++ b/drivers/gpu/drm/i915/intel_color.c
>> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
>*crtc_state)
>> * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS
>enabled.
>> */
>> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
>> -(crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
>> +(I915_READ(GAMMA_MODE(crtc->pipe)) &
>GAMMA_MODE_MODE_SPLIT)) {
>
>We can probably avoid this read on each LUT load if we just handle it once
>during
>hardware readout/sanitization. Since our driver never actually sets MODE_SPLIT
>on this platform, we only have to worry about the BIOS leaving us in split
>gamma
>mode; that means we could do
>
>if (ips)
>disable ips
>
>intel_color_set_csc()
>intel_color_load_luts()
>
>if (ips)
>re-enable ips
>
>once during intel_sanitize_crtc(), to immediately program the hardware to a
>known-good state at startup (linear CTM and disabled LUT's). That would also
>be
>a little bit more consistent overall; since we don't actually readout the
>BIOS-set
>LUT's or CTM today, we wind up having them remain active for a while until they
>go away with the first fastset or modeset.
>
>Otherwise, this patch looks good, so
>
>Reviewed-by: Matt Roper
>
>and you can deal with sanitizing the color management stuff at bootup as a
>separate patch later.
Thanks Matt for these useful suggestions. Will update the patch accordingly.
Regards,
Uma Shankar
>
>Matt
>
>> hsw_disable_ips(crtc_state);
>> reenable_ips = true;
>> }
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
>> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>>
>> i9xx_load_luts(crtc_state);
>> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
>*crtc_state)
>> bdw_load_gamma_lut(crtc_state,
>> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
>> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
>> POSTING_READ(GAMMA_MODE(pipe));
>>
>> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
>> *crtc_state)
>>
>> bdw_load_gamma_lut(crtc_state, 0);
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
>> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
>> POSTING_READ(GAMMA_MODE(pipe));
>> }
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 3b70948..704d9d3 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
>*crtc,
>> intel_get_pipe_src_size(crtc, pipe_config);
>> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>>
>> -pipe_config->gamma_mode =
>> -I915_READ(GAMMA_MODE(crtc->pipe)) &
>GAMMA_MODE_MODE_MASK;
>> -
>> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
>> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
>> power_domain_mask |= BIT_ULL(power_domain); diff --git
>> a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index 1028af8..7427a36 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>>
>> struct intel_crtc_wm_state wm;
>>
>> -/* Gamma mode programmed on the pipe */
>> -uint32_t gamma_mode;
>> -
>> /* bitmask of visible planes (enum plane_id) */
>> u8 active_planes;
>> u8 nv12_planes;
>> --
>> 1.9.1
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>IoTG Platform Enabling & Development
>Intel Corporation
>(916) 356-2795
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Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, December 21, 2018 10:57 PM
>To: Shankar, Uma
>Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville ;
>Lankhorst, Maarten
>Subject: Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
>
>On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
>> Removed crtc state variable for gamma mode as it's redundant since
>> currently we have fixed modes on respective hardware platforms. This
>> was making this state variable irrelevant.
>
>I'm going to add it back at some point.
Hi Ville,
I believe we can drop it currently and add later as needed and handle the state
more
efficiently as to how was it done currently. I hope that is ok.
Regards,
Uma Shankar
>>
>> Credits-to: Matt Roper
>>
>> Signed-off-by: Uma Shankar
>> ---
>> drivers/gpu/drm/i915/intel_color.c | 5 +
>> drivers/gpu/drm/i915/intel_display.c | 3 ---
>> drivers/gpu/drm/i915/intel_drv.h | 3 ---
>> 3 files changed, 1 insertion(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_color.c
>> b/drivers/gpu/drm/i915/intel_color.c
>> index 37fd9dd..f32e4a7 100644
>> --- a/drivers/gpu/drm/i915/intel_color.c
>> +++ b/drivers/gpu/drm/i915/intel_color.c
>> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
>*crtc_state)
>> * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS
>enabled.
>> */
>> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
>> -(crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
>> +(I915_READ(GAMMA_MODE(crtc->pipe)) &
>GAMMA_MODE_MODE_SPLIT)) {
>> hsw_disable_ips(crtc_state);
>> reenable_ips = true;
>> }
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
>> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>>
>> i9xx_load_luts(crtc_state);
>> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
>*crtc_state)
>> bdw_load_gamma_lut(crtc_state,
>> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
>> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
>> POSTING_READ(GAMMA_MODE(pipe));
>>
>> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
>> *crtc_state)
>>
>> bdw_load_gamma_lut(crtc_state, 0);
>>
>> -crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
>> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
>> POSTING_READ(GAMMA_MODE(pipe));
>> }
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 3b70948..704d9d3 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
>*crtc,
>> intel_get_pipe_src_size(crtc, pipe_config);
>> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>>
>> -pipe_config->gamma_mode =
>> -I915_READ(GAMMA_MODE(crtc->pipe)) &
>GAMMA_MODE_MODE_MASK;
>> -
>> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
>> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
>> power_domain_mask |= BIT_ULL(power_domain); diff --git
>> a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index 1028af8..7427a36 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>>
>> struct intel_crtc_wm_state wm;
>>
>> -/* Gamma mode programmed on the pipe */
>> -uint32_t gamma_mode;
>> -
>> /* bitmask of visible planes (enum plane_id) */
>> u8 active_planes;
>> u8 nv12_planes;
>> --
>> 1.9.1
>>
>> ___
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>--
>Ville Syrjälä
>Intel
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Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
> Removed crtc state variable for gamma mode as it's redundant
> since currently we have fixed modes on respective hardware
> platforms. This was making this state variable irrelevant.
I'm going to add it back at some point.
>
> Credits-to: Matt Roper
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/intel_color.c | 5 +
> drivers/gpu/drm/i915/intel_display.c | 3 ---
> drivers/gpu/drm/i915/intel_drv.h | 3 ---
> 3 files changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index 37fd9dd..f32e4a7 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
> *crtc_state)
>* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
>*/
> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
> - (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> + (I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_SPLIT)) {
> hsw_disable_ips(crtc_state);
> reenable_ips = true;
> }
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>
> i9xx_load_luts(crtc_state);
> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
> *crtc_state)
> bdw_load_gamma_lut(crtc_state,
> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
> POSTING_READ(GAMMA_MODE(pipe));
>
> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
> *crtc_state)
>
> bdw_load_gamma_lut(crtc_state, 0);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
> POSTING_READ(GAMMA_MODE(pipe));
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3b70948..704d9d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
> *crtc,
> intel_get_pipe_src_size(crtc, pipe_config);
> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>
> - pipe_config->gamma_mode =
> - I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
> -
> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
> power_domain_mask |= BIT_ULL(power_domain);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1028af8..7427a36 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>
> struct intel_crtc_wm_state wm;
>
> - /* Gamma mode programmed on the pipe */
> - uint32_t gamma_mode;
> -
> /* bitmask of visible planes (enum plane_id) */
> u8 active_planes;
> u8 nv12_planes;
> --
> 1.9.1
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
> Removed crtc state variable for gamma mode as it's redundant
> since currently we have fixed modes on respective hardware
> platforms. This was making this state variable irrelevant.
>
> Credits-to: Matt Roper
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/intel_color.c | 5 +
> drivers/gpu/drm/i915/intel_display.c | 3 ---
> drivers/gpu/drm/i915/intel_drv.h | 3 ---
> 3 files changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index 37fd9dd..f32e4a7 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
> *crtc_state)
>* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
>*/
> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
> - (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> + (I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_SPLIT)) {
We can probably avoid this read on each LUT load if we just handle it
once during hardware readout/sanitization. Since our driver never
actually sets MODE_SPLIT on this platform, we only have to worry about
the BIOS leaving us in split gamma mode; that means we could do
if (ips)
disable ips
intel_color_set_csc()
intel_color_load_luts()
if (ips)
re-enable ips
once during intel_sanitize_crtc(), to immediately program the hardware
to a known-good state at startup (linear CTM and disabled LUT's). That
would also be a little bit more consistent overall; since we don't
actually readout the BIOS-set LUT's or CTM today, we wind up having them
remain active for a while until they go away with the first fastset or
modeset.
Otherwise, this patch looks good, so
Reviewed-by: Matt Roper
and you can deal with sanitizing the color management stuff at bootup as
a separate patch later.
Matt
> hsw_disable_ips(crtc_state);
> reenable_ips = true;
> }
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>
> i9xx_load_luts(crtc_state);
> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
> *crtc_state)
> bdw_load_gamma_lut(crtc_state,
> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
> POSTING_READ(GAMMA_MODE(pipe));
>
> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
> *crtc_state)
>
> bdw_load_gamma_lut(crtc_state, 0);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
> POSTING_READ(GAMMA_MODE(pipe));
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3b70948..704d9d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
> *crtc,
> intel_get_pipe_src_size(crtc, pipe_config);
> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>
> - pipe_config->gamma_mode =
> - I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
> -
> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
> power_domain_mask |= BIT_ULL(power_domain);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1028af8..7427a36 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>
> struct intel_crtc_wm_state wm;
>
> - /* Gamma mode programmed on the pipe */
> - uint32_t gamma_mode;
> -
> /* bitmask of visible planes (enum plane_id) */
> u8 active_planes;
> u8 nv12_planes;
> --
> 1.9.1
>
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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[Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
Removed crtc state variable for gamma mode as it's redundant
since currently we have fixed modes on respective hardware
platforms. This was making this state variable irrelevant.
Credits-to: Matt Roper
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_color.c | 5 +
drivers/gpu/drm/i915/intel_display.c | 3 ---
drivers/gpu/drm/i915/intel_drv.h | 3 ---
3 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_color.c
b/drivers/gpu/drm/i915/intel_color.c
index 37fd9dd..f32e4a7 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
*crtc_state)
* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
*/
if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
- (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
+ (I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(crtc_state);
reenable_ips = true;
}
- crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
i9xx_load_luts(crtc_state);
@@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
*crtc_state)
bdw_load_gamma_lut(crtc_state,
INTEL_INFO(dev_priv)->color.degamma_lut_size);
- crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
POSTING_READ(GAMMA_MODE(pipe));
@@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
*crtc_state)
bdw_load_gamma_lut(crtc_state, 0);
- crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
POSTING_READ(GAMMA_MODE(pipe));
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3b70948..704d9d3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
*crtc,
intel_get_pipe_src_size(crtc, pipe_config);
intel_get_crtc_ycbcr_config(crtc, pipe_config);
- pipe_config->gamma_mode =
- I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
-
power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
power_domain_mask |= BIT_ULL(power_domain);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1028af8..7427a36 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -921,9 +921,6 @@ struct intel_crtc_state {
struct intel_crtc_wm_state wm;
- /* Gamma mode programmed on the pipe */
- uint32_t gamma_mode;
-
/* bitmask of visible planes (enum plane_id) */
u8 active_planes;
u8 nv12_planes;
--
1.9.1
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