[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable

2018-05-16 Thread Patchwork
== Series Details ==

Series: series starting with [1/7] drm/i915: Remove tasklet flush before disable
URL   : https://patchwork.freedesktop.org/series/43266/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
918420a1f591 drm/i915: Remove tasklet flush before disable
c805538685f8 drm/i915: Only sync tasklets once for recursive reset preparation
10be65911411 drm/i915/execlists: Refactor out complete_preempt_context()
8b09105ec2fa drm/i915: Split execlists/guc reset preparations
3534fd5c5b56 drm/i915/execlists: Split out CSB processing
-:67: WARNING:LONG_LINE: line over 100 characters
#67: FILE: drivers/gpu/drm/i915/intel_lrc.c:975:
+   (i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

-:85: WARNING:LONG_LINE: line over 100 characters
#85: FILE: drivers/gpu/drm/i915/intel_lrc.c:989:
+   head = readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));

-:102: WARNING:LONG_LINE: line over 100 characters
#102: FILE: drivers/gpu/drm/i915/intel_lrc.c:1004:
+ head, GEN8_CSB_READ_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?",

-:103: WARNING:LONG_LINE: line over 100 characters
#103: FILE: drivers/gpu/drm/i915/intel_lrc.c:1005:
+ tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?");

total: 0 errors, 4 warnings, 0 checks, 144 lines checked
c1180f81daa9 drm/i915/execlists: Flush pending preemption events during reset
7514a35d14f2 drm/i915: Stop parking the signaler around reset

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable (rev2)

2018-05-16 Thread Patchwork
== Series Details ==

Series: series starting with [1/7] drm/i915: Remove tasklet flush before 
disable (rev2)
URL   : https://patchwork.freedesktop.org/series/43235/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
fca038eedae4 drm/i915: Remove tasklet flush before disable
3fb0dca9825c drm/i915: Only sync tasklets once for recursive reset preparation
e85ea5b7fe3a drm/i915/execlists: Refactor out complete_preempt_context()
63941f891891 drm/i915: Move engine reset prepare/finish to backends
8048a04288ce drm/i915: Split execlists/guc reset preparations
d290200d038f drm/i915/execlists: Flush pending preemption events during reset
-:69: WARNING:LONG_LINE: line over 100 characters
#69: FILE: drivers/gpu/drm/i915/intel_lrc.c:975:
+   (i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

-:87: WARNING:LONG_LINE: line over 100 characters
#87: FILE: drivers/gpu/drm/i915/intel_lrc.c:989:
+   head = readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));

-:104: WARNING:LONG_LINE: line over 100 characters
#104: FILE: drivers/gpu/drm/i915/intel_lrc.c:1004:
+ head, GEN8_CSB_READ_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?",

-:105: WARNING:LONG_LINE: line over 100 characters
#105: FILE: drivers/gpu/drm/i915/intel_lrc.c:1005:
+ tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?");

total: 0 errors, 4 warnings, 0 checks, 192 lines checked
20872ea9f3ce drm/i915: Stop parking the signaler around reset
-:65: CHECK:LINE_SPACING: Please don't use multiple blank lines
#65: FILE: drivers/gpu/drm/i915/intel_engine_cs.c:772:
 
+

total: 0 errors, 0 warnings, 1 checks, 108 lines checked

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable

2018-05-16 Thread Patchwork
== Series Details ==

Series: series starting with [1/7] drm/i915: Remove tasklet flush before disable
URL   : https://patchwork.freedesktop.org/series/43235/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
823d4421c732 drm/i915: Remove tasklet flush before disable
97032fea8040 drm/i915: Only sync tasklets once for recursive reset preparation
7f52a34d6167 drm/i915/execlists: Refactor out complete_preempt_context()
4477eba97fad drm/i915: Move engine reset prepare/finish to backends
5ecbe1da729c drm/i915: Split execlists/guc reset preparations
0df011d60e46 drm/i915/execlists: Flush pending preemption events during reset
-:69: WARNING:LONG_LINE: line over 100 characters
#69: FILE: drivers/gpu/drm/i915/intel_lrc.c:975:
+   (i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

-:87: WARNING:LONG_LINE: line over 100 characters
#87: FILE: drivers/gpu/drm/i915/intel_lrc.c:989:
+   head = readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));

-:104: WARNING:LONG_LINE: line over 100 characters
#104: FILE: drivers/gpu/drm/i915/intel_lrc.c:1004:
+ head, GEN8_CSB_READ_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?",

-:105: WARNING:LONG_LINE: line over 100 characters
#105: FILE: drivers/gpu/drm/i915/intel_lrc.c:1005:
+ tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + 
i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine, fw ? "" : "?");

total: 0 errors, 4 warnings, 0 checks, 192 lines checked
664c90a51f2e drm/i915: Stop parking the signaler around reset

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