[Intel-gfx] Updated -testing
Hi all, Updated -testing with new stuff: - dsi improvements (Gaurav) - bxt ddi dpll hw state readout (Imre) - chv dvfs support and overall wm improvements for both vlv and chv (Ville) - ppgtt polish from Mika and Michel - cdclk support for bxt (Bob Pauwe) - make frontbuffer tracking more precise - OLR removal (John Harrison) - per-ctx WA batch buffer support (Arun Siluvery) - remvoe KMS Kconfig option (Chris) - more hpd handling refactoring from Jani - use atomic states throughout modeset code and integrate with atomic plane update (Maarten) Have fun! -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing tree
Hi all, Merge windows opens, so we'll start with the first feature batch for 3.11. Highlights (part of it already in the previous testing cycle, but postponed for 3.11): - fixes for the gmch modeset sequence - a bit of OCD around plane/pipe usage (Ville) - vlv turbo support (Jesse) - tons of vlv modeset fixes (Jesse et al.) - vlv pte write fixes (Kenneth Graunke) - hpd filtering to avoid costly probes on unaffected outputs (Egbert Eich) - intel dev_info cleanups and refactorings (Damien) - vlv rc6 support (Jesse) - random pile of fixes around non-24bpp modes handling - asle/opregion cleanups and locking fixes (Jani) - dp dpll refactoring - improvements for reduced_clock computation on g4x/ilk+ - pfit state refactored to use pipe_config (Jesse) - lots more computed modeset state moved to pipe_config, including readout and cross-check support - fdi auto-dithering for ivb B/C links, using the neat pipe_config improvements - drm_rect helpers plus sprite clipping fixes (Ville) - hw context refcounting (Mika + Ben) Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing tree for 3.11
Hi all, Usual QA cycle continues, although most of the stuff this time around is still heading towards 3.10. On top of what's in -fixes now just a few things: - More vlv stuff from Jesse, code should now be in decent enough shape to boot on real systems. Hopefully we can drop the experimental support tag on vlv for 3.11. Patches include pll fixes, dp voltage/pre-emph setting fixes, turbo/rc6 support and other things. - Some OCD refactoring from Ville to use our pipe/transcoder/port macros more. - fifo underrun reporting for pch platforms from Paulo. - improved pfit asserts and general cleanup of the i9xx modeset sequence. Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing tree
Hi all, Updated testing tree for -next. Highlights: - Corner case fixes discovered with static analyzers (Damien). - More fixes to combat unclaimed register errors on Haswell (Paulo). - Some small fixes to the gpu turbo code (Rodrigo+Ben), Ben has more patches for overclocking support pending. - More prep work for fastboot from Chris. - VT-switchless suspend/resume from Jesse. - The prep work of Egbert Eich's hpd irq storm handling. Hopefully we can squeeze in the actual storm handling code for 3.10 ... - More convenience helpers for Imre's sg iterator. - A bit of backlight code cleanup from Jani. - Fixed ilk gpu reset (Jesse). - Reduced color range handling fixes for VLV (Ville). The big item here is though the introduction of pipe_config to properly pre-compute the desired modeset state before touching the hw. Together with some very basic support to read out the current config from the hw and compare the state with the sw tracking. This is all prep work for more reliable fastboot, atomic modesets and other cool features. Stuff converted to the new world includes: - Most simple pipe attributes (reduce color range, pixel multiplier). - Pipe bpp/dither handling. - Some convenience flags like ->has_pch_encoder to simplify the code flow. - (Almost) DP clock handling, had to be reverted since part of a prep patch was lost in rebasing ... Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing treee
Hi all, So new testing round. Highlights: - Some vlv patches, by far not all (Jesse et al) - Clean up the HDMI/SDVO #define confusion (Paulo) - gen2-4 vblank fixes from Ville - unclaimed register warning fixes for hsw (Paulo) - complete pageflips which have been stuck in a gpu hang, should prevent stuck gl compositors (Ville) - pm patches for vt-switchless resume (Jesse) Note that the i915 enabling is still stuck due to reported issues. Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing tree
Hi All, New testing round with mostly fixes targeting still 3.9. Highlights: - reduced range support for hsw, using the pipe CSC (Ville) - support for vt-switchless suspend/resume in the pm core + fbdev (Jesse) - fixup pll limits for gen3/4 (Patrick Jakobsson) - regression fix for 8bit fb console (Ville) - preserve lane reversal bits on DDI/FDI ports (Damien) - page flip vs. gpu hang fixes (Ville) - panel fitter regression fix from Mika Kuoppala (was accidentally left on on some pipes with the new modset code since 3.7). This also improves the modeset sequence and might help a few other unrelated issues with lvds. - Write backlight regs even harder ... another installement in our eternal fight against the BIOS and backlights. - Fixup lid notifier vs. suspend/resume races (Zhang Rui). - A few other small fixes and tiny cleanups all over. Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Updated testing
On Fri, Jan 18, 2013 at 09:51:14PM +0100, Daniel Vetter wrote: > Hi all, > > Despite the longer cycle of four weeks, not much going on ... Highlights: > - Broadcast RBG improvements and reduced color range fixes from Ville > - Ben is on a "kill legacy gtt code for good" spree, first pile of patches > included. > - no relocs and lut improvements for faster execbuf from Chris. > - some refactorings from Imre > > Happy testing! There's been a few brown-paper-bag bugs in the gtt rework. I'll update -next/-testing shortly, need to beat on it some more first. My apologies for the mess. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing
Hi all, Despite the longer cycle of four weeks, not much going on ... Highlights: - Broadcast RBG improvements and reduced color range fixes from Ville - Ben is on a "kill legacy gtt code for good" spree, first pile of patches included. - no relocs and lut improvements for faster execbuf from Chris. - some refactorings from Imre Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated testing branch
Hi all, Not too much this time around, mostly since I've been massively absorbed hunt ghosts and other annoying bugs. Highlights: - seqno wrap fixes and debug infrastructure from Mika Kuoppala and Chris Wilson - some leftover kill-agp on gen6+ patches from Ben - hotplug improvements from Damien - clear fb when allocated from stolen, avoids dirt on the fbcon (Chris) - some random littel bits&pieces Go forth and test! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, drm-intel-next marches on, and it's already the first cycle for 3.9: - Stolen mem support from Chris Wilson, one of the many steps to get to real fastboot support. - Some DDI code cleanups from Paulo. - First pile of seqno wrap fixes and test infrastructure from Mika Kuoppala, unfortunately it doesn't quite work yet completely, so I've had to take 2 patches out again. - Some refactorings around lvds and dp code. - And a few fixes, most of them heading towards 3.8, I'll detail them in my pull to Dave. Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, Last -next cycle for 3.8, besides the big item of lifting the "preliminary hw support" tag from the Haswell code, just small bits&pieces all over: - Leftover Haswell patches and some fixes from Paulo - LyncPoint PCH support (for hsw) - OOM handling improvements from Chris Wilson - connector property and send_vblank_event refactorings from Rob Clark - random pile of small fixes Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, New testing with neat new stuff. Highlights: - fdi B/C workarounds for ivb, improving fdi link training reliability - some sprite/plane offset fixes from Damien for hsw - unified ddi encoder for DP+HDMI on hsw (Paulo), this finally gives up DP support for hsw - GTT handling cleanups from Ben, gen6+ finally no longer relies on the fake agp code! - more checks around modeset/fb handling from Ville - fixup up VGA hsw code from Paulo - some workarounds all over the place (Jesse, ...) for ilk-hsw - resume speedups from Jesse - random fixes and small improvements all over the place Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, Updated -testing branch with tons of stuff: - basic haswell dp support, not yet wire up for external ports (Paulo) - edp support (Paulo) - tons of refactorings to prepare for the above (Paulo) - panel rework, unifiying code between lvds and edp panels (Jani) - panel fitter scaling modes (Jani + Yuly Novikov) - panel power improvements, should now work without the BIOS setting it up - extracting some dp helpers from radeon/i915 and move them to drm_dp_helper.c - randome pile of workarounds (Damien, Ben, ...) - some cleanups for the register restore code for suspend/resume - secure batchbuffer support, should enable tear-free blits on gen6+ (Chris) - random smaller fixlets and cleanups. Go forth and test! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, New -testing cycle. Highlights: - tons of hsw dp prep patches form Paulo - round scheduled work items and timers to nearest second (Chris) - some hw workarounds (Jesse&Damien) - vlv dp support and related fixups (Vijay et al.) Not that much, despite the extended review window. We have tons more patches, but a bit a review and test backlog. Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, New code to beat on! Highlights: - rework of the gem backing pages handling (preps for stolen mem handling) from Chris - cpu freq interface in sysfs from Ben - cpu edp fixes and some related cleanups - write-combining ptes for pre-gen6 (Chris) - basic CADL support (Peter Wu) - some more cleanup-fallout from the modeset-rework Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi All, New -testing cycle. Highlights from this -next: - New modeset code framework. - Tiny fix in the fb helper to go through the official dpms interface instead of calling the crtc helper code. - forcewake code frobbery from Ben, code should be more in-line with what Windows does now. - fixes for the render ring flush on hsw (Paulo) - gpu frequency tracepoint - vlv forcewake changes to better align it with our understanding of the forcewake magic. - a few smaller cleanups Happy testing! Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi All, Another two weeks, another round of -testing. Highlights: - prep patches for the modeset rework. Note that one of those patches touches the fb helper in the common drm code. - hasw hdmi audio support (Wang Xingchao) - improved instdone dumping for gen7 (Ben) - unbound tracking and a few follow-up patches from Chris - dma_buf->begin/end_cpu_access plus fix for drm/udl (Dave) - improve mmio error reporting for hsw - prep patch for WQ_NON_REENTRANT removal (Tejun Heo) Go forth and test! Cheers, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Updated -testing branch
On Sun, Aug 12, 2012 at 02:55:25PM +0200, Daniel Vetter wrote: > Hi all, > > Note that the new -next is rebased a bit and not a descendant of the old > -nextso that I could fish out a few fixes for 3.6. > > Highlights of the entire thing: > - hsw hdmi improvements (Paulo) > - ips/rps locking rework and cleanups > - rc6 on ilk by default again > - hw context&dp&dpff support for hsw (Ben) > - GET_PARAM_HAS_SEMAPHORES (Chris) > - gen6+ pipe_control improvements (Chris) > - set_cacheing ioctl and assorted support code (Chris) > - cleanups around the busy/idle/pm code (Chris&me) > - flushing_list removal, hopefully for good (Chris) > - read_reg ioctl (Ben) > - support the ns2501 dvo (Thomas Richter) > - avoid the costly gen6+ "missed IRQ" workaround where we don't need a > race-free seqno readback (Chris) > - various bits&pieces, mostly early patches from the modeset rework branch > > Happy testing! Chris request a shortlog for all the new stuff in -next. Since -next is rebased, I've included everything in the shortlog that isn't in -fixes (i.e. all the things heading for 3.7). -Daniel Ben Widawsky (4): drm/i915: add register read IOCTL drm/i915: Add contexts for HSW drm/i915: Macro to determine DPF support drm/i915: Expand DPF support to Haswell Chris Wilson (17): drm/i915: Cleanup context switching through do_switch() drm/i915: Return a mask of the active rings in the high word of busy_ioctl drm/i915: Allow late allocation of request for i915_add_request() drm/i915: Remove assertion over write domain after i915_gem_object_sync() drm/i915: Replace the pending_gpu_write flag with an explicit seqno drm/i915: Remove the defunct flushing list drm/i915: Remove the per-ring write list drm/i915: Remove explicit flush from i915_gem_object_flush_fence() drm/i915: Remove the explicit flush of the GPU write domain drm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer drm/i915: Split i915_gem_flush_ring() into seperate invalidate/flush funcs drm/i915: Avoid concurrent access when marking the device as idle/busy drm/i915: Segregate memory domains in the GTT using coloring drm/i915: Export ability of changing cache levels to userspace drm/i915: Only apply the SNB pipe control w/a to gen6 drm/i915: Add I915_GEM_PARAM_HAS_SEMAPHORES drm/i915: Lazily apply the SNB+ seqno w/a Daniel Vetter (20): drm/i915: group ADPA #defines together drm/i915: simplify possible_clones computation drm/i915: add port parameter to intel_hdmi_init drm/i915: Reserve ioctl numbers for set/get_caching drm/i915: create VLV_DSIPLAY_BASE #define drm/i915: add inte_crt->adpa_reg drm/i915: Replace the complex flushing logic with simple invalidate/flush all drm/i915: Only set the down rps limit when at the loweset frequency drm/i915: rip out sanitize_pm again drm/i915: fixup desired rps frequency computation drm/i915: dump the device info drm/i915: properly guard ilk ips state drm/i915: fixup up debugfs rps state handling drm/i915: use mutex_lock_interruptible for debugfs files drm/i915: move all rps state into dev_priv->rps drm/i915: kill dev_priv->mchdev_lock drm/i915: DE_PCU_EVENT irq is ilk-only drm/i915: fix up ilk drps/ips locking drm/i915: enable rc6 on ilk again drm/i915: don't grab dev->struct_mutex for userspace forcewak Eugeni Dodonov (1): drm/i915: prevent possible pin leak on error path Paulo Zanoni (10): drm/i915: move common code to intel_dp_set_link_train drm/i915: add port field to struct intel_dp and use it drm/i915: fix pipe DDI mode select drm/i915: set the DDI sync polarity bits drm/i915: correctly set the DDI_FUNC_CTL bpc field drm/i915: completely reset the value of DDI_FUNC_CTL drm/i915: reindent Haswell register definitions drm/i915: add parentheses around PIXCLK_GATE definitions drm/i915: use the correct encoder type when comparing drm/i915: try harder to find WR PLL clock settings Shobhit Kumar (1): drm/i915: Move DP structs to shared location Thomas Richter (1): drm/i915: Support for ns2501-DVO -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing branch
Hi all, Note that the new -next is rebased a bit and not a descendant of the old -nextso that I could fish out a few fixes for 3.6. Highlights of the entire thing: - hsw hdmi improvements (Paulo) - ips/rps locking rework and cleanups - rc6 on ilk by default again - hw context&dp&dpff support for hsw (Ben) - GET_PARAM_HAS_SEMAPHORES (Chris) - gen6+ pipe_control improvements (Chris) - set_cacheing ioctl and assorted support code (Chris) - cleanups around the busy/idle/pm code (Chris&me) - flushing_list removal, hopefully for good (Chris) - read_reg ioctl (Ben) - support the ns2501 dvo (Thomas Richter) - avoid the costly gen6+ "missed IRQ" workaround where we don't need a race-free seqno readback (Chris) - various bits&pieces, mostly early patches from the modeset rework branch Happy testing! Cheers, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Updated -testing
Hi all, I've pushed out new -next and -testing branches. Highlights: - rc6/turbo support for hsw (Eugeni) - improve corner-case of the reset handling code - gpu reset handling should be rock-solid now - support for fb offset > 4096 pixels on gen4 (yeah, you need some fairly big screens to hit that) - the "Flush Me Harder" patch to fix the gen6+ fallout from disabling the flushing_list - no more /dev/agpgart on gen6+! - HAS_PCH_xxx improvements from Paulo - a few minor bits&pieces all over, most of it in thew hsw code Go wild and beat on this! Cheers, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
