[PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay

2024-03-06 Thread Jouni Högander 
Enable ALPM AUX-Less for Panel Replay eDP. Also write all calculated
AUX-Less configuration values accordingly.

Bspec: 71477

v3:
  - do not use alpm_ctl as uninitialized variable
v2:
  - do not set AUX-Wake related bits for AUX-Less case
  - drop switch to active latency
  - add SLEEP_HOLD_TIME_50_SYMBOLS
  - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 42 +---
 1 file changed, 38 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 738ea623a395..4cd2bad5241f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1697,14 +1697,39 @@ static void lnl_alpm_configure(struct intel_dp 
*intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
struct intel_psr *psr = &intel_dp->psr;
+   u32 alpm_ctl;
 
if (DISPLAY_VER(dev_priv) < 20)
return;
 
-   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
-  ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
-  
ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines) |
-  
ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr->alpm_parameters.fast_wake_lines));
+   if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
+   alpm_ctl = ALPM_CTL_ALPM_ENABLE |
+   ALPM_CTL_ALPM_AUX_LESS_ENABLE |
+   ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
+
+   intel_de_write(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
+  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
+  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
+  PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
+  PORT_ALPM_CTL_SILENCE_PERIOD(
+  
psr->alpm_parameters.silence_period_sym_clocks));
+
+   intel_de_write(dev_priv, PORT_ALPM_LFPS_CTL(cpu_transcoder),
+  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
+  PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
+  
psr->alpm_parameters.lfps_half_cycle_num_of_syms) |
+  
PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
+  
psr->alpm_parameters.lfps_half_cycle_num_of_syms) |
+  PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
+  
psr->alpm_parameters.lfps_half_cycle_num_of_syms));
+   } else {
+   alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
+   
ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr->alpm_parameters.fast_wake_lines);
+   }
+
+   alpm_ctl |= 
ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines);
+
+   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
 }
 
 static void intel_psr_enable_source(struct intel_dp *intel_dp,
@@ -1975,6 +2000,15 @@ static void intel_psr_disable_locked(struct intel_dp 
*intel_dp)
 
intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
 
+   if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
+   intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
+ALPM_CTL_ALPM_ENABLE |
+ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+
+   intel_de_rmw(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
+PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+   }
+
/* Disable PSR on Sink */
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
 
-- 
2.34.1

RE: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay

2024-03-13 Thread Manna, Animesh 


> -Original Message-
> From: Hogander, Jouni 
> Sent: Wednesday, March 6, 2024 4:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni 
> Subject: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay
> 
> Enable ALPM AUX-Less for Panel Replay eDP. Also write all calculated AUX-
> Less configuration values accordingly.
> 
> Bspec: 71477
> 
> v3:
>   - do not use alpm_ctl as uninitialized variable
> v2:
>   - do not set AUX-Wake related bits for AUX-Less case
>   - drop switch to active latency
>   - add SLEEP_HOLD_TIME_50_SYMBOLS
>   - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD
> 
> Signed-off-by: Jouni Högander 
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 42 +---
>  1 file changed, 38 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 738ea623a395..4cd2bad5241f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1697,14 +1697,39 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
>   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>   enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
>   struct intel_psr *psr = &intel_dp->psr;
> + u32 alpm_ctl;
> 
>   if (DISPLAY_VER(dev_priv) < 20)
>   return;
> 
> - intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> -ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> -ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> >alpm_parameters.check_entry_lines) |
> -ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> >alpm_parameters.fast_wake_lines));
> + if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> + alpm_ctl = ALPM_CTL_ALPM_ENABLE |
> + ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> +
>   ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
> +
> + intel_de_write(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
> +PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |

Good to add code-comments why aux-less alpm is enabled without checking panel 
capability.

Same for below wherever we are setting bit for aux-less alpm.

Regards,
Animesh
 
> +PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
> +PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
> +PORT_ALPM_CTL_SILENCE_PERIOD(
> +psr-
> >alpm_parameters.silence_period_sym_clocks));
> +
> + intel_de_write(dev_priv,
> PORT_ALPM_LFPS_CTL(cpu_transcoder),
> +PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
> +
> PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms) |
> +
> PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms) |
> +
> PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms));
> + } else {
> + alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> + ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> >alpm_parameters.fast_wake_lines);
> + }
> +
> + alpm_ctl |=
> +ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> >alpm_parameters.check_entry_lines);
> +
> + intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
>  }
> 
>  static void intel_psr_enable_source(struct intel_dp *intel_dp, @@ -1975,6
> +2000,15 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> 
>   intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
> 
> + if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> + intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> +  ALPM_CTL_ALPM_ENABLE |
> +  ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> +
> + intel_de_rmw(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
> +  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> + }
> +
>   /* Disable PSR on Sink */
>   drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
> 
> --
> 2.34.1

Re: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay

2024-03-13 Thread Hogander, Jouni 
On Wed, 2024-03-13 at 11:15 +, Manna, Animesh wrote:
> 
> 
> > -Original Message-
> > From: Hogander, Jouni 
> > Sent: Wednesday, March 6, 2024 4:15 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Ville Syrjälä ; Manna, Animesh
> > ; Murthy, Arun R
> > ;
> > Hogander, Jouni 
> > Subject: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel
> > replay
> > 
> > Enable ALPM AUX-Less for Panel Replay eDP. Also write all
> > calculated AUX-
> > Less configuration values accordingly.
> > 
> > Bspec: 71477
> > 
> > v3:
> >   - do not use alpm_ctl as uninitialized variable
> > v2:
> >   - do not set AUX-Wake related bits for AUX-Less case
> >   - drop switch to active latency
> >   - add SLEEP_HOLD_TIME_50_SYMBOLS
> >   - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD
> > 
> > Signed-off-by: Jouni Högander 
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 42
> > +---
> >  1 file changed, 38 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 738ea623a395..4cd2bad5241f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1697,14 +1697,39 @@ static void lnl_alpm_configure(struct
> > intel_dp
> > *intel_dp)
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> > struct intel_psr *psr = &intel_dp->psr;
> > +   u32 alpm_ctl;
> > 
> > if (DISPLAY_VER(dev_priv) < 20)
> > return;
> > 
> > -   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> > -  ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> > -  ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> > > alpm_parameters.check_entry_lines) |
> > -  ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> > > alpm_parameters.fast_wake_lines));
> > +   if (intel_dp->psr.panel_replay_enabled &&
> > intel_dp_is_edp(intel_dp)) {
> > +   alpm_ctl = ALPM_CTL_ALPM_ENABLE |
> > +   ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> > +
> > ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
> > +
> > +   intel_de_write(dev_priv,
> > PORT_ALPM_CTL(cpu_transcoder),
> > +  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> 
> Good to add code-comments why aux-less alpm is enabled without
> checking panel capability.
> 
> Same for below wherever we are setting bit for aux-less alpm.

Ok, I will add these comments.

BR,

Jouni Högander
> 
> Regards,
> Animesh
>  
> > + 
> > PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
> > +  PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0)
> > |
> > +  PORT_ALPM_CTL_SILENCE_PERIOD(
> > +  psr-
> > > alpm_parameters.silence_period_sym_clocks));
> > +
> > +   intel_de_write(dev_priv,
> > PORT_ALPM_LFPS_CTL(cpu_transcoder),
> > + 
> > PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
> > +
> > PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms) |
> > +
> > PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms) |
> > +
> > PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms));
> > +   } else {
> > +   alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> > +   ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> > > alpm_parameters.fast_wake_lines);
> > +   }
> > +
> > +   alpm_ctl |=
> > +ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> > > alpm_parameters.check_entry_lines);
> > +
> > +   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> > alpm_ctl);
> >  }
> > 
> >  static void intel_psr_enable_source(struct intel_dp *intel_dp, @@
> > -1975,6
> > +2000,15 @@ static void intel_psr_disable_locked(struct intel_dp
> > *intel_dp)
> > 
> > intel_snps_phy_update_psr_power_state(dev_priv, phy,
> > false);
> > 
> > +   if (intel_dp->psr.panel_replay_enabled &&
> > intel_dp_is_edp(intel_dp)) {
> > +   intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> > +    ALPM_CTL_ALPM_ENABLE |
> > +    ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> > +
> > +   intel_de_rmw(dev_priv,
> > PORT_ALPM_CTL(cpu_transcoder),
> > +    PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE,
> > 0);
> > +   }
> > +
> > /* Disable PSR on Sink */
> > drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
> > 
> > --
> > 2.34.1
>