On Thu, 15 Sep 2016, bobcao3 wrote:
> DRM: i915: Fix gen8 graphics on Broadwell-U. These patches stop the
> random gpu hang on my XPS-13-9343, kernel version 4.8-rc5.
Please do everyone a favor and file a bug on the hangs over at [1],
describing the issue and attaching the error state etc. After that,
referencing the bug in a patch fixing the issue goes a long way for
justifying the patch. What you have here isn't enough.
BR,
Jani.
[1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI=DRM/Intel
On Thu, 15 Sep 2016, bobcao3 wrote:
> Signed-off-by: bobcao3
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 6
> drivers/gpu/drm/i915/i915_gem_stolen.c | 61
> -
> drivers/gpu/drm/i915/i915_reg.h | 6
> drivers/gpu/drm/i915/intel_ringbuffer.c | 19 +-
> 4 files changed, 59 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 7a30af7..0b05dd9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2907,6 +2907,12 @@ static unsigned int gen8_get_total_gtt_size(u16
> bdw_gmch_ctl)
> if (bdw_gmch_ctl > 4)
> bdw_gmch_ctl = 4;
> #endif
> +#ifdef CONFIG_X86_64
> + /* Limit 64b platforms to a 4GB GGTT */
> + /* DMA 4GB protection */
> + if (bdw_gmch_ctl > 8)
> + bdw_gmch_ctl = 8;
> +#endif
>
> return bdw_gmch_ctl << 20;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
> b/drivers/gpu/drm/i915/i915_gem_stolen.c
> index 66be299a1..da272ae 100644
> --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> @@ -352,47 +352,44 @@ static void gen8_get_stolen_reserved(struct
> drm_i915_private *dev_priv,
>unsigned long *base, unsigned long *size)
> {
> uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);
> + unsigned long stolen_top;
> + struct i915_ggtt *ggtt = _priv->ggtt;
>
> *base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
>
> switch (reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK) {
> case GEN8_STOLEN_RESERVED_1M:
> - *size = 1024 * 1024;
> + *size = 1 << 10 << 10;
> break;
> case GEN8_STOLEN_RESERVED_2M:
> - *size = 2 * 1024 * 1024;
> + *size = 2 << 10 << 10;
> break;
> case GEN8_STOLEN_RESERVED_4M:
> - *size = 4 * 1024 * 1024;
> + *size = 4 << 10 << 10;
> break;
> case GEN8_STOLEN_RESERVED_8M:
> - *size = 8 * 1024 * 1024;
> + *size = 8 << 10 << 10;
> break;
> default:
> - *size = 8 * 1024 * 1024;
> - MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
> - }
> -}
> -
> -static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
> - unsigned long *base, unsigned long *size)
> -{
> - struct i915_ggtt *ggtt = _priv->ggtt;
> - uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);
> - unsigned long stolen_top;
> + /* Whatever if it is a BDW device or SKL device
> + * Or others devices..
> + * This way is always going to work on 5th
> + * generation Intel Processer
> + */
> + stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
>
> - stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
> + *base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
>
> - *base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
> + /* MLIMIT - MBASE => PEG */
> + /* -- mobile-5th-gen-core-family-datasheet-vol-2.pdf */
> + if (*base == 0) {
> + *size = 0;
> + MISSING_CASE(reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK);
> + } else
> + *size = stolen_top - *base;
>
> - /* On these platforms, the register doesn't have a size field, so the
> - * size is the distance between the base and the top of the stolen
> - * memory. We also have the genuine case where base is zero and there's
> - * nothing reserved. */
> - if (*base == 0)
> - *size = 0;
> - else
> - *size = stolen_top - *base;
> + break;
> + }
> }
>
> int i915_gem_init_stolen(struct drm_device *dev)
> @@ -442,14 +439,14 @@ int i915_gem_init_stolen(struct drm_device *dev)
> gen7_get_stolen_reserved(dev_priv, _base,
>_size);
> break;
> + case 8:
> + gen8_get_stolen_reserved(dev_priv, _base,
> + _size);
> + break;
> default:
> - if (IS_BROADWELL(dev_priv) ||
> - IS_SKYLAKE(dev_priv)