Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
On Mon, Mar 28, 2022 at 09:44:36AM +0100, Tvrtko Ursulin wrote: > > + Joonas > > On 25/03/2022 23:03, Francisco Jerez wrote: > > Matt Atwood writes: > > > > > Newer platforms have DSS that aren't necessarily available for both > > > geometry and compute, two queries will need to exist. This introduces > > > the first, when passing a valid engine class and engine instance in the > > > flags returns a topology describing geometry. > > > > > > v2: fix white space errors > > > v3: change flags from hosting 2 8 bit numbers to holding a > > > i915_engine_class_instance struct > > > > > > Cc: Ashutosh Dixit > > > Cc: Matt Roper > > > Cc: Joonas Lahtinen > > > UMD (mesa): > > > https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 > > > Signed-off-by: Matt Atwood > > > --- > > > drivers/gpu/drm/i915/i915_query.c | 68 ++- > > > include/uapi/drm/i915_drm.h | 24 +++ > > > 2 files changed, 65 insertions(+), 27 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_query.c > > > b/drivers/gpu/drm/i915/i915_query.c > > > index 2dfbc22857a3..fcb374201edb 100644 > > > --- a/drivers/gpu/drm/i915/i915_query.c > > > +++ b/drivers/gpu/drm/i915/i915_query.c > > > @@ -9,6 +9,7 @@ > > > #include "i915_drv.h" > > > #include "i915_perf.h" > > > #include "i915_query.h" > > > +#include "gt/intel_engine_user.h" > > > #include > > > static int copy_query_item(void *query_hdr, size_t query_sz, > > > @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t > > > query_sz, > > > return 0; > > > } > > > -static int query_topology_info(struct drm_i915_private *dev_priv, > > > -struct drm_i915_query_item *query_item) > > > +static int fill_topology_info(const struct sseu_dev_info *sseu, > > > + struct drm_i915_query_item *query_item, > > > + const u8 *subslice_mask) > > > { > > > - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; > > > struct drm_i915_query_topology_info topo; > > > u32 slice_length, subslice_length, eu_length, total_length; > > > int ret; > > > - if (query_item->flags != 0) > > > - return -EINVAL; > > > + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > > > if (sseu->max_slices == 0) > > > return -ENODEV; > > > - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > > > - > > > slice_length = sizeof(sseu->slice_mask); > > > subslice_length = sseu->max_slices * sseu->ss_stride; > > > eu_length = sseu->max_slices * sseu->max_subslices * > > > sseu->eu_stride; > > > total_length = sizeof(topo) + slice_length + subslice_length + > > > eu_length; > > > - ret = copy_query_item(, sizeof(topo), total_length, > > > - query_item); > > > + ret = copy_query_item(, sizeof(topo), total_length, query_item); > > > + > > > if (ret != 0) > > > return ret; > > > - if (topo.flags != 0) > > > - return -EINVAL; > > > - > > > memset(, 0, sizeof(topo)); > > > topo.max_slices = sseu->max_slices; > > > topo.max_subslices = sseu->max_subslices; > > > @@ -69,27 +64,61 @@ static int query_topology_info(struct > > > drm_i915_private *dev_priv, > > > topo.eu_stride = sseu->eu_stride; > > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), > > > -, sizeof(topo))) > > > + , sizeof(topo))) > > > return -EFAULT; > > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > > > sizeof(topo)), > > > ->slice_mask, slice_length)) > > > + >slice_mask, slice_length)) > > > return -EFAULT; > > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > > > -sizeof(topo) + slice_length), > > > -sseu->subslice_mask, subslice_length)) > > > + sizeof(topo) + slice_length), > > > + subslice_mask, subslice_length)) > > > return -EFAULT; > > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > > > -sizeof(topo) + > > > -slice_length + subslice_length), > > > -sseu->eu_mask, eu_length)) > > > + sizeof(topo) + > > > + slice_length + subslice_length), > > > + sseu->eu_mask, eu_length)) > > > return -EFAULT; > > > return total_length; > > > } > > > +static int query_topology_info(struct drm_i915_private *dev_priv, > > > +struct drm_i915_query_item *query_item) > > > +{ > > > + const struct sseu_dev_info *sseu =
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
+ Joonas On 25/03/2022 23:03, Francisco Jerez wrote: Matt Atwood writes: Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. v2: fix white space errors v3: change flags from hosting 2 8 bit numbers to holding a i915_engine_class_instance struct Cc: Ashutosh Dixit Cc: Matt Roper Cc: Joonas Lahtinen UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/i915_query.c | 68 ++- include/uapi/drm/i915_drm.h | 24 +++ 2 files changed, 65 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 2dfbc22857a3..fcb374201edb 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -9,6 +9,7 @@ #include "i915_drv.h" #include "i915_perf.h" #include "i915_query.h" +#include "gt/intel_engine_user.h" #include static int copy_query_item(void *query_hdr, size_t query_sz, @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t query_sz, return 0; } -static int query_topology_info(struct drm_i915_private *dev_priv, - struct drm_i915_query_item *query_item) +static int fill_topology_info(const struct sseu_dev_info *sseu, + struct drm_i915_query_item *query_item, + const u8 *subslice_mask) { - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; struct drm_i915_query_topology_info topo; u32 slice_length, subslice_length, eu_length, total_length; int ret; - if (query_item->flags != 0) - return -EINVAL; + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); if (sseu->max_slices == 0) return -ENODEV; - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); - slice_length = sizeof(sseu->slice_mask); subslice_length = sseu->max_slices * sseu->ss_stride; eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; total_length = sizeof(topo) + slice_length + subslice_length + eu_length; - ret = copy_query_item(, sizeof(topo), total_length, - query_item); + ret = copy_query_item(, sizeof(topo), total_length, query_item); + if (ret != 0) return ret; - if (topo.flags != 0) - return -EINVAL; - memset(, 0, sizeof(topo)); topo.max_slices = sseu->max_slices; topo.max_subslices = sseu->max_subslices; @@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private *dev_priv, topo.eu_stride = sseu->eu_stride; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), - , sizeof(topo))) +, sizeof(topo))) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), - >slice_mask, slice_length)) +>slice_mask, slice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + slice_length), - sseu->subslice_mask, subslice_length)) +sizeof(topo) + slice_length), +subslice_mask, subslice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + - slice_length + subslice_length), - sseu->eu_mask, eu_length)) +sizeof(topo) + +slice_length + subslice_length), +sseu->eu_mask, eu_length)) return -EFAULT; return total_length; } +static int query_topology_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; + + if (query_item->flags != 0) + return -EINVAL; + + return fill_topology_info(sseu, query_item, sseu->subslice_mask); +} + +static int query_geometry_subslices(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu; + struct intel_engine_cs *engine; + struct i915_engine_class_instance classinstance; + + if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50)) + return -ENODEV; + + classinstance = *((struct
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
Matt Atwood writes: > Newer platforms have DSS that aren't necessarily available for both > geometry and compute, two queries will need to exist. This introduces > the first, when passing a valid engine class and engine instance in the > flags returns a topology describing geometry. > > v2: fix white space errors > v3: change flags from hosting 2 8 bit numbers to holding a > i915_engine_class_instance struct > > Cc: Ashutosh Dixit > Cc: Matt Roper > Cc: Joonas Lahtinen > UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 > Signed-off-by: Matt Atwood > --- > drivers/gpu/drm/i915/i915_query.c | 68 ++- > include/uapi/drm/i915_drm.h | 24 +++ > 2 files changed, 65 insertions(+), 27 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_query.c > b/drivers/gpu/drm/i915/i915_query.c > index 2dfbc22857a3..fcb374201edb 100644 > --- a/drivers/gpu/drm/i915/i915_query.c > +++ b/drivers/gpu/drm/i915/i915_query.c > @@ -9,6 +9,7 @@ > #include "i915_drv.h" > #include "i915_perf.h" > #include "i915_query.h" > +#include "gt/intel_engine_user.h" > #include > > static int copy_query_item(void *query_hdr, size_t query_sz, > @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t > query_sz, > return 0; > } > > -static int query_topology_info(struct drm_i915_private *dev_priv, > -struct drm_i915_query_item *query_item) > +static int fill_topology_info(const struct sseu_dev_info *sseu, > + struct drm_i915_query_item *query_item, > + const u8 *subslice_mask) > { > - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; > struct drm_i915_query_topology_info topo; > u32 slice_length, subslice_length, eu_length, total_length; > int ret; > > - if (query_item->flags != 0) > - return -EINVAL; > + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > > if (sseu->max_slices == 0) > return -ENODEV; > > - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > - > slice_length = sizeof(sseu->slice_mask); > subslice_length = sseu->max_slices * sseu->ss_stride; > eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; > total_length = sizeof(topo) + slice_length + subslice_length + > eu_length; > > - ret = copy_query_item(, sizeof(topo), total_length, > - query_item); > + ret = copy_query_item(, sizeof(topo), total_length, query_item); > + > if (ret != 0) > return ret; > > - if (topo.flags != 0) > - return -EINVAL; > - > memset(, 0, sizeof(topo)); > topo.max_slices = sseu->max_slices; > topo.max_subslices = sseu->max_subslices; > @@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private > *dev_priv, > topo.eu_stride = sseu->eu_stride; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), > -, sizeof(topo))) > + , sizeof(topo))) > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), > ->slice_mask, slice_length)) > + >slice_mask, slice_length)) > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > -sizeof(topo) + slice_length), > -sseu->subslice_mask, subslice_length)) > + sizeof(topo) + slice_length), > + subslice_mask, subslice_length)) > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > -sizeof(topo) + > -slice_length + subslice_length), > -sseu->eu_mask, eu_length)) > + sizeof(topo) + > + slice_length + subslice_length), > + sseu->eu_mask, eu_length)) > return -EFAULT; > > return total_length; > } > > +static int query_topology_info(struct drm_i915_private *dev_priv, > +struct drm_i915_query_item *query_item) > +{ > + const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; > + > + if (query_item->flags != 0) > + return -EINVAL; > + > + return fill_topology_info(sseu, query_item, sseu->subslice_mask); > +} > + > +static int query_geometry_subslices(struct drm_i915_private *i915, > + struct drm_i915_query_item *query_item) > +{ > + const struct sseu_dev_info *sseu; > + struct intel_engine_cs *engine; > + struct i915_engine_class_instance classinstance; > + > + if (GRAPHICS_VER_FULL(i915) < IP_VER(12,
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
Quoting Tvrtko Ursulin (2022-03-14 17:35:17) > > On 12/03/2022 04:16, Matt Atwood wrote: > > On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote: > >> > >> On 10/03/2022 05:18, Matt Atwood wrote: > >>> Newer platforms have DSS that aren't necessarily available for both > >>> geometry and compute, two queries will need to exist. This introduces > >>> the first, when passing a valid engine class and engine instance in the > >>> flags returns a topology describing geometry. > >>> > >>> v2: fix white space errors > >>> > >>> Cc: Ashutosh Dixit > >>> Cc: Matt Roper > >>> Cc: Joonas Lahtinen > >>> UMD (mesa): > >>> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 > >>> Signed-off-by: Matt Atwood > >>> @@ -2714,6 +2715,9 @@ struct drm_i915_query_item { > >>> * - DRM_I915_QUERY_PERF_CONFIG_LIST > >>> * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID > >>> * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID > >>> +* > >>> +* When query_id == DRM_I915_QUERY_GEOMETRY_SUBSLICES must have bits > >>> 0:7 set > >>> +* as a valid engine class, and bits 8:15 must have a valid engine > >>> instance. > >> > >> Alternatively, all other uapi uses struct i915_engine_class_instance to > >> address engines which uses u16:u16. > >> > >> How ugly it is to stuff a struct into u32 flags is the question... But you > >> could at least use u16:u16 for consistency. Unless you wanted to leave some > >> bits free for the future? > > Originally when I wrote this I was wanting to leave space in case it was > > ever needed. I'm not particularly for or against keeping the space now. > > Yes, shrug... Neither I can't guess if we are ever likely to hit a > problem by having fewer bits for class:instance here compared to other > uapi, or if stuffing struct i915_engine_class_instance into flags would > just be too ugly. I mean there is option to define a new struct and not > use flags at all but that's probably to complicated for what it is. > > Anyone else with an opinion? Consistency or should be fine even like it is? Stuffing a full i915_engine_class_instance was definitely intended when putting it into the flags was suggested. If that is hit with a complication, the next proposed alternative was a new struct. That's why the query interface was made easily extensible, after all... Regards, Joonas
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
On Mon, 14 Mar 2022 08:35:17 -0700, Tvrtko Ursulin wrote: > > >> Alternatively, all other uapi uses struct i915_engine_class_instance to > >> address engines which uses u16:u16. > >> > >> How ugly it is to stuff a struct into u32 flags is the question... But you > >> could at least use u16:u16 for consistency. Unless you wanted to leave some > >> bits free for the future? > > Originally when I wrote this I was wanting to leave space in case it was > > ever needed. I'm not particularly for or against keeping the space now. > > Yes, shrug... Neither I can't guess if we are ever likely to hit a problem > by having fewer bits for class:instance here compared to other uapi, or if > stuffing struct i915_engine_class_instance into flags would just be too > ugly. I mean there is option to define a new struct and not use flags at > all but that's probably to complicated for what it is. > > Anyone else with an opinion? Consistency or should be fine even like it is? Consistency. I'd prefer to stuff struct i915_engine_class_instance into flags, fwiw.
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
On 12/03/2022 04:16, Matt Atwood wrote: On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote: On 10/03/2022 05:18, Matt Atwood wrote: Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. v2: fix white space errors Cc: Ashutosh Dixit Cc: Matt Roper Cc: Joonas Lahtinen UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/i915_query.c | 68 ++- include/uapi/drm/i915_drm.h | 24 +++ 2 files changed, 65 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 2dfbc22857a3..e4f35da28642 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -9,6 +9,7 @@ #include "i915_drv.h" #include "i915_perf.h" #include "i915_query.h" +#include "gt/intel_engine_user.h" #include static int copy_query_item(void *query_hdr, size_t query_sz, @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t query_sz, return 0; } -static int query_topology_info(struct drm_i915_private *dev_priv, - struct drm_i915_query_item *query_item) +static int fill_topology_info(const struct sseu_dev_info *sseu, + struct drm_i915_query_item *query_item, + const u8 *subslice_mask) { - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; struct drm_i915_query_topology_info topo; u32 slice_length, subslice_length, eu_length, total_length; int ret; - if (query_item->flags != 0) - return -EINVAL; + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); if (sseu->max_slices == 0) return -ENODEV; - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); - slice_length = sizeof(sseu->slice_mask); subslice_length = sseu->max_slices * sseu->ss_stride; eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; total_length = sizeof(topo) + slice_length + subslice_length + eu_length; - ret = copy_query_item(, sizeof(topo), total_length, - query_item); + ret = copy_query_item(, sizeof(topo), total_length, query_item); + if (ret != 0) return ret; - if (topo.flags != 0) - return -EINVAL; - memset(, 0, sizeof(topo)); topo.max_slices = sseu->max_slices; topo.max_subslices = sseu->max_subslices; @@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private *dev_priv, topo.eu_stride = sseu->eu_stride; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), - , sizeof(topo))) +, sizeof(topo))) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), - >slice_mask, slice_length)) +>slice_mask, slice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + slice_length), - sseu->subslice_mask, subslice_length)) +sizeof(topo) + slice_length), +subslice_mask, subslice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + - slice_length + subslice_length), - sseu->eu_mask, eu_length)) +sizeof(topo) + +slice_length + subslice_length), +sseu->eu_mask, eu_length)) return -EFAULT; return total_length; } +static int query_topology_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; + + if (query_item->flags != 0) + return -EINVAL; + + return fill_topology_info(sseu, query_item, sseu->subslice_mask); +} + +static int query_geometry_subslices(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu; + struct intel_engine_cs *engine; + u8 engine_class, engine_instance; + + if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50)) + return -ENODEV; + + engine_class = query_item->flags & 0xFF; + engine_instance
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote: > > On 10/03/2022 05:18, Matt Atwood wrote: > > Newer platforms have DSS that aren't necessarily available for both > > geometry and compute, two queries will need to exist. This introduces > > the first, when passing a valid engine class and engine instance in the > > flags returns a topology describing geometry. > > > > v2: fix white space errors > > > > Cc: Ashutosh Dixit > > Cc: Matt Roper > > Cc: Joonas Lahtinen > > UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 > > Signed-off-by: Matt Atwood > > --- > > drivers/gpu/drm/i915/i915_query.c | 68 ++- > > include/uapi/drm/i915_drm.h | 24 +++ > > 2 files changed, 65 insertions(+), 27 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_query.c > > b/drivers/gpu/drm/i915/i915_query.c > > index 2dfbc22857a3..e4f35da28642 100644 > > --- a/drivers/gpu/drm/i915/i915_query.c > > +++ b/drivers/gpu/drm/i915/i915_query.c > > @@ -9,6 +9,7 @@ > > #include "i915_drv.h" > > #include "i915_perf.h" > > #include "i915_query.h" > > +#include "gt/intel_engine_user.h" > > #include > > static int copy_query_item(void *query_hdr, size_t query_sz, > > @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t > > query_sz, > > return 0; > > } > > -static int query_topology_info(struct drm_i915_private *dev_priv, > > - struct drm_i915_query_item *query_item) > > +static int fill_topology_info(const struct sseu_dev_info *sseu, > > + struct drm_i915_query_item *query_item, > > + const u8 *subslice_mask) > > { > > - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; > > struct drm_i915_query_topology_info topo; > > u32 slice_length, subslice_length, eu_length, total_length; > > int ret; > > - if (query_item->flags != 0) > > - return -EINVAL; > > + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > > if (sseu->max_slices == 0) > > return -ENODEV; > > - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); > > - > > slice_length = sizeof(sseu->slice_mask); > > subslice_length = sseu->max_slices * sseu->ss_stride; > > eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; > > total_length = sizeof(topo) + slice_length + subslice_length + > >eu_length; > > - ret = copy_query_item(, sizeof(topo), total_length, > > - query_item); > > + ret = copy_query_item(, sizeof(topo), total_length, query_item); > > + > > if (ret != 0) > > return ret; > > - if (topo.flags != 0) > > - return -EINVAL; > > - > > memset(, 0, sizeof(topo)); > > topo.max_slices = sseu->max_slices; > > topo.max_subslices = sseu->max_subslices; > > @@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private > > *dev_priv, > > topo.eu_stride = sseu->eu_stride; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), > > - , sizeof(topo))) > > +, sizeof(topo))) > > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), > > - >slice_mask, slice_length)) > > +>slice_mask, slice_length)) > > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > > - sizeof(topo) + slice_length), > > - sseu->subslice_mask, subslice_length)) > > +sizeof(topo) + slice_length), > > +subslice_mask, subslice_length)) > > return -EFAULT; > > if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + > > - sizeof(topo) + > > - slice_length + subslice_length), > > - sseu->eu_mask, eu_length)) > > +sizeof(topo) + > > +slice_length + subslice_length), > > +sseu->eu_mask, eu_length)) > > return -EFAULT; > > return total_length; > > } > > +static int query_topology_info(struct drm_i915_private *dev_priv, > > + struct drm_i915_query_item *query_item) > > +{ > > + const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; > > + > > + if (query_item->flags != 0) > > + return -EINVAL; > > + > > + return fill_topology_info(sseu, query_item, sseu->subslice_mask); > > +} > > + > > +static int query_geometry_subslices(struct drm_i915_private *i915, > > + struct drm_i915_query_item *query_item) > > +{ > > + const struct sseu_dev_info *sseu; > > + struct intel_engine_cs *engine; > > + u8 engine_class, engine_instance; > > + > > + if
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
On 10/03/2022 05:18, Matt Atwood wrote: Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. v2: fix white space errors Cc: Ashutosh Dixit Cc: Matt Roper Cc: Joonas Lahtinen UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/i915_query.c | 68 ++- include/uapi/drm/i915_drm.h | 24 +++ 2 files changed, 65 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 2dfbc22857a3..e4f35da28642 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -9,6 +9,7 @@ #include "i915_drv.h" #include "i915_perf.h" #include "i915_query.h" +#include "gt/intel_engine_user.h" #include static int copy_query_item(void *query_hdr, size_t query_sz, @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t query_sz, return 0; } -static int query_topology_info(struct drm_i915_private *dev_priv, - struct drm_i915_query_item *query_item) +static int fill_topology_info(const struct sseu_dev_info *sseu, + struct drm_i915_query_item *query_item, + const u8 *subslice_mask) { - const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; struct drm_i915_query_topology_info topo; u32 slice_length, subslice_length, eu_length, total_length; int ret; - if (query_item->flags != 0) - return -EINVAL; + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); if (sseu->max_slices == 0) return -ENODEV; - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); - slice_length = sizeof(sseu->slice_mask); subslice_length = sseu->max_slices * sseu->ss_stride; eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; total_length = sizeof(topo) + slice_length + subslice_length + eu_length; - ret = copy_query_item(, sizeof(topo), total_length, - query_item); + ret = copy_query_item(, sizeof(topo), total_length, query_item); + if (ret != 0) return ret; - if (topo.flags != 0) - return -EINVAL; - memset(, 0, sizeof(topo)); topo.max_slices = sseu->max_slices; topo.max_subslices = sseu->max_subslices; @@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private *dev_priv, topo.eu_stride = sseu->eu_stride; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), - , sizeof(topo))) +, sizeof(topo))) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), - >slice_mask, slice_length)) +>slice_mask, slice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + slice_length), - sseu->subslice_mask, subslice_length)) +sizeof(topo) + slice_length), +subslice_mask, subslice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + - slice_length + subslice_length), - sseu->eu_mask, eu_length)) +sizeof(topo) + +slice_length + subslice_length), +sseu->eu_mask, eu_length)) return -EFAULT; return total_length; } +static int query_topology_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu = _gt(dev_priv)->info.sseu; + + if (query_item->flags != 0) + return -EINVAL; + + return fill_topology_info(sseu, query_item, sseu->subslice_mask); +} + +static int query_geometry_subslices(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu; + struct intel_engine_cs *engine; + u8 engine_class, engine_instance; + + if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50)) + return -ENODEV; + + engine_class = query_item->flags & 0xFF; + engine_instance = (query_item->flags >> 8) & 0xFF; + + engine = intel_engine_lookup_user(i915, engine_class, engine_instance); +