Re: [Intel-gfx] [PATCH 09/10] drm/i915: Clean up SSKPD/MLTR defines
Hi Ville, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip v5.10-rc3 next-20201113] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Ville-Syrjala/drm-i915-ilk-wm-cleanups/20201031-222959 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-a003-20201031 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/c5a60152af62d42e7f7ab2525073c7d7f74a8e7c git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Ville-Syrjala/drm-i915-ilk-wm-cleanups/20201031-222959 git checkout c5a60152af62d42e7f7ab2525073c7d7f74a8e7c # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): In file included from : drivers/gpu/drm/i915/intel_pm.c: In function 'intel_read_wm_latency': >> include/linux/bits.h:35:22: error: left shift count >= width of type >> [-Werror=shift-count-overflow] 35 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | ^~ include/linux/compiler_types.h:299:9: note: in definition of macro '__compiletime_assert' 299 | if (!(condition)) \ | ^ include/linux/compiler_types.h:319:2: note: in expansion of macro '_compiletime_assert' 319 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^~~ include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert' 39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) | ^~ include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG' 46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ | ^~~~ include/linux/bitfield.h:108:3: note: in expansion of macro '__BF_FIELD_CHECK' 108 | __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ | ^~~~ drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro 'FIELD_GET' 184 | #define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val)) |^ drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro '_REG_FIELD_GET' 208 | #define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val) |^~ drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro 'REG_FIELD_GET64' 2936 | wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd); | ^~~ include/linux/bits.h:38:31: note: in expansion of macro '__GENMASK' 38 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^ drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro 'GENMASK' 133 | ((__type)(GENMASK(__high, __low) +\ |^~~ drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro '_REG_GENMASK' 160 | #define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low) | ^~~~ drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro 'REG_GENMASK64' 3822 | #define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56) | ^ drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro 'SSKPD_NEW_WM0_MASK_HSW' 2936 | wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd); | ^~ >> include/linux/bits.h:36:11: error: right shift count is negative >> [-Werror=shift-count-negative] 36 | (~UL(0) >> (BITS_PER_LONG - 1 - (h | ^~ include/linux/compiler_types.h:299:9: note: in definition of macro '__compiletime_assert' 299 | if (!(condition)) \ | ^ include/linux/compiler_types.h:319:2: note: in expansion of macro '_compiletime_assert' 319 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^~~ include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert' 39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) | ^~ include/linux/bitfield.h:46:3: note: in expansion of macro
Re: [Intel-gfx] [PATCH 09/10] drm/i915: Clean up SSKPD/MLTR defines
Hi Ville, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip v5.10-rc1 next-20201030] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Ville-Syrjala/drm-i915-ilk-wm-cleanups/20201031-005212 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-r002-20201030 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/85b64f8c6a46ef8a0a7f4969c508d4272a940a83 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Ville-Syrjala/drm-i915-ilk-wm-cleanups/20201031-005212 git checkout 85b64f8c6a46ef8a0a7f4969c508d4272a940a83 # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All error/warnings (new ones prefixed by >>): |^~~ drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro '_REG_GENMASK' 160 | #define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low) | ^~~~ drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro 'REG_GENMASK64' 3822 | #define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56) | ^ drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro 'SSKPD_NEW_WM0_MASK_HSW' 2936 | wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd); | ^~ include/linux/bits.h:35:22: warning: left shift count >= width of type [-Wshift-count-overflow] 35 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | ^~ include/linux/compiler_types.h:299:9: note: in definition of macro '__compiletime_assert' 299 | if (!(condition)) \ | ^ include/linux/compiler_types.h:319:2: note: in expansion of macro '_compiletime_assert' 319 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^~~ include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert' 39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) | ^~ include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG' 49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ | ^~~~ include/linux/bitfield.h:50:19: note: in expansion of macro '__bf_shf' 50 | ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ | ^~~~ include/linux/bitfield.h:108:3: note: in expansion of macro '__BF_FIELD_CHECK' 108 | __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ | ^~~~ drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro 'FIELD_GET' 184 | #define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val)) |^ drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro '_REG_FIELD_GET' 208 | #define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val) |^~ drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro 'REG_FIELD_GET64' 2936 | wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd); | ^~~ include/linux/bits.h:38:31: note: in expansion of macro '__GENMASK' 38 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^ drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro 'GENMASK' 133 | ((__type)(GENMASK(__high, __low) +\ |^~~ drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro '_REG_GENMASK' 160 | #define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low) | ^~~~ drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro 'REG_GENMASK64' 3822 | #define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56) | ^ drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro 'SSKPD_NEW_WM0_MASK_HSW' 2936 | wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd); | ^~ include/linux/bits.h:36:11: warning: right shift count is negative
