Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture

2022-10-18 Thread Tvrtko Ursulin 



On 17/10/2022 18:32, Teres Alexis, Alan Previn wrote:

ADL-P doesnt support CCS and DG2 is stll force-probe (so hoping to get this 
before DG2 goes live).

->


On Mon, 2022-10-17 at 09:43 +0100, Tvrtko Ursulin wrote:

On 15/10/2022 04:59, Alan Previn wrote:

Add compute reglist for GuC error capture.

Signed-off-by: Alan Previn 
---
   drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 
   1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 290c1e1343dd..da3a09c11d12 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_RENDER_CLASS),
+   MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, 
GUC_COMPUTE_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_COMPUTE_CLASS),


Does this means error capture on ADL-P was incomplete aka should
something be sent to stable?


-> okay I read xe_lpd_rc_inst_regs and somehow thought this is adding 
xe_lpd support for the first time. My bad.


Regards,

Tvrtko




MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
@@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group 
xe_lpd_lists[] = {
MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_RENDER_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_COMPUTE_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, 
GUC_VIDEOENHANCE_CLASS),

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture

2022-10-17 Thread Teres Alexis, Alan Previn 
ADL-P doesnt support CCS and DG2 is stll force-probe (so hoping to get this 
before DG2 goes live).
...alan

On Mon, 2022-10-17 at 09:43 +0100, Tvrtko Ursulin wrote:
> On 15/10/2022 04:59, Alan Previn wrote:
> > Add compute reglist for GuC error capture.
> > 
> > Signed-off-by: Alan Previn 
> > ---
> >   drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 
> >   1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > index 290c1e1343dd..da3a09c11d12 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group 
> > default_lists[] = {
> > MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
> > MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> > MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
> > GUC_RENDER_CLASS),
> > +   MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, 
> > GUC_COMPUTE_CLASS),
> > +   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
> > GUC_COMPUTE_CLASS),
> 
> Does this means error capture on ADL-P was incomplete aka should 
> something be sent to stable?
> 
> Regards,
> 
> Tvrtko
> 
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
> > @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group 
> > xe_lpd_lists[] = {
> > MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
> > MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> > MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
> > GUC_RENDER_CLASS),
> > +   MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> > +   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
> > GUC_COMPUTE_CLASS),
> > MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> > MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, 
> > GUC_VIDEOENHANCE_CLASS),

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture

2022-10-17 Thread Tvrtko Ursulin 



On 15/10/2022 04:59, Alan Previn wrote:

Add compute reglist for GuC error capture.

Signed-off-by: Alan Previn 
---
  drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 
  1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 290c1e1343dd..da3a09c11d12 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_RENDER_CLASS),
+   MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, 
GUC_COMPUTE_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_COMPUTE_CLASS),


Does this means error capture on ADL-P was incomplete aka should 
something be sent to stable?


Regards,

Tvrtko


MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
@@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group 
xe_lpd_lists[] = {
MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_RENDER_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
+   MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, 
GUC_COMPUTE_CLASS),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, 
GUC_VIDEOENHANCE_CLASS),