Re: [Intel-gfx] [PATCH 6/6] drm/i915/gen9: Corrected the sanity check of mmio address range for csr.

[Daniel Vetter]

On Wed, Jul 08, 2015 at 07:54:47PM +0530, Animesh Manna wrote:
 Signed-off-by: Animesh Manna animesh.ma...@intel.com
 ---
  drivers/gpu/drm/i915/intel_csr.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/gpu/drm/i915/intel_csr.c 
 b/drivers/gpu/drm/i915/intel_csr.c
 index d600640..f515d54 100644
 --- a/drivers/gpu/drm/i915/intel_csr.c
 +++ b/drivers/gpu/drm/i915/intel_csr.c
 @@ -296,7 +296,7 @@ static void finish_csr_load(const struct firmware *fw,
   }
   csr-mmio_count = dmc_header-mmio_count;
   for (i = 0; i  dmc_header-mmio_count; i++) {
 - if (dmc_header-mmioaddr[i]  CSR_MMIO_START_RANGE 
 + if (dmc_header-mmioaddr[i]  CSR_MMIO_START_RANGE ||
   dmc_header-mmioaddr[i]  CSR_MMIO_END_RANGE) {

Please also fix the alignement of the 2nd line, it should align with the
opening ( like this
if (aa 
bb) {
/* more code */
}

Cheers, Daniel
   DRM_ERROR( Firmware has wrong mmio address 0x%x\n,
   dmc_header-mmioaddr[i]);
 -- 
 2.0.2
 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH 6/6] drm/i915/gen9: Corrected the sanity check of mmio address range for csr.

[shuang . he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: 
shuang...@intel.com)
Task id: 6752
-Summary-
Platform  Delta  drm-intel-nightly  Series Applied
ILK  302/302  302/302
SNB  312/316  312/316
IVB  343/343  343/343
BYT -2  287/287  285/287
HSW  380/380  380/380
-Detailed-
Platform  Testdrm-intel-nightly  Series 
Applied
*BYT  igt@gem_partial_pwrite_pread@reads-display  PASS(1)  FAIL(1)
*BYT  igt@gem_tiled_partial_pwrite_pread@reads  PASS(1)  FAIL(1)
Note: You need to pay more attention to line start with '*'
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