[Intel-gfx] [PATCH 2/4] drm/i915/display: Handle fused off HDCP
HDCP could be fused off, so not all GEN9+ platforms will support it.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 2 ++
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
5 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index e69fa34528df..f1f41ca8402b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -922,7 +922,7 @@ static void intel_hdcp_prop_work(struct work_struct *work)
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
{
/* PORT E doesn't have HDCP, and PORT F is disabled */
- return INTEL_GEN(dev_priv) >= 9 && port < PORT_E;
+ return INTEL_INFO(dev_priv)->display.has_hdcp && port < PORT_E;
}
static int
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1cbf3998b361..cf956deb0bdf 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -600,6 +600,7 @@ static const struct intel_device_info intel_cherryview_info
= {
.has_logical_ring_preemption = 1, \
.display.has_csr = 1, \
.has_gt_uc = 1, \
+ .display.has_hdcp = 1, \
.display.has_ipc = 1, \
.ddb_size = 896
@@ -643,6 +644,7 @@ static const struct intel_device_info
intel_skylake_gt4_info = {
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
.display.has_fbc = 1, \
+ .display.has_hdcp = 1, \
.display.has_psr = 1, \
.has_runtime_pm = 1, \
.display.has_csr = 1, \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0fb9030b89f1..b383511b6231 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7643,6 +7643,7 @@ enum {
#define CNL_DDI_CLOCK_REG_ACCESS_ON (1 << 7)
#define SKL_DFSM _MMIO(0x51000)
+#define SKL_DFSM_DISPLAY_HDCP_DISABLE (1 << 25)
#define SKL_DFSM_CDCLK_LIMIT_MASK (3 << 23)
#define SKL_DFSM_CDCLK_LIMIT_675 (0 << 23)
#define SKL_DFSM_CDCLK_LIMIT_540 (1 << 23)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index c01fccfe3cca..5cfa197090e2 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -980,6 +980,9 @@ void intel_device_info_runtime_init(struct drm_i915_private
*dev_priv)
enabled_mask);
info->pipe_mask = enabled_mask;
+
+ if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
+ info->display.has_hdcp = 0;
}
/* Initialize slice/subslice/EU info */
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 0cdc2465534b..94165b18ed9b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -138,6 +138,7 @@ enum intel_ppgtt_type {
func(has_dsb); \
func(has_fbc); \
func(has_gmch); \
+ func(has_hdcp); \
func(has_hotplug); \
func(has_ipc); \
func(has_modular_fia); \
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/4] drm/i915/display: DFSM CDCLK LIMIT is only available in BXT
On GLK those registers are reserved and on another gens it have
another meaning, so renaming it to BXT only.
BSpec: 7548
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 12 +---
drivers/gpu/drm/i915/i915_reg.h| 10 +-
2 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 43564295b864..a1787d165467 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2384,8 +2384,8 @@ void intel_update_max_cdclk(struct drm_i915_private
*dev_priv)
dev_priv->max_cdclk_freq = 652800;
} else if (IS_CANNONLAKE(dev_priv)) {
dev_priv->max_cdclk_freq = 528000;
- } else if (IS_GEN9_BC(dev_priv)) {
- u32 limit = I915_READ(SKL_DFSM) & SKL_DFSM_CDCLK_LIMIT_MASK;
+ } else if (IS_BROXTON(dev_priv)) {
+ u32 limit = I915_READ(SKL_DFSM) & BXT_DFSM_CDCLK_LIMIT_MASK;
int max_cdclk, vco;
vco = dev_priv->skl_preferred_vco_freq;
@@ -2396,11 +2396,11 @@ void intel_update_max_cdclk(struct drm_i915_private
*dev_priv)
* first guess. skl_calc_cdclk() will correct it
* if the preferred vco is 8100 instead.
*/
- if (limit == SKL_DFSM_CDCLK_LIMIT_675)
+ if (limit == BXT_DFSM_CDCLK_LIMIT_675)
max_cdclk = 617143;
- else if (limit == SKL_DFSM_CDCLK_LIMIT_540)
+ else if (limit == BXT_DFSM_CDCLK_LIMIT_540)
max_cdclk = 54;
- else if (limit == SKL_DFSM_CDCLK_LIMIT_450)
+ else if (limit == BXT_DFSM_CDCLK_LIMIT_450)
max_cdclk = 432000;
else
max_cdclk = 308571;
@@ -2408,8 +2408,6 @@ void intel_update_max_cdclk(struct drm_i915_private
*dev_priv)
dev_priv->max_cdclk_freq = skl_calc_cdclk(max_cdclk, vco);
} else if (IS_GEMINILAKE(dev_priv)) {
dev_priv->max_cdclk_freq = 316800;
- } else if (IS_BROXTON(dev_priv)) {
- dev_priv->max_cdclk_freq = 624000;
} else if (IS_BROADWELL(dev_priv)) {
/*
* FIXME with extra cooling we can allow
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b383511b6231..39c65f051468 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7644,11 +7644,11 @@ enum {
#define SKL_DFSM _MMIO(0x51000)
#define SKL_DFSM_DISPLAY_HDCP_DISABLE (1 << 25)
-#define SKL_DFSM_CDCLK_LIMIT_MASK (3 << 23)
-#define SKL_DFSM_CDCLK_LIMIT_675 (0 << 23)
-#define SKL_DFSM_CDCLK_LIMIT_540 (1 << 23)
-#define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23)
-#define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
+#define BXT_DFSM_CDCLK_LIMIT_MASK (3 << 23)
+#define BXT_DFSM_CDCLK_LIMIT_675 (0 << 23)
+#define BXT_DFSM_CDCLK_LIMIT_540 (1 << 23)
+#define BXT_DFSM_CDCLK_LIMIT_450 (2 << 23)
+#define BXT_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
#define SKL_DFSM_PIPE_A_DISABLE(1 << 30)
#define SKL_DFSM_PIPE_B_DISABLE(1 << 21)
#define SKL_DFSM_PIPE_C_DISABLE(1 << 28)
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Mark up expected state during reset
== Series Details == Series: drm/i915/execlists: Mark up expected state during reset URL : https://patchwork.freedesktop.org/series/67830/ State : success == Summary == CI Bug Log - changes from CI_DRM_7050_full -> Patchwork_14745_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_14745_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +7 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-apl1/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-apl3/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_eio@in-flight-contexts-immediate: - shard-snb: [PASS][3] -> [FAIL][4] ([fdo#111925]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-snb4/igt@gem_...@in-flight-contexts-immediate.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-snb1/igt@gem_...@in-flight-contexts-immediate.html * igt@gem_exec_blt@dumb-buf-max: - shard-apl: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-apl8/igt@gem_exec_...@dumb-buf-max.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-apl7/igt@gem_exec_...@dumb-buf-max.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#111325]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-iclb7/igt@gem_exec_sched...@reorder-wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-iclb1/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@gem_mmap_gtt@hang: - shard-snb: [PASS][9] -> [INCOMPLETE][10] ([fdo#105411]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-snb7/igt@gem_mmap_...@hang.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-snb7/igt@gem_mmap_...@hang.html * igt@gem_tiled_swapping@non-threaded: - shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540] / [fdo#108686]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-hsw2/igt@gem_tiled_swapp...@non-threaded.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-hsw2/igt@gem_tiled_swapp...@non-threaded.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-hsw2/igt@gem_userptr_bl...@sync-unmap-after-close.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-hsw2/igt@gem_userptr_bl...@sync-unmap-after-close.html * igt@kms_cursor_legacy@pipe-b-forked-bo: - shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([fdo#103540]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-hsw7/igt@kms_cursor_leg...@pipe-b-forked-bo.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-hsw7/igt@kms_cursor_leg...@pipe-b-forked-bo.html * igt@kms_flip@modeset-vs-vblank-race: - shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#111609]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-kbl4/igt@kms_f...@modeset-vs-vblank-race.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-kbl3/igt@kms_f...@modeset-vs-vblank-race.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-pri-indfb-multidraw.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-pri-indfb-multidraw.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-skl9/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7050/shard-iclb2/igt@kms_plane_low...@pipe-a-tiling-x.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14745/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +3 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI
[Intel-gfx] [CI 2/9] drm/i915/perf: introduce a versioning of the i915-perf uapi
From: Lionel Landwerlin
Reporting this version will help application figure out what level of
the support the running kernel provides.
v2: Add i915_perf_ioctl_version() (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_getparam.c | 4
drivers/gpu/drm/i915/i915_perf.c | 10 ++
drivers/gpu/drm/i915/i915_perf.h | 1 +
include/uapi/drm/i915_drm.h | 21 +
4 files changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c
b/drivers/gpu/drm/i915/i915_getparam.c
index f4b3cbb1adce..ad33fbe90a28 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -5,6 +5,7 @@
#include "gt/intel_engine_user.h"
#include "i915_drv.h"
+#include "i915_perf.h"
int i915_getparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
@@ -156,6 +157,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_MMAP_GTT_COHERENT:
value = INTEL_INFO(i915)->has_coherent_ggtt;
break;
+ case I915_PARAM_PERF_REVISION:
+ value = i915_perf_ioctl_version();
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c4a436dfb7db..0b51ab3ab523 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3665,3 +3665,13 @@ void i915_perf_fini(struct drm_i915_private *i915)
memset(&perf->ops, 0, sizeof(perf->ops));
perf->i915 = NULL;
}
+
+/**
+ * i915_perf_ioctl_version - Version of the i915-perf subsystem
+ *
+ * This version number is used by userspace to detect available features.
+ */
+int i915_perf_ioctl_version(void)
+{
+ return 1;
+}
diff --git a/drivers/gpu/drm/i915/i915_perf.h b/drivers/gpu/drm/i915/i915_perf.h
index ff412fb0dbbf..295e33e8eef7 100644
--- a/drivers/gpu/drm/i915/i915_perf.h
+++ b/drivers/gpu/drm/i915/i915_perf.h
@@ -20,6 +20,7 @@ void i915_perf_init(struct drm_i915_private *i915);
void i915_perf_fini(struct drm_i915_private *i915);
void i915_perf_register(struct drm_i915_private *i915);
void i915_perf_unregister(struct drm_i915_private *i915);
+int i915_perf_ioctl_version(void);
int i915_perf_open_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 30c542144016..c50c712b3771 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -611,6 +611,13 @@ typedef struct drm_i915_irq_wait {
* See I915_EXEC_FENCE_OUT and I915_EXEC_FENCE_SUBMIT.
*/
#define I915_PARAM_HAS_EXEC_SUBMIT_FENCE 53
+
+/*
+ * Revision of the i915-perf uAPI. The value returned helps determine what
+ * i915-perf features are available. See drm_i915_perf_property_id.
+ */
+#define I915_PARAM_PERF_REVISION 54
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
@@ -1844,23 +1851,31 @@ enum drm_i915_perf_property_id {
* Open the stream for a specific context handle (as used with
* execbuffer2). A stream opened for a specific context this way
* won't typically require root privileges.
+*
+* This property is available in perf revision 1.
*/
DRM_I915_PERF_PROP_CTX_HANDLE = 1,
/**
* A value of 1 requests the inclusion of raw OA unit reports as
* part of stream samples.
+*
+* This property is available in perf revision 1.
*/
DRM_I915_PERF_PROP_SAMPLE_OA,
/**
* The value specifies which set of OA unit metrics should be
* be configured, defining the contents of any OA unit reports.
+*
+* This property is available in perf revision 1.
*/
DRM_I915_PERF_PROP_OA_METRICS_SET,
/**
* The value specifies the size and layout of OA unit reports.
+*
+* This property is available in perf revision 1.
*/
DRM_I915_PERF_PROP_OA_FORMAT,
@@ -1870,6 +1885,8 @@ enum drm_i915_perf_property_id {
* from this exponent as follows:
*
* 80ns * 2^(period_exponent + 1)
+*
+* This property is available in perf revision 1.
*/
DRM_I915_PERF_PROP_OA_EXPONENT,
@@ -1901,6 +1918,8 @@ struct drm_i915_perf_open_param {
* to close and re-open a stream with the same configuration.
*
* It's undefined whether any pending data for the stream will be lost.
+ *
+ * This ioctl is available in perf revision 1.
*/
#define I915_PERF_IOCTL_ENABLE _IO('i', 0x0)
@@ -1908,6 +1927,8 @@ struct drm_i915_perf_open_param {
* Disable data capture for a stream.
*
* It is an error to try and read
[Intel-gfx] [CI 6/9] drm/i915/perf: execute OA configuration from command stream
From: Lionel Landwerlin
We haven't run into issues with programming the global OA/NOA
registers configuration from CPU so far, but HW engineers actually
recommend doing this from the command streamer. On TGL in particular
one of the clock domain in which some of that programming goes might
not be powered when we poke things from the CPU.
Since we have a command buffer prepared for the execbuffer side of
things, we can reuse that approach here too.
This also allows us to significantly reduce the amount of time we hold
the main lock.
v2: Drop the global lock as much as possible
v3: Take global lock to pin global
v4: Create i915 request in emit_oa_config() to avoid deadlocks (Lionel)
v5: Move locking to the stream (Lionel)
v6: Move active reconfiguration request into i915_perf_stream (Lionel)
v7: Pin VMA outside request creation (Chris)
Lock VMA before move to active (Chris)
v8: Fix double free on stream->initial_oa_config_bo (Lionel)
Don't allow interruption when waiting on active config request
(Lionel)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 199 ---
1 file changed, 156 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index caa4ab68cea5..c37fe275cf33 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1731,56 +1731,181 @@ static int alloc_noa_wait(struct i915_perf_stream
*stream)
return 0;
err_unpin:
- __i915_vma_unpin(vma);
+ i915_vma_unpin_and_release(&vma, 0);
err_unref:
i915_gem_object_put(bo);
return ret;
}
-static void config_oa_regs(struct intel_uncore *uncore,
- const struct i915_oa_reg *regs,
- u32 n_regs)
+static u32 *write_cs_mi_lri(u32 *cs,
+ const struct i915_oa_reg *reg_data,
+ u32 n_regs)
{
u32 i;
for (i = 0; i < n_regs; i++) {
- const struct i915_oa_reg *reg = regs + i;
+ if ((i % MI_LOAD_REGISTER_IMM_MAX_REGS) == 0) {
+ u32 n_lri = min_t(u32,
+ n_regs - i,
+ MI_LOAD_REGISTER_IMM_MAX_REGS);
+
+ *cs++ = MI_LOAD_REGISTER_IMM(n_lri);
+ }
+ *cs++ = i915_mmio_reg_offset(reg_data[i].addr);
+ *cs++ = reg_data[i].value;
+ }
+
+ return cs;
+}
+
+static int num_lri_dwords(int num_regs)
+{
+ int count = 0;
+
+ if (num_regs > 0) {
+ count += DIV_ROUND_UP(num_regs, MI_LOAD_REGISTER_IMM_MAX_REGS);
+ count += num_regs * 2;
+ }
+
+ return count;
+}
+
+static struct i915_oa_config_bo *
+alloc_oa_config_buffer(struct i915_perf_stream *stream,
+ struct i915_oa_config *oa_config)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_oa_config_bo *oa_bo;
+ size_t config_length = 0;
+ u32 *cs;
+ int err;
+
+ oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
+ if (!oa_bo)
+ return ERR_PTR(-ENOMEM);
+
+ config_length += num_lri_dwords(oa_config->mux_regs_len);
+ config_length += num_lri_dwords(oa_config->b_counter_regs_len);
+ config_length += num_lri_dwords(oa_config->flex_regs_len);
+ config_length++; /* MI_BATCH_BUFFER_END */
+ config_length = ALIGN(sizeof(u32) * config_length, I915_GTT_PAGE_SIZE);
+
+ obj = i915_gem_object_create_shmem(stream->perf->i915, config_length);
+ if (IS_ERR(obj)) {
+ err = PTR_ERR(obj);
+ goto err_free;
+ }
+
+ cs = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ if (IS_ERR(cs)) {
+ err = PTR_ERR(cs);
+ goto err_oa_bo;
+ }
- intel_uncore_write(uncore, reg->addr, reg->value);
+ cs = write_cs_mi_lri(cs,
+oa_config->mux_regs,
+oa_config->mux_regs_len);
+ cs = write_cs_mi_lri(cs,
+oa_config->b_counter_regs,
+oa_config->b_counter_regs_len);
+ cs = write_cs_mi_lri(cs,
+oa_config->flex_regs,
+oa_config->flex_regs_len);
+
+ *cs++ = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_flush_map(obj);
+ i915_gem_object_unpin_map(obj);
+
+ oa_bo->vma = i915_vma_instance(obj,
+ &stream->engine->gt->ggtt->vm,
+ NULL);
+ if (IS_ERR(oa_bo->vma)) {
+ err = PTR_ERR(oa_bo->vma);
+ goto err_oa_bo;
}
+
+ oa_bo->oa_config = i915_oa_config_get(oa_config);
+ llist_add(&oa_bo->node, &stream->oa_config_bos);
+
+ return oa_bo;
+
[Intel-gfx] [CI 5/9] drm/i915/perf: implement active wait for noa configurations
From: Lionel Landwerlin
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as default for now which should be over the required amount of
time (according to HW architects).
v2: Don't forget to save/restore registers used for the wait (Chris)
v3: Name used CS_GPR registers (Chris)
Fix compile issue due to rebase (Lionel)
v4: Fix save/restore helpers (Umesh)
v5: Move noa_wait from drm_i915_private to i915_perf_stream (Lionel)
v6: Add missing struct declarations in i915_perf.h
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson (v4)
Signed-off-by: Chris Wilson (v4)
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 +
drivers/gpu/drm/i915/i915_debugfs.c | 32 +++
drivers/gpu/drm/i915/i915_perf.c | 224 ++
drivers/gpu/drm/i915/i915_perf_types.h| 8 +
drivers/gpu/drm/i915/i915_reg.h | 4 +-
.../drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/i915_perf.c| 216 +
8 files changed, 492 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_perf.c
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
index 0987100c786b..8e63cffcabe0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
+++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
@@ -163,7 +163,8 @@
#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
#define MI_BATCH_GTT (2<<6) /* aliased with (1<<7) on gen4 */
#define MI_BATCH_BUFFER_START_GEN8 MI_INSTR(0x31, 1)
-#define MI_BATCH_RESOURCE_STREAMER (1<<10)
+#define MI_BATCH_RESOURCE_STREAMER REG_BIT(10)
+#define MI_BATCH_PREDICATE REG_BIT(15) /* HSW+ on RCS only*/
/*
* 3D instructions used by the kernel
@@ -224,6 +225,7 @@
#define PIPE_CONTROL_CS_STALL(1<<20)
#define PIPE_CONTROL_TLB_INVALIDATE (1<<18)
#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1<<16)
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
#define PIPE_CONTROL_QW_WRITE(1<<14)
#define PIPE_CONTROL_POST_SYNC_OP_MASK(3<<14)
#define PIPE_CONTROL_DEPTH_STALL (1<<13)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 802f516a3430..be4b263621c8 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -109,6 +109,11 @@ enum intel_gt_scratch_field {
/* 8 bytes */
INTEL_GT_SCRATCH_FIELD_COHERENTL3_WA = 256,
+ /* 6 * 8 bytes */
+ INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR = 2048,
+
+ /* 4 bytes */
+ INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1 = 2096,
};
#endif /* __INTEL_GT_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 277f31297f29..d463a28b7475 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3590,6 +3590,37 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
i915_wedged_get, i915_wedged_set,
"%llu\n");
+static int
+i915_perf_noa_delay_set(void *data, u64 val)
+{
+ struct drm_i915_private *i915 = data;
+ const u32 clk = RUNTIME_INFO(i915)->cs_timestamp_frequency_khz;
+
+ /*
+* This would lead to infinite waits as we're doing timestamp
+* difference on the CS with only 32bits.
+*/
+ if (val > mul_u32_u32(U32_MAX, clk))
+ return -EINVAL;
+
+ atomic64_set(&i915->perf.noa_programming_delay, val);
+ return 0;
+}
+
+static int
+i915_perf_noa_delay_get(void *data, u64 *val)
+{
+ struct drm_i915_private *i915 = data;
+
+ *val = atomic64_read(&i915->perf.noa_programming_delay);
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_perf_noa_delay_fops,
+ i915_perf_noa_delay_get,
+ i915_perf_noa_delay_set,
+ "%llu\n");
+
#define DROP_UNBOUND BIT(0)
#define DROP_BOUND BIT(1)
#define DROP_RETIREBIT(2)
@@ -4340,6 +4371,7 @@ static const struct i915_debugfs_files {
const char *name;
const struct file_operations *fops;
} i915_debugfs_files[] = {
+ {"i915_perf_noa_delay", &i915_perf_noa_delay_fops},
{"i915_wedged", &i915_wedged_fops},
{"i915_cache_sharing", &i915_cache_sharing_fops},
{"i915_gem_drop_caches", &i915_drop_caches_fops},
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 7d7baee7febe..caa4ab68cea5 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
++
[Intel-gfx] [CI 9/9] drm/i915/execlists: Prevent merging requests with conflicting flags
We set out-of-bound parameters inside the i915_requests.flags field,
such as disabling preemption or marking the end-of-context. We should
not coalesce consecutive requests if they have differing instructions
as we only inspect the last active request in a context. Thus if we
allow a later request to be merged into the same execution context, it
will mask any of the earlier flags.
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9666d51b7e97..7b43c1852776 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1184,6 +1184,9 @@ static bool can_merge_rq(const struct i915_request *prev,
if (i915_request_completed(next))
return true;
+ if (unlikely(prev->flags ^ next->flags) & I915_REQUEST_NOPREEMPT)
+ return false;
+
if (!can_merge_ctx(prev->hw_context, next->hw_context))
return false;
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 4/9] drm/i915: add support for perf configuration queries
From: Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs.
This might cause issues for applications wanting to list
configurations from a container where sysfs isn't available.
This change adds a way to query the number of configurations and their
content through the i915 query uAPI.
v2: Fix sparse warnings (Lionel)
Add support to query configuration using uuid (Lionel)
v3: Fix some inconsistency in uapi header (Lionel)
Fix unlocking when not locked issue (Lionel)
Add debug messages (Lionel)
v4: Fix missing unlock (Dan)
v5: Drop lock when copying config content to userspace (Chris)
v6: Drop lock when copying config list to userspace (Chris)
Fix deadlock when calling i915_perf_get_oa_config() under
perf.metrics_lock (Lionel)
Add i915_oa_config_get() (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 3 +-
drivers/gpu/drm/i915/i915_query.c | 295 ++
include/uapi/drm/i915_drm.h | 62 ++-
3 files changed, 357 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 5fa0df46fcc3..7d7baee7febe 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3473,8 +3473,7 @@ int i915_perf_remove_config_ioctl(struct drm_device *dev,
void *data,
GEM_BUG_ON(*arg != oa_config->id);
- sysfs_remove_group(perf->metrics_kobj,
- &oa_config->sysfs_metric);
+ sysfs_remove_group(perf->metrics_kobj, &oa_config->sysfs_metric);
idr_remove(&perf->metrics_idr, *arg);
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index abac5042da2b..6a68ecc7bb5f 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -7,6 +7,7 @@
#include
#include "i915_drv.h"
+#include "i915_perf.h"
#include "i915_query.h"
#include
@@ -140,10 +141,304 @@ query_engine_info(struct drm_i915_private *i915,
return len;
}
+static int can_copy_perf_config_registers_or_number(u32 user_n_regs,
+ u64 user_regs_ptr,
+ u32 kernel_n_regs)
+{
+ /*
+* We'll just put the number of registers, and won't copy the
+* register.
+*/
+ if (user_n_regs == 0)
+ return 0;
+
+ if (user_n_regs < kernel_n_regs)
+ return -EINVAL;
+
+ if (!access_ok(u64_to_user_ptr(user_regs_ptr),
+ 2 * sizeof(u32) * kernel_n_regs))
+ return -EFAULT;
+
+ return 0;
+}
+
+static int copy_perf_config_registers_or_number(const struct i915_oa_reg
*kernel_regs,
+ u32 kernel_n_regs,
+ u64 user_regs_ptr,
+ u32 *user_n_regs)
+{
+ u32 r;
+
+ if (*user_n_regs == 0) {
+ *user_n_regs = kernel_n_regs;
+ return 0;
+ }
+
+ *user_n_regs = kernel_n_regs;
+
+ for (r = 0; r < kernel_n_regs; r++) {
+ u32 __user *user_reg_ptr =
+ u64_to_user_ptr(user_regs_ptr + sizeof(u32) * r * 2);
+ u32 __user *user_val_ptr =
+ u64_to_user_ptr(user_regs_ptr + sizeof(u32) * r * 2 +
+ sizeof(u32));
+ int ret;
+
+ ret = __put_user(i915_mmio_reg_offset(kernel_regs[r].addr),
+user_reg_ptr);
+ if (ret)
+ return -EFAULT;
+
+ ret = __put_user(kernel_regs[r].value, user_val_ptr);
+ if (ret)
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+static int query_perf_config_data(struct drm_i915_private *i915,
+ struct drm_i915_query_item *query_item,
+ bool use_uuid)
+{
+ struct drm_i915_query_perf_config __user *user_query_config_ptr =
+ u64_to_user_ptr(query_item->data_ptr);
+ struct drm_i915_perf_oa_config __user *user_config_ptr =
+ u64_to_user_ptr(query_item->data_ptr +
+ sizeof(struct drm_i915_query_perf_config));
+ struct drm_i915_perf_oa_config user_config;
+ struct i915_perf *perf = &i915->perf;
+ struct i915_oa_config *oa_config;
+ char uuid[UUID_STRING_LEN + 1];
+ u64 config_id;
+ u32 flags, total_size;
+ int ret;
+
+ if (!perf->i915)
+ return -ENODEV;
+
+ total_size =
+ sizeof(struct drm_i915_query_perf_config) +
+ sizeof(struct drm_i915_perf_oa_config);
+
+ if (query_item->length == 0)
+ return total_size;
+
+
[Intel-gfx] [CI 1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm
As we now have a specific engine to use OA on, exchange the top-level
runtime-pm wakeref with the engine-pm. This still results in the same
top-level runtime-pm, but with more nuances to keep the engine and its
gt awake.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 8
drivers/gpu/drm/i915/i915_perf_types.h | 6 --
2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 77c3cef64548..c4a436dfb7db 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -196,7 +196,7 @@
#include
#include "gem/i915_gem_context.h"
-#include "gem/i915_gem_pm.h"
+#include "gt/intel_engine_pm.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_lrc_reg.h"
@@ -1353,7 +1353,7 @@ static void i915_oa_stream_destroy(struct
i915_perf_stream *stream)
free_oa_buffer(stream);
intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
- intel_runtime_pm_put(stream->uncore->rpm, stream->wakeref);
+ intel_engine_pm_put(stream->engine);
if (stream->ctx)
oa_put_render_ctx_id(stream);
@@ -2218,7 +2218,7 @@ static int i915_oa_stream_init(struct i915_perf_stream
*stream,
* In our case we are expecting that taking pm + FORCEWAKE
* references will effectively disable RC6.
*/
- stream->wakeref = intel_runtime_pm_get(stream->uncore->rpm);
+ intel_engine_pm_get(stream->engine);
intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
ret = alloc_oa_buffer(stream);
@@ -2252,7 +2252,7 @@ static int i915_oa_stream_init(struct i915_perf_stream
*stream,
put_oa_config(stream->oa_config);
intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
- intel_runtime_pm_put(stream->uncore->rpm, stream->wakeref);
+ intel_engine_pm_put(stream->engine);
err_config:
if (stream->ctx)
diff --git a/drivers/gpu/drm/i915/i915_perf_types.h
b/drivers/gpu/drm/i915/i915_perf_types.h
index a91ae2d1a543..eb8d1ebd5095 100644
--- a/drivers/gpu/drm/i915/i915_perf_types.h
+++ b/drivers/gpu/drm/i915/i915_perf_types.h
@@ -134,12 +134,6 @@ struct i915_perf_stream {
*/
struct intel_uncore *uncore;
- /**
-* @wakeref: As we keep the device awake while the perf stream is
-* active, we track our runtime pm reference for later release.
-*/
- intel_wakeref_t wakeref;
-
/**
* @engine: Engine associated with this performance stream.
*/
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 3/9] drm/i915/perf: allow for CS OA configs to be created lazily
From: Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915
driver will be able to request that a batch buffer containing the
programming for a particular OA config be created.
We'll execute these OA configuration buffers right before executing a
set of userspace commands so that a particular user batchbuffer be
executed with a given OA configuration.
This mechanism essentially allows the userspace driver to go through
several OA configuration without having to open/close the i915/perf
stream.
v2: No need for locking on object OA config object creation (Chris)
Flush cpu mapping of OA config (Chris)
v3: Properly deal with the perf_metric lock (Chris/Lionel)
v4: Fix oa config unref/put when not found (Lionel)
v5: Allocate BOs for configurations on the stream instead of globally
(Lionel)
v6: Fix 64bit division (Chris)
v7: Store allocated config BOs into the stream (Lionel)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson (v4)
Signed-off-by: Chris Wilson (v4)
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/i915_perf.c | 107 +++
drivers/gpu/drm/i915/i915_perf.h | 24 +
drivers/gpu/drm/i915/i915_perf_types.h | 23 ++--
4 files changed, 102 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
index b0227ab2fe1b..0987100c786b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
+++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
@@ -138,6 +138,7 @@
/* Gen11+. addr = base + (ctx_restore ? offset & GENMASK(12,2) : offset) */
#define MI_LRI_CS_MMIO (1<<19)
#define MI_LRI_FORCE_POSTED (1<<12)
+#define MI_LOAD_REGISTER_IMM_MAX_REGS (126)
#define MI_STORE_REGISTER_MEMMI_INSTR(0x24, 1)
#define MI_STORE_REGISTER_MEM_GEN8 MI_INSTR(0x24, 2)
#define MI_SRM_LRM_GLOBAL_GTT(1<<22)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0b51ab3ab523..5fa0df46fcc3 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -369,52 +369,52 @@ struct perf_open_properties {
struct intel_engine_cs *engine;
};
+struct i915_oa_config_bo {
+ struct llist_node node;
+
+ struct i915_oa_config *oa_config;
+ struct i915_vma *vma;
+};
+
static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
-static void free_oa_config(struct i915_oa_config *oa_config)
+void i915_oa_config_release(struct kref *ref)
{
+ struct i915_oa_config *oa_config =
+ container_of(ref, typeof(*oa_config), ref);
+
if (!PTR_ERR(oa_config->flex_regs))
kfree(oa_config->flex_regs);
if (!PTR_ERR(oa_config->b_counter_regs))
kfree(oa_config->b_counter_regs);
if (!PTR_ERR(oa_config->mux_regs))
kfree(oa_config->mux_regs);
- kfree(oa_config);
-}
-
-static void put_oa_config(struct i915_oa_config *oa_config)
-{
- if (!atomic_dec_and_test(&oa_config->ref_count))
- return;
- free_oa_config(oa_config);
+ kfree_rcu(oa_config, rcu);
}
-static int get_oa_config(struct i915_perf *perf,
-int metrics_set,
-struct i915_oa_config **out_config)
+struct i915_oa_config *
+i915_perf_get_oa_config(struct i915_perf *perf, int metrics_set)
{
- int ret;
-
- if (metrics_set == 1) {
- *out_config = &perf->test_config;
- atomic_inc(&perf->test_config.ref_count);
- return 0;
- }
-
- ret = mutex_lock_interruptible(&perf->metrics_lock);
- if (ret)
- return ret;
+ struct i915_oa_config *oa_config;
- *out_config = idr_find(&perf->metrics_idr, metrics_set);
- if (!*out_config)
- ret = -EINVAL;
+ rcu_read_lock();
+ if (metrics_set == 1)
+ oa_config = &perf->test_config;
else
- atomic_inc(&(*out_config)->ref_count);
+ oa_config = idr_find(&perf->metrics_idr, metrics_set);
+ if (oa_config)
+ oa_config = i915_oa_config_get(oa_config);
+ rcu_read_unlock();
- mutex_unlock(&perf->metrics_lock);
+ return oa_config;
+}
- return ret;
+static void free_oa_config_bo(struct i915_oa_config_bo *oa_bo)
+{
+ i915_oa_config_put(oa_bo->oa_config);
+ i915_vma_put(oa_bo->vma);
+ kfree(oa_bo);
}
static u32 gen8_oa_hw_tail_read(struct i915_perf_stream *stream)
@@ -1337,6 +1337,16 @@ free_oa_buffer(struct i915_perf_stream *stream)
stream->oa_buffer.vaddr = NULL;
}
+static void
+free_oa_configs(struct i915_perf_stream *stream)
+{
+ struct i915_oa_config_bo *oa_bo, *tmp;
+
+ i915_oa_config_put(stream->oa_config);
+ llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.f
[Intel-gfx] [CI 7/9] drm/i915/perf: Allow dynamic reconfiguration of the OA stream
Introduce a new perf_ioctl command to change the OA configuration of the
active stream. This allows the OA stream to be reconfigured between
batch buffers, giving greater flexibility in sampling. We inject a
request into the OA context to reconfigure the stream asynchronously on
the GPU in between and ordered with execbuffer calls.
Original patch for dynamic reconfiguration by Lionel Landwerlin.
Signed-off-by: Chris Wilson
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
include/uapi/drm/i915_drm.h | 10 ++
2 files changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c37fe275cf33..001fb249aaec 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2860,6 +2860,28 @@ static void i915_perf_disable_locked(struct
i915_perf_stream *stream)
stream->ops->disable(stream);
}
+static int i915_perf_config_locked(struct i915_perf_stream *stream,
+ unsigned long metrics_set)
+{
+ struct i915_oa_config *config;
+ int err = 0;
+
+ config = i915_perf_get_oa_config(stream->perf, metrics_set);
+ if (!config)
+ return -EINVAL;
+
+ if (config != stream->oa_config) {
+ if (stream->pinned_ctx)
+ err = emit_oa_config(stream, stream->pinned_ctx);
+ if (err == 0)
+ config = xchg(&stream->oa_config, config);
+ }
+
+ i915_oa_config_put(config);
+
+ return err;
+}
+
/**
* i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
* @stream: An i915 perf stream
@@ -2883,6 +2905,8 @@ static long i915_perf_ioctl_locked(struct
i915_perf_stream *stream,
case I915_PERF_IOCTL_DISABLE:
i915_perf_disable_locked(stream);
return 0;
+ case I915_PERF_IOCTL_CONFIG:
+ return i915_perf_config_locked(stream, arg);
}
return -EINVAL;
@@ -4020,7 +4044,15 @@ void i915_perf_fini(struct drm_i915_private *i915)
*/
int i915_perf_ioctl_version(void)
{
- return 1;
+ /*
+* 1: Initial version
+* I915_PERF_IOCTL_ENABLE
+* I915_PERF_IOCTL_DISABLE
+*
+* 2: Added runtime modification of OA config.
+* I915_PERF_IOCTL_CONFIG
+*/
+ return 2;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 0c7b2815fbf1..5e66f7c60261 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1932,6 +1932,16 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_DISABLE_IO('i', 0x1)
+/**
+ * Change metrics_set captured by a stream.
+ *
+ * Will not take effect until the stream is restart, or upon the next
+ * execbuf when attached to a specific context.
+ *
+ * This ioctl is available in perf revision 2.
+ */
+#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
+
/**
* Common to all i915 perf records
*/
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 8/9] drm/i915/perf: allow holding preemption on filtered ctx
From: Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers). In Vulkan, queries are always limited in scope to a command
buffer. In OpenGL, the lack of command buffer concept meant that
queries' duration could span multiple command buffers.
With that restriction gone in Vulkan, we would like to simplify
measuring performance just by measuring the deltas between the counter
snapshots written by 2 MI_RECORD_PERF_COUNT commands, rather than the
more complex scheme we currently have in the GL driver, using 2
MI_RECORD_PERF_COUNT commands and doing some post processing on the
stream of OA reports, coming from the global OA buffer, to remove any
unrelated deltas in between the 2 MI_RECORD_PERF_COUNT.
Disabling preemption only apply to a single context with which want to
query performance counters for and is considered a privileged
operation, by default protected by CAP_SYS_ADMIN. It is possible to
enable it for a normal user by disabling the paranoid stream setting.
v2: Store preemption setting in intel_context (Chris)
v3: Use priorities to avoid preemption rather than the HW mechanism
v4: Just modify the port priority reporting function
v5: Add nopreempt flag on gem context and always flag requests
appropriately, regarless of OA reconfiguration.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.h | 18 ++
.../gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 ++
drivers/gpu/drm/i915/i915_perf.c | 34 +--
drivers/gpu/drm/i915/i915_perf_types.h| 8 +
include/uapi/drm/i915_drm.h | 11 ++
6 files changed, 72 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h
b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index 9234586830d1..cfe80590f0ed 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -114,6 +114,24 @@ i915_gem_context_clear_user_engines(struct
i915_gem_context *ctx)
clear_bit(CONTEXT_USER_ENGINES, &ctx->flags);
}
+static inline bool
+i915_gem_context_nopreempt(const struct i915_gem_context *ctx)
+{
+ return test_bit(CONTEXT_NOPREEMPT, &ctx->flags);
+}
+
+static inline void
+i915_gem_context_set_nopreempt(struct i915_gem_context *ctx)
+{
+ set_bit(CONTEXT_NOPREEMPT, &ctx->flags);
+}
+
+static inline void
+i915_gem_context_clear_nopreempt(struct i915_gem_context *ctx)
+{
+ clear_bit(CONTEXT_NOPREEMPT, &ctx->flags);
+}
+
static inline bool i915_gem_context_is_kernel(struct i915_gem_context *ctx)
{
return !ctx->file_priv;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index ab8e1367dfc8..fe97b8ba4fda 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -146,6 +146,7 @@ struct i915_gem_context {
#define CONTEXT_CLOSED 1
#define CONTEXT_FORCE_SINGLE_SUBMISSION2
#define CONTEXT_USER_ENGINES 3
+#define CONTEXT_NOPREEMPT 4
struct mutex mutex;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 98816c35ffc3..e96901888323 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2077,6 +2077,9 @@ static int eb_submit(struct i915_execbuffer *eb)
if (err)
return err;
+ if (i915_gem_context_nopreempt(eb->gem_context))
+ eb->request->flags |= I915_REQUEST_NOPREEMPT;
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 001fb249aaec..980cec647d2d 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -344,6 +344,8 @@ static const struct i915_oa_format
gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = {
* struct perf_open_properties - for validated properties given to open a
stream
* @sample_flags: `DRM_I915_PERF_PROP_SAMPLE_*` properties are tracked as flags
* @single_context: Whether a single or all gpu contexts should be monitored
+ * @hold_preemption: Whether the preemption is disabled for the filtered
+ * context
* @ctx_handle: A gem ctx handle for use with @single_context
* @metrics_set: An ID for an OA unit metric set advertised via sysfs
* @oa_format: An OA unit HW report format
@@ -359,6 +361,7 @@ struct perf_open_properties {
u32 sample_flags;
u64 single_context:1;
+ u64 hold_preemption:1;
u64 ctx_handle;
/* OA sampling state */
@@ -2512,6 +2515,8 @@ static int i915_oa_stream_ini
Re: [Intel-gfx] [PATCH 7/9] drm/i915/perf: Allow dynamic reconfiguration of the OA stream
Quoting Lionel Landwerlin (2019-10-10 17:07:11) > Yeah, that's a fine interface actually. One last thought for the interface, should we return the previous config-id? That limits the config-id space to long (min s32) so that we can report the negative error code (or exclude the top 4095 values). -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/display: Handle fused off display correctly
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Handle fused off display
correctly
URL : https://patchwork.freedesktop.org/series/67872/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7058 -> Patchwork_14757
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14757 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14757, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14757:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_hangcheck:
- fi-hsw-4770r: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
* igt@runner@aborted:
- fi-bxt-dsi: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-bxt-dsi/igt@run...@aborted.html
- fi-apl-guc: NOTRUN -> [FAIL][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-apl-guc/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_14757 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic-copy:
- fi-glk-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#103359] /
[k.org#198133])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-glk-dsi/igt@gem_mmap_...@basic-copy.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-glk-dsi/igt@gem_mmap_...@basic-copy.html
* igt@prime_vgem@basic-read:
- fi-icl-u3: [PASS][7] -> [DMESG-WARN][8] ([fdo#107724]) +1
similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@prime_v...@basic-read.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-icl-u3/igt@prime_v...@basic-read.html
Possible fixes
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- {fi-icl-dsi}: [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1
similar issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (54 -> 46)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7058 -> Patchwork_14757
CI-20190529: 20190529
CI_DRM_7058: ec85c0501ada08c2aea8adb7da74931a6d0ae39b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14757: f63b7c8bdcaf056403ca7455b1ed124e3ab390ac @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f63b7c8bdcaf drm/i915/display: Check if FBC and DMC are fused off
3424a77abcd0 drm/i915/display: DFSM CDCLK LIMIT is only available in BXT
ce9873d331e3 drm/i915/display: Handle fused off HDCP
da2924335660 drm/i915/display: Handle fused off display correctly
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14757/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm
URL : https://patchwork.freedesktop.org/series/67874/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4aa72c4ef98d drm/i915/perf: Replace global wakeref tracking with engine-pm
de5e384f91f5 drm/i915/perf: introduce a versioning of the i915-perf uapi
ac5a1dbba730 drm/i915/perf: allow for CS OA configs to be created lazily
15679a893373 drm/i915: add support for perf configuration queries
f4fc96f15f7a drm/i915/perf: implement active wait for noa configurations
-:46: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#46: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:228:
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
^
-:168: ERROR:CODE_INDENT: code indent should use tabs where possible
#168: FILE: drivers/gpu/drm/i915/i915_perf.c:1555:
+^I^I^I^I^I ^Ioffset) + 4 * d;$
-:168: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#168: FILE: drivers/gpu/drm/i915/i915_perf.c:1555:
+^I^I^I^I^I ^Ioffset) + 4 * d;$
-:181: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#181: FILE: drivers/gpu/drm/i915/i915_perf.c:1568:
+ DIV64_U64_ROUND_UP(
-:215: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#215: FILE: drivers/gpu/drm/i915/i915_perf.c:1602:
+ batch = cs = i915_gem_object_pin_map(bo, I915_MAP_WB);
-:223: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#223: FILE: drivers/gpu/drm/i915/i915_perf.c:1610:
+ cs = save_restore_register(
-:226: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#226: FILE: drivers/gpu/drm/i915/i915_perf.c:1613:
+ cs = save_restore_register(
-:328: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#328: FILE: drivers/gpu/drm/i915/i915_perf.c:1715:
+ cs = save_restore_register(
-:331: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#331: FILE: drivers/gpu/drm/i915/i915_perf.c:1718:
+ cs = save_restore_register(
-:448: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#448:
new file mode 100644
-:453: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#453: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:1:
+/*
-:454: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use
line 1 instead
#454: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:2:
+ * SPDX-License-Identifier: MIT
total: 1 errors, 4 warnings, 7 checks, 590 lines checked
2245bacfcea6 drm/i915/perf: execute OA configuration from command stream
def0ed974f64 drm/i915/perf: Allow dynamic reconfiguration of the OA stream
c04dded670da drm/i915/perf: allow holding preemption on filtered ctx
e7a841a6b27d drm/i915/execlists: Prevent merging requests with conflicting flags
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 2a98f4e65bba ("drm/i915: add
infrastructure to hold off preemption on a request")'
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
total: 1 errors, 1 warnings, 0 checks, 9 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/perf: Allow dynamic reconfiguration of the OA stream
Introduce a new perf_ioctl command to change the OA configuration of the
active stream. This allows the OA stream to be reconfigured between
batch buffers, giving greater flexibility in sampling. We inject a
request into the OA context to reconfigure the stream asynchronously on
the GPU in between and ordered with execbuffer calls.
Original patch for dynamic reconfiguration by Lionel Landwerlin.
Signed-off-by: Chris Wilson
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 46 +++-
include/uapi/drm/i915_drm.h | 10 +++
2 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c37fe275cf33..0459e66eba36 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2860,6 +2860,40 @@ static void i915_perf_disable_locked(struct
i915_perf_stream *stream)
stream->ops->disable(stream);
}
+static long i915_perf_config_locked(struct i915_perf_stream *stream,
+ unsigned long metrics_set)
+{
+ struct i915_oa_config *config;
+ int err = 0;
+
+ config = i915_perf_get_oa_config(stream->perf, metrics_set);
+ if (!config)
+ return -EINVAL;
+
+ if (config != stream->oa_config) {
+ struct intel_context *ce;
+
+ /*
+* If OA is bound to a specific context, emit the
+* reconfiguration inline from that context. The update
+* will then be ordered with respect to submission on that
+* context.
+*
+* When set globally, we use a low priority kernel context,
+* so it will effectively take effect when idle.
+*/
+ ce = stream->pinned_ctx ?: stream->engine->kernel_context;
+
+ err = emit_oa_config(stream, ce);
+ if (err == 0)
+ config = xchg(&stream->oa_config, config);
+ }
+
+ i915_oa_config_put(config);
+
+ return err;
+}
+
/**
* i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
* @stream: An i915 perf stream
@@ -2883,6 +2917,8 @@ static long i915_perf_ioctl_locked(struct
i915_perf_stream *stream,
case I915_PERF_IOCTL_DISABLE:
i915_perf_disable_locked(stream);
return 0;
+ case I915_PERF_IOCTL_CONFIG:
+ return i915_perf_config_locked(stream, arg);
}
return -EINVAL;
@@ -4020,7 +4056,15 @@ void i915_perf_fini(struct drm_i915_private *i915)
*/
int i915_perf_ioctl_version(void)
{
- return 1;
+ /*
+* 1: Initial version
+* I915_PERF_IOCTL_ENABLE
+* I915_PERF_IOCTL_DISABLE
+*
+* 2: Added runtime modification of OA config.
+* I915_PERF_IOCTL_CONFIG
+*/
+ return 2;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 0c7b2815fbf1..5e66f7c60261 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1932,6 +1932,16 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_DISABLE_IO('i', 0x1)
+/**
+ * Change metrics_set captured by a stream.
+ *
+ * Will not take effect until the stream is restart, or upon the next
+ * execbuf when attached to a specific context.
+ *
+ * This ioctl is available in perf revision 2.
+ */
+#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
+
/**
* Common to all i915 perf records
*/
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/perf: implement active wait for noa configurations
From: Lionel Landwerlin
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as default for now which should be over the required amount of
time (according to HW architects).
v2: Don't forget to save/restore registers used for the wait (Chris)
v3: Name used CS_GPR registers (Chris)
Fix compile issue due to rebase (Lionel)
v4: Fix save/restore helpers (Umesh)
v5: Move noa_wait from drm_i915_private to i915_perf_stream (Lionel)
v6: Add missing struct declarations in i915_perf.h
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson (v4)
Signed-off-by: Chris Wilson (v4)
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 +
drivers/gpu/drm/i915/i915_debugfs.c | 32 +++
drivers/gpu/drm/i915/i915_perf.c | 224 ++
drivers/gpu/drm/i915/i915_perf_types.h| 8 +
drivers/gpu/drm/i915/i915_reg.h | 4 +-
.../drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/i915_perf.c| 216 +
8 files changed, 492 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_perf.c
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
index 0987100c786b..8e63cffcabe0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
+++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
@@ -163,7 +163,8 @@
#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
#define MI_BATCH_GTT (2<<6) /* aliased with (1<<7) on gen4 */
#define MI_BATCH_BUFFER_START_GEN8 MI_INSTR(0x31, 1)
-#define MI_BATCH_RESOURCE_STREAMER (1<<10)
+#define MI_BATCH_RESOURCE_STREAMER REG_BIT(10)
+#define MI_BATCH_PREDICATE REG_BIT(15) /* HSW+ on RCS only*/
/*
* 3D instructions used by the kernel
@@ -224,6 +225,7 @@
#define PIPE_CONTROL_CS_STALL(1<<20)
#define PIPE_CONTROL_TLB_INVALIDATE (1<<18)
#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1<<16)
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
#define PIPE_CONTROL_QW_WRITE(1<<14)
#define PIPE_CONTROL_POST_SYNC_OP_MASK(3<<14)
#define PIPE_CONTROL_DEPTH_STALL (1<<13)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 802f516a3430..be4b263621c8 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -109,6 +109,11 @@ enum intel_gt_scratch_field {
/* 8 bytes */
INTEL_GT_SCRATCH_FIELD_COHERENTL3_WA = 256,
+ /* 6 * 8 bytes */
+ INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR = 2048,
+
+ /* 4 bytes */
+ INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1 = 2096,
};
#endif /* __INTEL_GT_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 277f31297f29..d463a28b7475 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3590,6 +3590,37 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
i915_wedged_get, i915_wedged_set,
"%llu\n");
+static int
+i915_perf_noa_delay_set(void *data, u64 val)
+{
+ struct drm_i915_private *i915 = data;
+ const u32 clk = RUNTIME_INFO(i915)->cs_timestamp_frequency_khz;
+
+ /*
+* This would lead to infinite waits as we're doing timestamp
+* difference on the CS with only 32bits.
+*/
+ if (val > mul_u32_u32(U32_MAX, clk))
+ return -EINVAL;
+
+ atomic64_set(&i915->perf.noa_programming_delay, val);
+ return 0;
+}
+
+static int
+i915_perf_noa_delay_get(void *data, u64 *val)
+{
+ struct drm_i915_private *i915 = data;
+
+ *val = atomic64_read(&i915->perf.noa_programming_delay);
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_perf_noa_delay_fops,
+ i915_perf_noa_delay_get,
+ i915_perf_noa_delay_set,
+ "%llu\n");
+
#define DROP_UNBOUND BIT(0)
#define DROP_BOUND BIT(1)
#define DROP_RETIREBIT(2)
@@ -4340,6 +4371,7 @@ static const struct i915_debugfs_files {
const char *name;
const struct file_operations *fops;
} i915_debugfs_files[] = {
+ {"i915_perf_noa_delay", &i915_perf_noa_delay_fops},
{"i915_wedged", &i915_wedged_fops},
{"i915_cache_sharing", &i915_cache_sharing_fops},
{"i915_gem_drop_caches", &i915_drop_caches_fops},
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 7d7baee7febe..abb7a70e17ec 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
++
Re: [Intel-gfx] [PATCH] drm/i915: Don't disable interrupts independently of the lock
Quoting Sebastian Andrzej Siewior (2019-10-10 19:26:10) > On 2019-10-10 19:11:27 [+0100], Chris Wilson wrote: > > > --- a/drivers/gpu/drm/i915/i915_request.c > > > +++ b/drivers/gpu/drm/i915/i915_request.c > > > @@ -251,15 +251,13 @@ static bool i915_request_retire(struct i > > > active->retire(active, rq); > > > } > > > > > > - local_irq_disable(); > > > - > > > /* > > > * We only loosely track inflight requests across preemption, > > > * and so we may find ourselves attempting to retire a _completed_ > > > * request that we have removed from the HW and put back on a run > > > * queue. > > > */ > > > - spin_lock(&rq->engine->active.lock); > > > + spin_lock_irq(&rq->engine->active.lock); > > > list_del(&rq->sched.link); > > > spin_unlock(&rq->engine->active.lock); > > > > > > @@ -278,9 +276,7 @@ static bool i915_request_retire(struct i > > > __notify_execute_cb(rq); > > > } > > > GEM_BUG_ON(!list_empty(&rq->execute_cb)); > > > - spin_unlock(&rq->lock); > > > - > > > - local_irq_enable(); > > > + spin_unlock_irq(&rq->lock); > > > > Nothing screams about the imbalance? irq off from one lock to the other? > > There is no imbalance, is there? Interrupts are disabled as part of > acquiring the first lock and enabled again as part of releasing the > second lock. > It may not look beautiful. Sure, it's at the same scope, I just expect at some point lockdep to complain :) > I'm just not sure if this > > | spin_lock_irq(&rq->engine->active.lock); > | list_del(&rq->sched.link); > | spin_unlock_irq(&rq->engine->active.lock); > | > | spin_lock_irq(&rq->lock); > | i915_request_mark_complete(rq); > … > | spin_unlock_irq(&rq->lock); > > has been avoided because an interrupt here could change something or if > this is just an optimisation. Just avoiding the back-to-back enable/disable. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915/display: DFSM CDCLK LIMIT is only available in BXT
I messed up on this patch, please ignore this one.
Will send the fixed version soon.
On Thu, 2019-10-10 at 12:32 -0700, José Roberto de Souza wrote:
> On GLK those registers are reserved and on another gens it have
> another meaning, so renaming it to BXT only.
>
> BSpec: 7548
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 12 +---
> drivers/gpu/drm/i915/i915_reg.h| 10 +-
> 2 files changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 43564295b864..a1787d165467 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2384,8 +2384,8 @@ void intel_update_max_cdclk(struct
> drm_i915_private *dev_priv)
> dev_priv->max_cdclk_freq = 652800;
> } else if (IS_CANNONLAKE(dev_priv)) {
> dev_priv->max_cdclk_freq = 528000;
> - } else if (IS_GEN9_BC(dev_priv)) {
> - u32 limit = I915_READ(SKL_DFSM) &
> SKL_DFSM_CDCLK_LIMIT_MASK;
> + } else if (IS_BROXTON(dev_priv)) {
> + u32 limit = I915_READ(SKL_DFSM) &
> BXT_DFSM_CDCLK_LIMIT_MASK;
> int max_cdclk, vco;
>
> vco = dev_priv->skl_preferred_vco_freq;
> @@ -2396,11 +2396,11 @@ void intel_update_max_cdclk(struct
> drm_i915_private *dev_priv)
>* first guess. skl_calc_cdclk() will correct it
>* if the preferred vco is 8100 instead.
>*/
> - if (limit == SKL_DFSM_CDCLK_LIMIT_675)
> + if (limit == BXT_DFSM_CDCLK_LIMIT_675)
> max_cdclk = 617143;
> - else if (limit == SKL_DFSM_CDCLK_LIMIT_540)
> + else if (limit == BXT_DFSM_CDCLK_LIMIT_540)
> max_cdclk = 54;
> - else if (limit == SKL_DFSM_CDCLK_LIMIT_450)
> + else if (limit == BXT_DFSM_CDCLK_LIMIT_450)
> max_cdclk = 432000;
> else
> max_cdclk = 308571;
> @@ -2408,8 +2408,6 @@ void intel_update_max_cdclk(struct
> drm_i915_private *dev_priv)
> dev_priv->max_cdclk_freq = skl_calc_cdclk(max_cdclk,
> vco);
> } else if (IS_GEMINILAKE(dev_priv)) {
> dev_priv->max_cdclk_freq = 316800;
> - } else if (IS_BROXTON(dev_priv)) {
> - dev_priv->max_cdclk_freq = 624000;
> } else if (IS_BROADWELL(dev_priv)) {
> /*
>* FIXME with extra cooling we can allow
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index b383511b6231..39c65f051468 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7644,11 +7644,11 @@ enum {
>
> #define SKL_DFSM _MMIO(0x51000)
> #define SKL_DFSM_DISPLAY_HDCP_DISABLE(1 << 25)
> -#define SKL_DFSM_CDCLK_LIMIT_MASK(3 << 23)
> -#define SKL_DFSM_CDCLK_LIMIT_675 (0 << 23)
> -#define SKL_DFSM_CDCLK_LIMIT_540 (1 << 23)
> -#define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23)
> -#define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
> +#define BXT_DFSM_CDCLK_LIMIT_MASK(3 << 23)
> +#define BXT_DFSM_CDCLK_LIMIT_675 (0 << 23)
> +#define BXT_DFSM_CDCLK_LIMIT_540 (1 << 23)
> +#define BXT_DFSM_CDCLK_LIMIT_450 (2 << 23)
> +#define BXT_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
> #define SKL_DFSM_PIPE_A_DISABLE (1 << 30)
> #define SKL_DFSM_PIPE_B_DISABLE (1 << 21)
> #define SKL_DFSM_PIPE_C_DISABLE (1 << 28)
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm (rev3)
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm (rev3)
URL : https://patchwork.freedesktop.org/series/67874/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e3e8e6f3790d drm/i915/perf: Replace global wakeref tracking with engine-pm
44ce06aa2ac1 drm/i915/perf: introduce a versioning of the i915-perf uapi
bb73a1117979 drm/i915/perf: allow for CS OA configs to be created lazily
5dac73e6848a drm/i915: add support for perf configuration queries
93a0ad5870f5 drm/i915/perf: implement active wait for noa configurations
-:46: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#46: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:228:
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
^
-:181: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#181: FILE: drivers/gpu/drm/i915/i915_perf.c:1568:
+ DIV64_U64_ROUND_UP(
-:215: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#215: FILE: drivers/gpu/drm/i915/i915_perf.c:1602:
+ batch = cs = i915_gem_object_pin_map(bo, I915_MAP_WB);
-:223: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#223: FILE: drivers/gpu/drm/i915/i915_perf.c:1610:
+ cs = save_restore_register(
-:226: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#226: FILE: drivers/gpu/drm/i915/i915_perf.c:1613:
+ cs = save_restore_register(
-:328: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#328: FILE: drivers/gpu/drm/i915/i915_perf.c:1715:
+ cs = save_restore_register(
-:331: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#331: FILE: drivers/gpu/drm/i915/i915_perf.c:1718:
+ cs = save_restore_register(
-:448: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#448:
new file mode 100644
-:453: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#453: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:1:
+/*
-:454: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use
line 1 instead
#454: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:2:
+ * SPDX-License-Identifier: MIT
total: 0 errors, 3 warnings, 7 checks, 590 lines checked
1296e9cb95c6 drm/i915/perf: execute OA configuration from command stream
db4b462f364b drm/i915/perf: Allow dynamic reconfiguration of the OA stream
1b2d6533f931 drm/i915/perf: allow holding preemption on filtered ctx
14b613a9550b drm/i915/execlists: Prevent merging requests with conflicting flags
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 2a98f4e65bba ("drm/i915: add
infrastructure to hold off preemption on a request")'
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
total: 1 errors, 1 warnings, 0 checks, 9 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/dp: Remove the unused drm_device to get rid of build warning
We no longer use the connection mutex and hence no need to
define drm_device *dev, it causes a unused variable build warning
Fixes: 83fa9842afe7 ("drm/dp-mst: Drop connection_mutex check")
Cc: Sean Paul
Cc: Lyude Paul
Cc: Daniel Vetter
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 9364e4f42975..95e63309 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4184,8 +4184,6 @@ EXPORT_SYMBOL(drm_dp_mst_topology_state_funcs);
struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct
drm_atomic_state *state,
struct
drm_dp_mst_topology_mgr *mgr)
{
- struct drm_device *dev = mgr->dev;
-
return to_dp_mst_topology_state(drm_atomic_get_private_obj_state(state,
&mgr->base));
}
EXPORT_SYMBOL(drm_atomic_get_mst_topology_state);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm
URL : https://patchwork.freedesktop.org/series/67874/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7058 -> Patchwork_14758
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/index.html
New tests
-
New tests have been introduced between CI_DRM_7058 and Patchwork_14758:
### New IGT tests (1) ###
* igt@i915_selftest@live_perf:
- Statuses : 44 pass(s)
- Exec time: [0.40, 2.67] s
Known issues
Here are the changes found in Patchwork_14758 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_render_linear_blits@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +2
similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
Possible fixes
* igt@gem_exec_suspend@basic:
- {fi-icl-guc}: [FAIL][3] ([fdo#111699]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-guc/igt@gem_exec_susp...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/fi-icl-guc/igt@gem_exec_susp...@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- {fi-icl-dsi}: [DMESG-WARN][5] ([fdo#106107]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
* igt@i915_selftest@live_coherency:
- {fi-kbl-soraka}:[INCOMPLETE][9] -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109644]: https://bugs.freedesktop.org/show_bug.cgi?id=109644
[fdo#110464]: https://bugs.freedesktop.org/show_bug.cgi?id=110464
[fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
[fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
[fdo#111867]: https://bugs.freedesktop.org/show_bug.cgi?id=111867
Participating hosts (54 -> 47)
--
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7058 -> Patchwork_14758
CI-20190529: 20190529
CI_DRM_7058: ec85c0501ada08c2aea8adb7da74931a6d0ae39b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14758: e7a841a6b27d0350b1e96bbc0f210719c047cc1d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e7a841a6b27d drm/i915/execlists: Prevent merging requests with conflicting flags
c04dded670da drm/i915/perf: allow holding preemption on filtered ctx
def0ed974f64 drm/i915/perf: Allow dynamic reconfiguration of the OA stream
2245bacfcea6 drm/i915/perf: execute OA configuration from command stream
f4fc96f15f7a drm/i915/perf: implement active wait for noa configurations
15679a893373 drm/i915: add support for perf configuration queries
ac5a1dbba730 drm/i915/perf: allow for CS OA configs to be created lazily
de5e384f91f5 drm/i915/perf: introduce a versioning of the i915-perf uapi
4aa72c4ef98d drm/i915/perf: Replace global wakeref tracking with engine-pm
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14758/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/9] drm/i915/perf: Allow dynamic reconfiguration of the OA stream
On 10/10/2019 22:50, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-10-10 17:07:11) Yeah, that's a fine interface actually. One last thought for the interface, should we return the previous config-id? That limits the config-id space to long (min s32) so that we can report the negative error code (or exclude the top 4095 values). -Chris No real use for it at the moment. I leave this up to your uAPI designer experience :) -Lionel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm (rev3)
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm (rev3)
URL : https://patchwork.freedesktop.org/series/67874/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7058 -> Patchwork_14759
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/index.html
New tests
-
New tests have been introduced between CI_DRM_7058 and Patchwork_14759:
### New IGT tests (1) ###
* igt@i915_selftest@live_perf:
- Statuses : 44 pass(s)
- Exec time: [0.39, 1.38] s
Known issues
Here are the changes found in Patchwork_14759 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_flink_basic@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_flink_ba...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-icl-u3/igt@gem_flink_ba...@basic.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#109483])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-kbl-7500u/igt@kms_chamel...@hdmi-edid-read.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-kbl-7500u/igt@kms_chamel...@hdmi-edid-read.html
Possible fixes
* igt@gem_exec_suspend@basic:
- {fi-icl-guc}: [FAIL][5] ([fdo#111699]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-guc/igt@gem_exec_susp...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-icl-guc/igt@gem_exec_susp...@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- {fi-icl-dsi}: [DMESG-WARN][7] ([fdo#106107]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
Warnings
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][11] ([fdo#111407]) -> [FAIL][12] ([fdo#111045]
/ [fdo#111096])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14759/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
[fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
Participating hosts (54 -> 45)
--
Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7058 -> Patchwork_14759
CI-20190529: 20190529
CI_DRM_7058: ec85c0501ada08c2aea8adb7da74931a6d0ae39b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14759: 14b613a9550b3fdb416e7bb0c5674259616b4799 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
14b613a9550b drm/i915/execlists: Prevent merging requests with conflicting flags
1b2d6533f931 drm/i915/perf: allow holding preemption on filtered ctx
db4b462f364b drm/i915/perf: Allow dynamic reconfiguration of the OA stream
1296e9cb95c6 drm/i915/perf: execute OA configuration from command stream
93a0ad5870f5 drm/i915/perf: implement active wait for noa configurations
5dac73e6848a drm/i915: add support for perf configuration queries
bb73a1117979 drm/i915/perf: allow for CS OA configs to be created lazily
44ce06aa2ac1 drm/i915/perf: introduce a versioning of the i915-perf uapi
e3e8e6f3790d drm/i915/perf: Replace global wakeref tracking with engine-pm
== Logs ==
For more details
[Intel-gfx] [PATCH] drm/i915/perf: Allow dynamic reconfiguration of the OA stream
Introduce a new perf_ioctl command to change the OA configuration of the
active stream. This allows the OA stream to be reconfigured between
batch buffers, giving greater flexibility in sampling. We inject a
request into the OA context to reconfigure the stream asynchronously on
the GPU in between and ordered with execbuffer calls.
Original patch for dynamic reconfiguration by Lionel Landwerlin.
Signed-off-by: Chris Wilson
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 49 +++-
include/uapi/drm/i915_drm.h | 9 ++
2 files changed, 57 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c2431b5a1f55..5daaf8d0bdc3 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2860,6 +2860,43 @@ static void i915_perf_disable_locked(struct
i915_perf_stream *stream)
stream->ops->disable(stream);
}
+static long i915_perf_config_locked(struct i915_perf_stream *stream,
+ unsigned long metrics_set)
+{
+ struct i915_oa_config *config;
+ long ret = stream->oa_config->id;
+
+ config = i915_perf_get_oa_config(stream->perf, metrics_set);
+ if (!config)
+ return -EINVAL;
+
+ if (config != stream->oa_config) {
+ struct intel_context *ce;
+ int err;
+
+ /*
+* If OA is bound to a specific context, emit the
+* reconfiguration inline from that context. The update
+* will then be ordered with respect to submission on that
+* context.
+*
+* When set globally, we use a low priority kernel context,
+* so it will effectively take effect when idle.
+*/
+ ce = stream->pinned_ctx ?: stream->engine->kernel_context;
+
+ err = emit_oa_config(stream, ce);
+ if (err == 0)
+ config = xchg(&stream->oa_config, config);
+ else
+ ret = err;
+ }
+
+ i915_oa_config_put(config);
+
+ return ret;
+}
+
/**
* i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
* @stream: An i915 perf stream
@@ -2883,6 +2920,8 @@ static long i915_perf_ioctl_locked(struct
i915_perf_stream *stream,
case I915_PERF_IOCTL_DISABLE:
i915_perf_disable_locked(stream);
return 0;
+ case I915_PERF_IOCTL_CONFIG:
+ return i915_perf_config_locked(stream, arg);
}
return -EINVAL;
@@ -4020,7 +4059,15 @@ void i915_perf_fini(struct drm_i915_private *i915)
*/
int i915_perf_ioctl_version(void)
{
- return 1;
+ /*
+* 1: Initial version
+* I915_PERF_IOCTL_ENABLE
+* I915_PERF_IOCTL_DISABLE
+*
+* 2: Added runtime modification of OA config.
+* I915_PERF_IOCTL_CONFIG
+*/
+ return 2;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 0c7b2815fbf1..0a44438c8fbb 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1932,6 +1932,15 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_DISABLE_IO('i', 0x1)
+/**
+ * Change metrics_set captured by a stream.
+ *
+ * Returns the previously bound metrics set id, or a negative error code.
+ *
+ * This ioctl is available in perf revision 2.
+ */
+#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
+
/**
* Common to all i915 perf records
*/
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: Check that registers are preserved between virtual engines
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Check that registers are
preserved between virtual engines
URL : https://patchwork.freedesktop.org/series/67843/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7051_full -> Patchwork_14747_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14747_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live_gt_lrc}:
- shard-iclb: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-iclb3/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-iclb8/igt@i915_selftest@live_gt_lrc.html
- shard-kbl: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-kbl7/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-kbl1/igt@i915_selftest@live_gt_lrc.html
- {shard-tglb}: NOTRUN -> [DMESG-FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-tglb2/igt@i915_selftest@live_gt_lrc.html
- shard-apl: [PASS][6] -> [DMESG-FAIL][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-apl2/igt@i915_selftest@live_gt_lrc.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-apl7/igt@i915_selftest@live_gt_lrc.html
- shard-glk: [PASS][8] -> [DMESG-FAIL][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-glk3/igt@i915_selftest@live_gt_lrc.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-glk4/igt@i915_selftest@live_gt_lrc.html
- shard-skl: [PASS][10] -> [DMESG-FAIL][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-skl2/igt@i915_selftest@live_gt_lrc.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-skl1/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_14747_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_switch@legacy-render-queue:
- shard-apl: [PASS][12] -> [INCOMPLETE][13] ([fdo#103927])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-apl4/igt@gem_ctx_swi...@legacy-render-queue.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-apl3/igt@gem_ctx_swi...@legacy-render-queue.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-snb: [PASS][14] -> [FAIL][15] ([fdo#111925])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-snb5/igt@gem_...@in-flight-contexts-immediate.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-snb1/igt@gem_...@in-flight-contexts-immediate.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#110854])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-iclb4/igt@gem_exec_balan...@smoke.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-iclb8/igt@gem_exec_balan...@smoke.html
* igt@gem_exec_schedule@preempt-queue-bsd:
- shard-iclb: [PASS][18] -> [SKIP][19] ([fdo#111325]) +4 similar
issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-iclb3/igt@gem_exec_sched...@preempt-queue-bsd.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-iclb1/igt@gem_exec_sched...@preempt-queue-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][20] -> [SKIP][21] ([fdo#109276]) +19 similar
issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-iclb1/igt@gem_exec_sched...@preempt-queue-bsd1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-iclb6/igt@gem_exec_sched...@preempt-queue-bsd1.html
* igt@gem_tiled_swapping@non-threaded:
- shard-snb: [PASS][22] -> [DMESG-FAIL][23] ([fdo#108686])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-snb7/igt@gem_tiled_swapp...@non-threaded.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-snb4/igt@gem_tiled_swapp...@non-threaded.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-hsw: [PASS][24] -> [DMESG-WARN][25] ([fdo#111870]) +1
similar issue
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7051/shard-hsw1/igt@gem_userptr_bl...@sync-unmap-after-close.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14747/shard-hsw5/igt@gem_userptr_bl...@sync-unmap-after-close.html
* igt@i915_suspend@sysfs-reader:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp: Remove the unused drm_device to get rid of build warning
== Series Details == Series: drm/dp: Remove the unused drm_device to get rid of build warning URL : https://patchwork.freedesktop.org/series/67879/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/dp: Remove the unused drm_device to get rid of build warning - ^~~ -drivers/gpu/drm/drm_dp_mst_topology.c: In function ‘drm_atomic_get_mst_topology_state’: -O:drivers/gpu/drm/drm_dp_mst_topology.c:4187:21: warning: unused variable ‘dev’ [-Wunused-variable] - struct drm_device *dev = mgr->dev; + ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/dp: Remove the unused drm_device to get rid of build warning
== Series Details ==
Series: drm/dp: Remove the unused drm_device to get rid of build warning
URL : https://patchwork.freedesktop.org/series/67879/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7058 -> Patchwork_14760
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14760 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14760, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14760:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_hugepages:
- fi-snb-2520m: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-snb-2520m/igt@i915_selftest@live_hugepages.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-snb-2520m/igt@i915_selftest@live_hugepages.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_coherency:
- {fi-kbl-soraka}:[INCOMPLETE][3] -> [TIMEOUT][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
* igt@runner@aborted:
- {fi-cml-s}: NOTRUN -> [FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-cml-s/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_14760 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_switch@rcs0:
- fi-bxt-dsi: [PASS][6] -> [INCOMPLETE][7] ([fdo#103927])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-bxt-dsi/igt@gem_ctx_swi...@rcs0.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-bxt-dsi/igt@gem_ctx_swi...@rcs0.html
* igt@gem_mmap_gtt@basic-copy:
- fi-icl-u3: [PASS][8] -> [DMESG-WARN][9] ([fdo#107724])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-copy.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-icl-u3/igt@gem_mmap_...@basic-copy.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u2: [PASS][10] -> [INCOMPLETE][11] ([fdo#107713] /
[fdo#108569])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][12] -> [DMESG-WARN][13] ([fdo#102614])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_exec_suspend@basic:
- {fi-icl-guc}: [FAIL][14] ([fdo#111699]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-guc/igt@gem_exec_susp...@basic.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-icl-guc/igt@gem_exec_susp...@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- {fi-icl-dsi}: [DMESG-WARN][16] ([fdo#106107]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][18] ([fdo#107724]) -> [PASS][19] +1
similar issue
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14760/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=10856
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm (rev4)
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm (rev4)
URL : https://patchwork.freedesktop.org/series/67874/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8bb740107b70 drm/i915/perf: Replace global wakeref tracking with engine-pm
2025bc9c090b drm/i915/perf: introduce a versioning of the i915-perf uapi
c42664d0f2c6 drm/i915/perf: allow for CS OA configs to be created lazily
4e283719a084 drm/i915: add support for perf configuration queries
b8b9dc4807cc drm/i915/perf: implement active wait for noa configurations
-:46: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#46: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:228:
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
^
-:181: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#181: FILE: drivers/gpu/drm/i915/i915_perf.c:1568:
+ DIV64_U64_ROUND_UP(
-:215: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#215: FILE: drivers/gpu/drm/i915/i915_perf.c:1602:
+ batch = cs = i915_gem_object_pin_map(bo, I915_MAP_WB);
-:223: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#223: FILE: drivers/gpu/drm/i915/i915_perf.c:1610:
+ cs = save_restore_register(
-:226: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#226: FILE: drivers/gpu/drm/i915/i915_perf.c:1613:
+ cs = save_restore_register(
-:328: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#328: FILE: drivers/gpu/drm/i915/i915_perf.c:1715:
+ cs = save_restore_register(
-:331: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#331: FILE: drivers/gpu/drm/i915/i915_perf.c:1718:
+ cs = save_restore_register(
-:448: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#448:
new file mode 100644
-:453: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#453: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:1:
+/*
-:454: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use
line 1 instead
#454: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:2:
+ * SPDX-License-Identifier: MIT
total: 0 errors, 3 warnings, 7 checks, 590 lines checked
729178efb761 drm/i915/perf: execute OA configuration from command stream
161ef9ac4e5a drm/i915/perf: Allow dynamic reconfiguration of the OA stream
ff1133b4b2ff drm/i915/perf: allow holding preemption on filtered ctx
a8604dba22d6 drm/i915/execlists: Prevent merging requests with conflicting flags
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 2a98f4e65bba ("drm/i915: add
infrastructure to hold off preemption on a request")'
#14:
References: 2a98f4e65bba ("drm/i915: add infrastructure to hold off preemption
on a request")
total: 1 errors, 1 warnings, 0 checks, 9 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915/perf: Replace global wakeref tracking with engine-pm (rev4)
== Series Details ==
Series: series starting with [CI,1/9] drm/i915/perf: Replace global wakeref
tracking with engine-pm (rev4)
URL : https://patchwork.freedesktop.org/series/67874/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7058 -> Patchwork_14761
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/index.html
New tests
-
New tests have been introduced between CI_DRM_7058 and Patchwork_14761:
### New IGT tests (1) ###
* igt@i915_selftest@live_perf:
- Statuses : 44 pass(s)
- Exec time: [0.43, 2.56] s
Known issues
Here are the changes found in Patchwork_14761 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_switch@rcs0:
- fi-bxt-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-bxt-dsi/igt@gem_ctx_swi...@rcs0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-bxt-dsi/igt@gem_ctx_swi...@rcs0.html
* igt@prime_vgem@basic-fence-read:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +1
similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@prime_v...@basic-fence-read.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-icl-u3/igt@prime_v...@basic-fence-read.html
Possible fixes
* igt@gem_exec_suspend@basic:
- {fi-icl-guc}: [FAIL][5] ([fdo#111699]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-guc/igt@gem_exec_susp...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-icl-guc/igt@gem_exec_susp...@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- {fi-icl-dsi}: [DMESG-WARN][7] ([fdo#106107]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-icl-dsi/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
* igt@i915_selftest@live_coherency:
- {fi-kbl-soraka}:[INCOMPLETE][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7058/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/fi-kbl-soraka/igt@i915_selftest@live_coherency.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
Participating hosts (54 -> 46)
--
Missing(8): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-byt-squawks
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7058 -> Patchwork_14761
CI-20190529: 20190529
CI_DRM_7058: ec85c0501ada08c2aea8adb7da74931a6d0ae39b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14761: a8604dba22d680da43d834f586dba412a6b74d0f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a8604dba22d6 drm/i915/execlists: Prevent merging requests with conflicting flags
ff1133b4b2ff drm/i915/perf: allow holding preemption on filtered ctx
161ef9ac4e5a drm/i915/perf: Allow dynamic reconfiguration of the OA stream
729178efb761 drm/i915/perf: execute OA configuration from command stream
b8b9dc4807cc drm/i915/perf: implement active wait for noa configurations
4e283719a084 drm/i915: add support for perf configuration queries
c42664d0f2c6 drm/i915/perf: allow for CS OA configs to be created lazily
2025bc9c090b drm/i915/perf: introduce a versioning of the i915-perf uapi
8bb740107b70 drm/i915/perf: Replace global wakeref tracking with engine-pm
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14761/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.free
[Intel-gfx] linux-next: build warning after merge of the drm-misc tree
Hi all,
After merging the drm-misc tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
drivers/gpu/drm/drm_dp_mst_topology.c: In function
'drm_atomic_get_mst_topology_state':
drivers/gpu/drm/drm_dp_mst_topology.c:4187:21: warning: unused variable 'dev'
[-Wunused-variable]
4187 | struct drm_device *dev = mgr->dev;
| ^~~
Introduced by commit
83fa9842afe7 ("drm/dp-mst: Drop connection_mutex check")
--
Cheers,
Stephen Rothwell
pgpL1PCBPVIc6.pgp
Description: OpenPGP digital signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/ehl: Port C's hotplug interrupt is associated with TC1 bits
On some platforms that have the MCC PCH, Port C's hotplug interrupt
bits are mapped to TC1 bits.
Suggested-by: Matt Roper
Signed-off-by: Vivek Kasireddy
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
drivers/gpu/drm/i915/i915_irq.c | 8
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 0e45c61d7331..6594f2af1257 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5282,6 +5282,9 @@ static bool icl_combo_port_connected(struct
drm_i915_private *dev_priv,
{
enum port port = intel_dig_port->base.port;
+ if (HAS_PCH_MCC(dev_priv) && port == PORT_C)
+ return I915_READ(SDEISR) & SDE_TC_HOTPLUG_ICP(PORT_TC1);
+
return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(port);
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3af7f7914c40..a7c968b01af3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2249,8 +2249,8 @@ static void icp_irq_handler(struct drm_i915_private
*dev_priv, u32 pch_iir)
tc_port_hotplug_long_detect = tgp_tc_port_hotplug_long_detect;
pins = hpd_tgp;
} else if (HAS_PCH_MCC(dev_priv)) {
- ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
- tc_hotplug_trigger = 0;
+ ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
+ tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_ICP(PORT_TC1);
pins = hpd_icp;
} else {
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
@@ -3377,8 +3377,8 @@ static void icp_hpd_irq_setup(struct drm_i915_private
*dev_priv,
static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
icp_hpd_irq_setup(dev_priv,
- SDE_DDI_MASK_TGP, 0,
- TGP_DDI_HPD_ENABLE_MASK, 0,
+ SDE_DDI_MASK_ICP, SDE_TC_HOTPLUG_ICP(PORT_TC1),
+ ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE(PORT_TC1),
hpd_icp);
}
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/7] drm/i915: add pipe name to pipe mismatch logs
This way it's easier to figure out what didn't match when we have
multiple pipes enabled.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 33 +++-
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index c5985f0b5bbf..fbc1f01f70d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12526,8 +12526,9 @@ pipe_config_infoframe_mismatch(struct drm_i915_private
*dev_priv,
}
}
-static void __printf(3, 4)
-pipe_config_mismatch(bool fastset, const char *name, const char *format, ...)
+static void __printf(4, 5)
+pipe_config_mismatch(bool fastset, const char *crtc_name, const char *name,
+const char *format, ...)
{
struct va_format vaf;
va_list args;
@@ -12537,9 +12538,10 @@ pipe_config_mismatch(bool fastset, const char *name,
const char *format, ...)
vaf.va = &args;
if (fastset)
- DRM_DEBUG_KMS("fastset mismatch in %s %pV\n", name, &vaf);
+ DRM_DEBUG_KMS("[%s] fastset mismatch in %s %pV\n",
+ crtc_name, name, &vaf);
else
- DRM_ERROR("mismatch in %s %pV\n", name, &vaf);
+ DRM_ERROR("[%s] mismatch in %s %pV\n", crtc_name, name, &vaf);
va_end(args);
}
@@ -12567,6 +12569,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
bool fastset)
{
struct drm_i915_private *dev_priv =
to_i915(current_config->base.crtc->dev);
+ const char *crtc_name = pipe_config->base.crtc->name;
bool ret = true;
u32 bp_gamma = 0;
bool fixup_inherited = fastset &&
@@ -12580,7 +12583,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_X(name) do { \
if (current_config->name != pipe_config->name) { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fastset, crtc_name, __stringify(name), \
"(expected 0x%08x, found 0x%08x)", \
current_config->name, \
pipe_config->name); \
@@ -12590,7 +12593,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_I(name) do { \
if (current_config->name != pipe_config->name) { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fastset, crtc_name, __stringify(name), \
"(expected %i, found %i)", \
current_config->name, \
pipe_config->name); \
@@ -12600,7 +12603,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_BOOL(name) do { \
if (current_config->name != pipe_config->name) { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fastset, crtc_name, __stringify(name), \
"(expected %s, found %s)", \
yesno(current_config->name), \
yesno(pipe_config->name)); \
@@ -12617,7 +12620,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
if (!fixup_inherited || (!current_config->name && !pipe_config->name))
{ \
PIPE_CONF_CHECK_BOOL(name); \
} else { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fastset, crtc_name, __stringify(name), \
"unable to verify whether state matches
exactly, forcing modeset (expected %s, found %s)", \
yesno(current_config->name), \
yesno(pipe_config->name)); \
@@ -12627,7 +12630,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_P(name) do { \
if (current_config->name != pipe_config->name) { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fastset, crtc_name, __stringify(name), \
"(expected %p, found %p)", \
current_config->name, \
pipe_config->name); \
@@ -12639,7 +12642,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
if (!intel_compare_link_m_n(¤t_config->name, \
&pipe_config->name,\
!fastset)) { \
- pipe_config_mismatch(fastset, __stringify(name), \
+ pipe_config_mismatch(fa
[Intel-gfx] [PATCH 6/7] drm/i915: prettify MST debug message
s/?/:/ so it's get correctly colored by dmesg.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 348a09890611..33a55da89ce9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4450,7 +4450,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
&dp_to_dig_port(intel_dp)->base;
bool sink_can_mst = intel_dp_sink_can_mst(intel_dp);
- DRM_DEBUG_KMS("[ENCODER:%d:%s] MST support? port: %s, sink: %s,
modparam: %s\n",
+ DRM_DEBUG_KMS("[ENCODER:%d:%s] MST support: port: %s, sink: %s,
modparam: %s\n",
encoder->base.base.id, encoder->base.name,
yesno(intel_dp->can_mst), yesno(sink_can_mst),
yesno(i915_modparams.enable_dp_mst));
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/7] drm/i915: fix port checks for MST support on gen >= 11
Both Ice Lake and Elkhart Lake (gen 11) support MST on all external
connections except DDI A. Tiger Lake (gen 12) supports on all external
connections.
Move the check to happen inside intel_dp_mst_encoder_init() and add
specific platform checks.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +--
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 0e45c61d7331..348a09890611 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -7268,11 +7268,8 @@ intel_dp_init_connector(struct intel_digital_port
*intel_dig_port,
intel_connector->get_hw_state = intel_connector_get_hw_state;
/* init MST on ports that can support it */
- if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) &&
- (port == PORT_B || port == PORT_C ||
-port == PORT_D || port == PORT_F))
- intel_dp_mst_encoder_init(intel_dig_port,
- intel_connector->base.base.id);
+ intel_dp_mst_encoder_init(intel_dig_port,
+ intel_connector->base.base.id);
if (!intel_edp_init_connector(intel_dp, intel_connector)) {
intel_dp_aux_fini(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c2bbba1effc1..8dcb578e6d01 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -654,15 +654,26 @@ intel_dp_mst_encoder_active_links(struct
intel_digital_port *intel_dig_port)
void
intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int
conn_base_id)
{
+ struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
struct intel_dp *intel_dp = &intel_dig_port->dp;
- struct drm_device *dev = intel_dig_port->base.base.dev;
+ enum port port = intel_dig_port->base.port;
int ret;
+ if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
+ return;
+
+ if (INTEL_GEN(i915) == 11 && port == PORT_A)
+ return;
+
+ if (INTEL_GEN(i915) < 11 &&
+ port != PORT_B && port != PORT_C && port != PORT_D && port !=
PORT_F)
+ return;
+
intel_dp->mst_mgr.cbs = &mst_cbs;
/* create encoders */
intel_dp_create_fake_mst_encoders(intel_dig_port);
- ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
+ ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
&intel_dp->aux, 16, 3, conn_base_id);
if (ret) {
intel_dp->can_mst = false;
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 7/7] drm/dp-mst: fix warning on unused var
Fixes: 83fa9842afe7 ("drm/dp-mst: Drop connection_mutex check")
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 9364e4f42975..95e63309 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4184,8 +4184,6 @@ EXPORT_SYMBOL(drm_dp_mst_topology_state_funcs);
struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct
drm_atomic_state *state,
struct
drm_dp_mst_topology_mgr *mgr)
{
- struct drm_device *dev = mgr->dev;
-
return to_dp_mst_topology_state(drm_atomic_get_private_obj_state(state,
&mgr->base));
}
EXPORT_SYMBOL(drm_atomic_get_mst_topology_state);
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/7] drm/i915: simplify setting of ddi_io_power_domain
Instead of the ever growing switch, just compute the ddi io power domain
based on the port number.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 43 ++--
1 file changed, 3 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6c1315c7bcde..b2776f6044ae 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4750,46 +4750,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
intel_encoder->update_complete = intel_ddi_update_complete;
}
- switch (port) {
- case PORT_A:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_A_IO;
- break;
- case PORT_B:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_B_IO;
- break;
- case PORT_C:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_C_IO;
- break;
- case PORT_D:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_D_IO;
- break;
- case PORT_E:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_E_IO;
- break;
- case PORT_F:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_F_IO;
- break;
- case PORT_G:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_G_IO;
- break;
- case PORT_H:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_H_IO;
- break;
- case PORT_I:
- intel_dig_port->ddi_io_power_domain =
- POWER_DOMAIN_PORT_DDI_I_IO;
- break;
- default:
- MISSING_CASE(port);
- }
+ WARN_ON(port > PORT_I);
+ intel_dig_port->ddi_io_power_domain = POWER_DOMAIN_PORT_DDI_A_IO +
+ port - PORT_A;
if (init_dp) {
if (!intel_ddi_init_dp_connector(intel_dig_port))
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/7] drm/i915: cleanup unused returns on DP-MST
Those init functions mark their success in the intel_dig_port
struct, the return values are not really used.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +--
drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 +-
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 2203be28ea01..c2bbba1effc1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -634,7 +634,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port
*intel_dig_port, enum
}
-static bool
+static void
intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
{
struct intel_dp *intel_dp = &intel_dig_port->dp;
@@ -643,7 +643,6 @@ intel_dp_create_fake_mst_encoders(struct intel_digital_port
*intel_dig_port)
for_each_pipe(dev_priv, pipe)
intel_dp->mst_encoders[pipe] =
intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
- return true;
}
int
@@ -652,14 +651,13 @@ intel_dp_mst_encoder_active_links(struct
intel_digital_port *intel_dig_port)
return intel_dig_port->dp.active_mst_links;
}
-int
+void
intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int
conn_base_id)
{
struct intel_dp *intel_dp = &intel_dig_port->dp;
struct drm_device *dev = intel_dig_port->base.base.dev;
int ret;
- intel_dp->can_mst = true;
intel_dp->mst_mgr.cbs = &mst_cbs;
/* create encoders */
@@ -668,9 +666,10 @@ intel_dp_mst_encoder_init(struct intel_digital_port
*intel_dig_port, int conn_ba
&intel_dp->aux, 16, 3, conn_base_id);
if (ret) {
intel_dp->can_mst = false;
- return ret;
+ return;
}
- return 0;
+
+ intel_dp->can_mst = true;
}
void
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h
b/drivers/gpu/drm/i915/display/intel_dp_mst.h
index f660ad80db04..f2478c17a8fd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h
@@ -8,7 +8,7 @@
struct intel_digital_port;
-int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int
conn_id);
+void intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int
conn_id);
void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
int intel_dp_mst_encoder_active_links(struct intel_digital_port
*intel_dig_port);
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/7] Small fixes before fixing MST
I'm trying to understand why TGL is failing on link training when MST is enabled. I couldn't find it yet, but here some trivial patches trying to improve our code. Lucas De Marchi (7): drm/i915: simplify setting of ddi_io_power_domain drm/i915: cleanup unused returns on DP-MST drm/i915: fix port checks for MST support on gen >= 11 drm/i915: remove extra new line on pipe_config mismatch drm/i915: add pipe name to pipe mismatch logs drm/i915: prettify MST debug message drm/dp-mst: fix warning on unused var drivers/gpu/drm/drm_dp_mst_topology.c| 2 - drivers/gpu/drm/i915/display/intel_ddi.c | 43 ++- drivers/gpu/drm/i915/display/intel_display.c | 55 +++- drivers/gpu/drm/i915/display/intel_dp.c | 9 ++-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 ++--- drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 +- 6 files changed, 54 insertions(+), 83 deletions(-) -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/7] drm/i915: remove extra new line on pipe_config mismatch
The new line is already added by pipe_config_mismatch(), so the callers
shouldn't add it.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 22 ++--
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a146ec02a0c1..c5985f0b5bbf 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12581,7 +12581,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_X(name) do { \
if (current_config->name != pipe_config->name) { \
pipe_config_mismatch(fastset, __stringify(name), \
-"(expected 0x%08x, found 0x%08x)\n", \
+"(expected 0x%08x, found 0x%08x)", \
current_config->name, \
pipe_config->name); \
ret = false; \
@@ -12591,7 +12591,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_I(name) do { \
if (current_config->name != pipe_config->name) { \
pipe_config_mismatch(fastset, __stringify(name), \
-"(expected %i, found %i)\n", \
+"(expected %i, found %i)", \
current_config->name, \
pipe_config->name); \
ret = false; \
@@ -12601,7 +12601,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_BOOL(name) do { \
if (current_config->name != pipe_config->name) { \
pipe_config_mismatch(fastset, __stringify(name), \
-"(expected %s, found %s)\n", \
+"(expected %s, found %s)", \
yesno(current_config->name), \
yesno(pipe_config->name)); \
ret = false; \
@@ -12618,7 +12618,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
PIPE_CONF_CHECK_BOOL(name); \
} else { \
pipe_config_mismatch(fastset, __stringify(name), \
-"unable to verify whether state matches
exactly, forcing modeset (expected %s, found %s)\n", \
+"unable to verify whether state matches
exactly, forcing modeset (expected %s, found %s)", \
yesno(current_config->name), \
yesno(pipe_config->name)); \
ret = false; \
@@ -12628,7 +12628,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_P(name) do { \
if (current_config->name != pipe_config->name) { \
pipe_config_mismatch(fastset, __stringify(name), \
-"(expected %p, found %p)\n", \
+"(expected %p, found %p)", \
current_config->name, \
pipe_config->name); \
ret = false; \
@@ -12641,7 +12641,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
!fastset)) { \
pipe_config_mismatch(fastset, __stringify(name), \
"(expected tu %i gmch %i/%i link %i/%i, " \
-"found tu %i, gmch %i/%i link %i/%i)\n", \
+"found tu %i, gmch %i/%i link %i/%i)", \
current_config->name.tu, \
current_config->name.gmch_m, \
current_config->name.gmch_n, \
@@ -12669,7 +12669,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
pipe_config_mismatch(fastset, __stringify(name), \
"(expected tu %i gmch %i/%i link %i/%i, " \
"or tu %i gmch %i/%i link %i/%i, " \
-"found tu %i, gmch %i/%i link %i/%i)\n", \
+"found tu %i, gmch %i/%i link %i/%i)", \
current_config->name.tu, \
current_config->name.gmch_m, \
current_config->name.gmch_n, \
@@ -12692,7 +12692,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
#define PIPE_CONF_CHECK_FLAGS(name, mask) do { \
if ((current_config->name ^ pipe_config->name) & (mask)) { \
pipe_config_mismatch(fastset, __stringify(name
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Check known register
values within the context
URL : https://patchwork.freedesktop.org/series/67849/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7055_full -> Patchwork_14748_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14748_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live_gt_lrc}:
- shard-iclb: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-iclb7/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-iclb6/igt@i915_selftest@live_gt_lrc.html
- shard-kbl: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-kbl3/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-kbl3/igt@i915_selftest@live_gt_lrc.html
- shard-apl: [PASS][5] -> [DMESG-FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-apl7/igt@i915_selftest@live_gt_lrc.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-apl2/igt@i915_selftest@live_gt_lrc.html
- shard-glk: [PASS][7] -> [DMESG-FAIL][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-glk5/igt@i915_selftest@live_gt_lrc.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-glk8/igt@i915_selftest@live_gt_lrc.html
- shard-skl: [PASS][9] -> [DMESG-FAIL][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-skl7/igt@i915_selftest@live_gt_lrc.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-skl4/igt@i915_selftest@live_gt_lrc.html
* igt@kms_plane@plane-position-hole-pipe-b-planes:
- {shard-tglb}: NOTRUN -> [INCOMPLETE][11] +1 similar issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-tglb2/igt@kms_pl...@plane-position-hole-pipe-b-planes.html
Known issues
Here are the changes found in Patchwork_14748_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [PASS][12] -> [DMESG-WARN][13] ([fdo#108566]) +2
similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-apl6/igt@gem_ctx_isolat...@rcs0-s3.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-apl6/igt@gem_ctx_isolat...@rcs0-s3.html
* igt@gem_ctx_switch@legacy-vebox-heavy:
- shard-iclb: [PASS][14] -> [INCOMPLETE][15] ([fdo#107713] /
[fdo#111867])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-iclb7/igt@gem_ctx_swi...@legacy-vebox-heavy.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-iclb1/igt@gem_ctx_swi...@legacy-vebox-heavy.html
* igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#109276]) +10 similar
issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-iclb1/igt@gem_exec_sched...@fifo-bsd1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-iclb6/igt@gem_exec_sched...@fifo-bsd1.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][18] -> [SKIP][19] ([fdo#111325]) +6 similar
issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-iclb6/igt@gem_exec_sched...@preemptive-hang-bsd.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-iclb4/igt@gem_exec_sched...@preemptive-hang-bsd.html
* igt@gem_tiled_swapping@non-threaded:
- shard-apl: [PASS][20] -> [INCOMPLETE][21] ([fdo#103927] /
[fdo#108686])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-apl1/igt@gem_tiled_swapp...@non-threaded.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-apl4/igt@gem_tiled_swapp...@non-threaded.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-hsw: [PASS][22] -> [DMESG-WARN][23] ([fdo#111870])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-hsw7/igt@gem_userptr_bl...@dmabuf-unsync.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/shard-hsw5/igt@gem_userptr_bl...@dmabuf-unsync.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-skl: [PASS][24] -> [INCOMPLETE][25] ([fdo#104108]) +1
similar issue
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/shard-skl2/igt@gem_workarou...@suspend-resume-fd.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/sha
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Port C's hotplug interrupt is associated with TC1 bits
== Series Details ==
Series: drm/i915/ehl: Port C's hotplug interrupt is associated with TC1 bits
URL : https://patchwork.freedesktop.org/series/67881/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7060 -> Patchwork_14762
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14762/index.html
Known issues
Here are the changes found in Patchwork_14762 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_flink_basic@bad-open:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1
similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-icl-u3/igt@gem_flink_ba...@bad-open.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14762/fi-icl-u3/igt@gem_flink_ba...@bad-open.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- {fi-cml-s}: [DMESG-WARN][3] ([fdo#111764]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14762/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@gem_mmap_gtt@basic:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1
similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-icl-u3/igt@gem_mmap_...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14762/fi-icl-u3/igt@gem_mmap_...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
Participating hosts (53 -> 47)
--
Additional (1): fi-tgl-u2
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7060 -> Patchwork_14762
CI-20190529: 20190529
CI_DRM_7060: bac86c35889cffa19d3f7368904c542edde4fafc @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14762: 6b1507605ef813f39c00535fc81257872af2d3a1 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6b1507605ef8 drm/i915/ehl: Port C's hotplug interrupt is associated with TC1
bits
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14762/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Small fixes before fixing MST
== Series Details == Series: Small fixes before fixing MST URL : https://patchwork.freedesktop.org/series/67883/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0fdcd1fc0932 drm/i915: simplify setting of ddi_io_power_domain e302891b93c2 drm/i915: cleanup unused returns on DP-MST dca3b8dcfc48 drm/i915: fix port checks for MST support on gen >= 11 012957d242b9 drm/i915: remove extra new line on pipe_config mismatch -:47: WARNING:LONG_LINE: line over 100 characters #47: FILE: drivers/gpu/drm/i915/display/intel_display.c:12621: +"unable to verify whether state matches exactly, forcing modeset (expected %s, found %s)", \ total: 0 errors, 1 warnings, 0 checks, 88 lines checked 9be0f0c1ce7e drm/i915: add pipe name to pipe mismatch logs a126f0ea7641 drm/i915: prettify MST debug message 8ff3e4c04eee drm/dp-mst: fix warning on unused var ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Small fixes before fixing MST
== Series Details == Series: Small fixes before fixing MST URL : https://patchwork.freedesktop.org/series/67883/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: simplify setting of ddi_io_power_domain Okay! Commit: drm/i915: cleanup unused returns on DP-MST Okay! Commit: drm/i915: fix port checks for MST support on gen >= 11 Okay! Commit: drm/i915: remove extra new line on pipe_config mismatch Okay! Commit: drm/i915: add pipe name to pipe mismatch logs Okay! Commit: drm/i915: prettify MST debug message Okay! Commit: drm/dp-mst: fix warning on unused var - ^~~ -drivers/gpu/drm/drm_dp_mst_topology.c: In function ‘drm_atomic_get_mst_topology_state’: -O:drivers/gpu/drm/drm_dp_mst_topology.c:4187:21: warning: unused variable ‘dev’ [-Wunused-variable] - struct drm_device *dev = mgr->dev; + ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Small fixes before fixing MST
== Series Details ==
Series: Small fixes before fixing MST
URL : https://patchwork.freedesktop.org/series/67883/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7060 -> Patchwork_14763
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/index.html
Known issues
Here are the changes found in Patchwork_14763 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_switch@legacy-render:
- fi-bxt-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927] /
[fdo#111381])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
* igt@gem_workarounds@basic-read:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-icl-u3/igt@gem_workarou...@basic-read.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/fi-icl-u3/igt@gem_workarou...@basic-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111407])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- {fi-cml-s}: [DMESG-WARN][7] ([fdo#111764]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@gem_mmap_gtt@basic:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7060/fi-icl-u3/igt@gem_mmap_...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/fi-icl-u3/igt@gem_mmap_...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
Participating hosts (53 -> 44)
--
Additional (1): fi-tgl-u2
Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050
fi-byt-squawks fi-bsw-cyan fi-kbl-x1275 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7060 -> Patchwork_14763
CI-20190529: 20190529
CI_DRM_7060: bac86c35889cffa19d3f7368904c542edde4fafc @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14763: 8ff3e4c04eeecc2f17d6d7ac8836487f8252db17 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8ff3e4c04eee drm/dp-mst: fix warning on unused var
a126f0ea7641 drm/i915: prettify MST debug message
9be0f0c1ce7e drm/i915: add pipe name to pipe mismatch logs
012957d242b9 drm/i915: remove extra new line on pipe_config mismatch
dca3b8dcfc48 drm/i915: fix port checks for MST support on gen >= 11
e302891b93c2 drm/i915: cleanup unused returns on DP-MST
0fdcd1fc0932 drm/i915: simplify setting of ddi_io_power_domain
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14763/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Honour O_NONBLOCK before throttling execbuf submissions
== Series Details ==
Series: drm/i915: Honour O_NONBLOCK before throttling execbuf submissions
URL : https://patchwork.freedesktop.org/series/67850/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7056_full -> Patchwork_14749_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14749_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14749_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14749_full:
### IGT changes ###
Possible regressions
* igt@kms_fbcon_fbt@psr-suspend:
- shard-iclb: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb2/igt@kms_fbcon_...@psr-suspend.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-iclb2/igt@kms_fbcon_...@psr-suspend.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc:
- {shard-tglb}: NOTRUN -> [INCOMPLETE][3] +1 similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-tglb6/igt@kms_frontbuffer_track...@psr-1p-offscren-pri-indfb-draw-mmap-wc.html
Known issues
Here are the changes found in Patchwork_14749_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][4] -> [SKIP][5] ([fdo#110854])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb2/igt@gem_exec_balan...@smoke.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-iclb3/igt@gem_exec_balan...@smoke.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276]) +8 similar
issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb4/igt@gem_exec_sched...@independent-bsd2.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-iclb8/igt@gem_exec_sched...@independent-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][8] -> [SKIP][9] ([fdo#111325]) +6 similar
issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb8/igt@gem_exec_sched...@preempt-other-chain-bsd.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-iclb2/igt@gem_exec_sched...@preempt-other-chain-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [PASS][10] -> [DMESG-WARN][11] ([fdo#111870])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-hsw1/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-hsw1/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][12] -> [DMESG-WARN][13] ([fdo#108566]) +6
similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-apl2/igt@i915_susp...@fence-restore-tiled2untiled.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html
* igt@kms_flip@blocking-wf_vblank:
- shard-apl: [PASS][14] -> [INCOMPLETE][15] ([fdo#103927])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-apl2/igt@kms_flip@blocking-wf_vblank.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-apl2/igt@kms_flip@blocking-wf_vblank.html
- shard-iclb: [PASS][16] -> [INCOMPLETE][17] ([fdo#107713])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb1/igt@kms_flip@blocking-wf_vblank.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-iclb1/igt@kms_flip@blocking-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][18] -> [FAIL][19] ([fdo#105363])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-glk9/igt@kms_f...@flip-vs-expired-vblank.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-glk9/igt@kms_f...@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [PASS][20] -> [INCOMPLETE][21] ([fdo#109507])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-skl8/igt@kms_f...@flip-vs-suspend-interruptible.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14749/shard-skl5/igt@kms_f...@flip-vs-suspend-interruptible.html
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/perf: store the associated engine of a stream
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: store the associated
engine of a stream
URL : https://patchwork.freedesktop.org/series/67857/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7056_full -> Patchwork_14753_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14753_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_color@pipe-a-legacy-gamma-reset:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-tglb2/igt@kms_co...@pipe-a-legacy-gamma-reset.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-tglb1/igt@kms_co...@pipe-a-legacy-gamma-reset.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-random:
- {shard-tglb}: [FAIL][3] ([fdo#103232] / [fdo#111703]) ->
[INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-tglb4/igt@kms_cursor_...@pipe-a-cursor-128x42-random.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-tglb4/igt@kms_cursor_...@pipe-a-cursor-128x42-random.html
Known issues
Here are the changes found in Patchwork_14753_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-s3:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-skl7/igt@gem_ctx_isolat...@rcs0-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-skl6/igt@gem_ctx_isolat...@rcs0-s3.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110854])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb2/igt@gem_exec_balan...@smoke.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-iclb3/igt@gem_exec_balan...@smoke.html
* igt@gem_exec_parallel@fds:
- shard-iclb: [PASS][9] -> [INCOMPLETE][10] ([fdo#107713])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb8/igt@gem_exec_paral...@fds.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-iclb2/igt@gem_exec_paral...@fds.html
* igt@gem_exec_schedule@preempt-other-bsd2:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +1 similar
issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb2/igt@gem_exec_sched...@preempt-other-bsd2.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-iclb3/igt@gem_exec_sched...@preempt-other-bsd2.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#111325]) +1 similar
issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb6/igt@gem_exec_sched...@preempt-queue-chain-bsd.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-iclb2/igt@gem_exec_sched...@preempt-queue-chain-bsd.html
* igt@gem_pread@uncached:
- shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-hsw7/igt@gem_pr...@uncached.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-hsw5/igt@gem_pr...@uncached.html
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [PASS][17] -> [INCOMPLETE][18] ([fdo#107713] /
[fdo#108686])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-iclb4/igt@gem_tiled_swapp...@non-threaded.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-iclb1/igt@gem_tiled_swapp...@non-threaded.html
- shard-hsw: [PASS][19] -> [INCOMPLETE][20] ([fdo#103540] /
[fdo#108686])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-hsw5/igt@gem_tiled_swapp...@non-threaded.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-hsw5/igt@gem_tiled_swapp...@non-threaded.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][21] -> [DMESG-WARN][22] ([fdo#108566]) +6
similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-apl2/igt@i915_susp...@fence-restore-tiled2untiled.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/shard-apl3/igt@i915_susp...@fence-restore-tiled2untiled.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-snb: [PASS][23] -> [SKIP][24] ([fdo#109271]) +3 similar
issues
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7056/shard-snb5/igt@kms_big...@linear-32bpp-rotate-0.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14753/
Re: [Intel-gfx] [RFC PATCH] iommu/vt-d: Fix IOMMU field not populated on device hot re-plug
Hi Janusz, On 9/3/19 3:41 PM, Janusz Krzysztofik wrote: Hi Baolu, On Tuesday, September 3, 2019 3:29:40 AM CEST Lu Baolu wrote: Hi Janusz, On 9/2/19 4:37 PM, Janusz Krzysztofik wrote: I am not saying that keeping data is not acceptable. I just want to check whether there are any other solutions. Then reverting 458b7c8e0dde and applying this patch still resolves the issue for me. No errors appear when mappings are unmapped on device close after the device has been removed, and domain info preserved on device removal is successfully reused on device re-plug. This patch doesn't look good to me although I agree that keeping data is acceptable. It updates dev->archdata.iommu, but leaves the hardware context/pasid table unchanged. This might cause problems somewhere. Is there anything else I can do to help? Can you please tell me how to reproduce the problem? The most simple way to reproduce the issue, assuming there are no non-Intel graphics adapters installed, is to run the following shell commands: #!/bin/sh # load i915 module modprobe i915 # open an i915 device and keep it open in background cat /dev/dri/card0 >/dev/null & sleep 2 # simulate device unplug echo 1 >/sys/class/drm/card0/device/remove # make the background process close the device on exit kill $! I tried to reproduce the issue with above instructions. I got below kernel messages after above operation. Is it the same as what you've seen? I can't find anything explicitly related to iommu except an IOMMU fault generated after device got removed and the DMA translation structures got torn down. Can you please help me to understand how IOMMU driver triggers the issue? [ 182.217672] [ cut here ] [ 182.217679] WARNING: CPU: 1 PID: 1285 at drivers/gpu/drm/drm_mode_config.c:495 drm_mode_config_cleanup+0x2cb/0x2e0 [ 182.217680] Modules linked in: nls_iso8859_1 snd_soc_skl snd_soc_sst_ipc snd_soc_sst_dsp snd_hda_ext_core snd_soc_acpi_intel_match snd_soc_acpi snd_soc_core intel_rapl_msr snd_hda_codec_hdmi snd_hda_codec_realtek snd_compress snd_hda_codec_generic ledtrig_audio ac97_bus snd_pcm_dmaengine snd_hda_intel snd_intel_nhlt snd_hda_codec snd_hda_core snd_hwdep snd_pcm intel_rapl_common x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel kvm snd_seq_midi irqbypass snd_seq_midi_event snd_rawmidi crct10dif_pclmul crc32_pclmul ghash_clmulni_intel iwlmvm snd_seq mac80211 libarc4 aesni_intel snd_seq_device snd_timer crypto_simd ipu3_cio2 cryptd glue_helper iwlwifi v4l2_fwnode intel_cstate videobuf2_dma_sg videobuf2_memops intel_rapl_perf asix videobuf2_v4l2 videobuf2_common usbnet mii cfg80211 input_leds serio_raw intel_wmi_thunderbolt snd mei_me videodev soundcore intel_xhci_usb_role_switch mei 8250_dw mc roles intel_pch_thermal hid_sensor_magn_3d hid_sensor_accel_3d hid_sensor_press [ 182.217709] hid_sensor_incl_3d hid_sensor_als hid_sensor_rotation hid_sensor_gyro_3d hid_sensor_trigger industrialio_triggered_buffer kfifo_buf hid_sensor_iio_common industrialio intel_vbtn mac_hid intel_hid acpi_pad sparse_keymap sch_fq_codel parport_pc ppdev lp parport ip_tables x_tables hid_sensor_custom hid_sensor_hub intel_ishtp_hid hid_generic dwc3 ulpi udc_core i2c_designware_platform i2c_designware_core e1000e psmouse i2c_i801 tg3 usbhid dwc3_pci hid intel_ish_ipc intel_lpss_pci intel_ishtp intel_lpss wmi pinctrl_sunrisepoint pinctrl_intel [ 182.217727] CPU: 1 PID: 1285 Comm: bash Not tainted 5.4.0-rc2+ #2704 [ 182.217728] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.R00.B105.B00.1512051901 12/05/2015 [ 182.217731] RIP: 0010:drm_mode_config_cleanup+0x2cb/0x2e0 [ 182.217732] Code: eb 0c 48 8b 70 48 4c 89 e7 e8 31 f4 ff ff 48 8d 7d a0 e8 d8 95 ff ff 48 85 c0 75 e6 48 8d 7d a0 e8 1a 87 ff ff e9 ef fd ff ff <0f> 0b e9 ed fe ff ff 0f 0b eb 98 e8 05 ec 98 ff 0f 1f 44 00 00 0f [ 182.217733] RSP: 0018:a1c481d37c78 EFLAGS: 00010216 [ 182.217735] RAX: 95c7da326e08 RBX: 95c7dcf6 RCX: 801e [ 182.217735] RDX: 95c7dcf603b8 RSI: 801e RDI: 95c7dcf60390 [ 182.217736] RBP: a1c481d37cd8 R08: R09: 9e035e00 [ 182.217737] R10: a1c481d37be0 R11: 0001 R12: 95c7dcf60250 [ 182.217737] R13: 95c7dcf603b8 R14: a1c481d37ee8 R15: fff2 [ 182.217739] FS: 7f804af7f740() GS:95c7e7a8() knlGS: [ 182.217739] CS: 0010 DS: ES: CR0: 80050033 [ 182.217740] CR2: 7ffebc530cec CR3: 000137e0e003 CR4: 003606e0 [ 182.217741] DR0: DR1: DR2: [ 182.217742] DR3: DR6: fffe0ff0 DR7: 0400 [ 182.217742] Call Trace: [ 182.217748] ? _cond_resched+0x19/0x40 [ 182.217752] intel_modeset_driver_remove+0xd1/0x150 [ 182.217754] i915_driver_remove+0xb8/0x120 [ 182.217756] i915_pci_remove+0
