Re: [v3 13/26] KVM: Define a new interface kvm_find_dest_vcpu() for VT-d PI

2014-12-20 Thread Paolo Bonzini


On 20/12/2014 00:48, Wu, Feng wrote:
 In my understanding, lowest priority interrupts are always delivered to a
 Single CPU, we need to find the right destination CPU from the cpumask.

Yes, but which CPU however differs every time the interrupt is
delivered.  So the emulation here is a bit poor.  For now, please limit
PI to fixed interrupts.

 Actually, we don't support posting broadcast/multicast interrupts, because
 the interrupt is associated with one Posted-interrupts descriptor, then one
 vCPU.

Understood.

Paolo
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Re: [PING] [PATCH FOR v3.19 - v2] iommu/ipmmu-vmsa: change IOMMU_EXEC to IOMMU_NOEXEC

2014-12-20 Thread Laurent Pinchart
Hi Joerg,

Ping ?

On Monday 15 December 2014 20:41:13 Laurent Pinchart wrote:
 From: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
 
 Commit a720b41c41f5a7e4 (iommu/arm-smmu: change IOMMU_EXEC to
 IOMMU_NOEXEC) has inverted and replaced the IOMMU_EXEC flag with
 IOMMU_NOEXEC. Update the driver accordingly.
 
 Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
 ---
  drivers/iommu/ipmmu-vmsa.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)
 
 Changes since v1:
 
 - Rewrote the commit message
 
 Joerg, this is a compilation breakage fix for v3.19. Could you please take
 it in your tree and submit it early during the -rc cycle ?
 
 diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
 index 68dfb0f..7486931 100644
 --- a/drivers/iommu/ipmmu-vmsa.c
 +++ b/drivers/iommu/ipmmu-vmsa.c
 @@ -558,7 +558,7 @@ static pmd_t *ipmmu_alloc_pmd(struct ipmmu_vmsa_device
 *mmu, pgd_t *pgd,
 
  static u64 ipmmu_page_prot(unsigned int prot, u64 type)
  {
 - u64 pgprot = ARM_VMSA_PTE_XN | ARM_VMSA_PTE_nG | ARM_VMSA_PTE_AF
 + u64 pgprot = ARM_VMSA_PTE_nG | ARM_VMSA_PTE_AF
 
  | ARM_VMSA_PTE_SH_IS | ARM_VMSA_PTE_AP_UNPRIV
  | ARM_VMSA_PTE_NS | type;
 
 @@ -568,8 +568,8 @@ static u64 ipmmu_page_prot(unsigned int prot, u64 type)
   if (prot  IOMMU_CACHE)
   pgprot |= IMMAIR_ATTR_IDX_WBRWA  ARM_VMSA_PTE_ATTRINDX_SHIFT;
 
 - if (prot  IOMMU_EXEC)
 - pgprot = ~ARM_VMSA_PTE_XN;
 + if (prot  IOMMU_NOEXEC)
 + pgprot |= ARM_VMSA_PTE_XN;
   else if (!(prot  (IOMMU_READ | IOMMU_WRITE)))
   /* If no access create a faulting entry to avoid TLB fills. */
   pgprot = ~ARM_VMSA_PTE_PAGE;

-- 
Regards,

Laurent Pinchart

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