Re: [PATCH 3/5] dt-bindings: mediatek: Add smi dts binding
On Fri, Mar 06, 2015 at 10:48:18AM +, yong...@mediatek.com wrote:
From: Yong Wu yong...@mediatek.com
This patch add smi binding document.
Please move binding documents to the start of the series. It makes
things far easier to review.
Signed-off-by: Yong Wu yong...@mediatek.com
---
.../devicetree/bindings/soc/mediatek/mediatek,smi.txt | 17
+
1 file changed, 17 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
new file mode 100644
index 000..0fc9d1a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
@@ -0,0 +1,17 @@
+SMI hardware block diagram please help check
bindings/iommu/mediatek,iommu.txt
+
+Required properties:
+- compatible : must be mediatek,mediatek,mt8173-smi-larb
Double vendor prefix?
What does larb mean? It would be nice for the intorductory paragraph
in this file to explain.
+- reg : the register of each local arbiter
+- clocks : the clocks of each local arbiter
+- clock-name: larb_sub*(3 clockes at most)
The names required _must_ be specified here, or clock-names is
pointless.
The clock names should be from the PoV of _this_ device (i.e. they
should be the names of the inputs) not from the PoV of the provider
(i.e. they should not be the names of the outputs from the provider).
Mark.
+
+Example:
+ larb1:larb@1601 {
+ compatible = mediatek,mt8173-smi-larb;
+ reg = 0 0x1601 0 0x1000;
+ clocks = mmsys MM_SMI_COMMON,
+ vdecsys VDEC_CKEN,
+vdecsys VDEC_LARB_CKEN;
+ clock-names = larb_sub0, larb_sub1, larb_sub2;
+ };
--
1.8.1.1.dirty
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Re: [PATCH 3/5] dt-bindings: mediatek: Add smi dts binding
Hello.
On 3/6/2015 1:48 PM, yong...@mediatek.com wrote:
From: Yong Wu yong...@mediatek.com
This patch add smi binding document.
Signed-off-by: Yong Wu yong...@mediatek.com
---
.../devicetree/bindings/soc/mediatek/mediatek,smi.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
new file mode 100644
index 000..0fc9d1a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
@@ -0,0 +1,17 @@
+SMI hardware block diagram please help check
bindings/iommu/mediatek,iommu.txt
+
+Required properties:
+- compatible : must be mediatek,mediatek,mt8173-smi-larb
One mediatek, is enough. :-)
+- reg : the register of each local arbiter
+- clocks : the clocks of each local arbiter
+- clock-name: larb_sub*(3 clockes at most)
clock-names.
+
+Example:
+ larb1:larb@1601 {
+ compatible = mediatek,mt8173-smi-larb;
+ reg = 0 0x1601 0 0x1000;
+ clocks = mmsys MM_SMI_COMMON,
+ vdecsys VDEC_CKEN,
Please align with the above.
+vdecsys VDEC_LARB_CKEN;
Use tabs instead of spaces, please.
+ clock-names = larb_sub0, larb_sub1, larb_sub2;
+ };
WBR, Sergei
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[RFC PATCH 0/5] MT8173 IOMMU support
This is based on Robin Murphy's arm64: IOMMU-backed DMA mapping[1]. This patch adds support for m4u(Multimedia Memory Management Unit), Currently it only support the m4u with 2 levels of page table on mt8173. Please check the hardware block diagram of Mediatek IOMMU. EMI (External Memory Interface) | m4u (Multimedia Memory Management Unit) | smi (Smart Multimedia Interface) | +---+--- | | | | vdec larb disp larb ... SoCs have different local arbiter(larb). | | | | ++++-+-+ |||| | |... |||| | |... |||| | |... MC PP VLD OVL0 RDMA0 WDMA0 ... Normally we specify a local arbiter(larb) for each multimedia hardware like display, video decode, video encode and camera. And there are different ports in each larb. Take a example, there are some ports like MC, PP, UFO, VLD, AVC_MV, PRED_RD, PRED_WR in video larb, all the ports are according to the video hardware. From the diagram, all the multimedia module connect with m4u via smi. SMI is responsible to enable/disable iommu and control the clocks of each local arbiter. If we should enable the iommu of video decode, it should config the video's ports. And if the video hardware work wether enable/disable iommu, it should enable the clock of its larb's clock. So we add a special driver for smi. [1] http://lists.linuxfoundation.org/pipermail/iommu/2015-February/012236.html Yong Wu (5): soc: mediatek: Add SMI driver iommu/mediatek: Add mt8173 IOMMU driver dt-bindings: mediatek: Add smi dts binding dt-bindings: iommu: Add binding for mediatek IOMMU dts: mt8173: Add iommu/smi nodes for mt8173 .../devicetree/bindings/iommu/mediatek,iommu.txt | 41 ++ .../bindings/soc/mediatek/mediatek,smi.txt | 17 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 60 ++ drivers/iommu/Kconfig | 11 + drivers/iommu/Makefile | 1 + drivers/iommu/mtk_iommu.c | 754 + drivers/iommu/mtk_iommu.h | 73 ++ drivers/iommu/mtk_iommu_pagetable.c| 439 drivers/iommu/mtk_iommu_pagetable.h| 49 ++ drivers/soc/mediatek/Kconfig | 7 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mt8173-smi.c | 143 include/dt-bindings/iommu/mt8173-iommu-port.h | 127 include/linux/mtk-smi.h| 40 ++ 14 files changed, 1763 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt create mode 100644 drivers/iommu/mtk_iommu.c create mode 100644 drivers/iommu/mtk_iommu.h create mode 100644 drivers/iommu/mtk_iommu_pagetable.c create mode 100644 drivers/iommu/mtk_iommu_pagetable.h create mode 100644 drivers/soc/mediatek/mt8173-smi.c create mode 100644 include/dt-bindings/iommu/mt8173-iommu-port.h create mode 100644 include/linux/mtk-smi.h -- 1.8.1.1.dirty G:IT: [PATCH 5/5] dts: mt8173: Add iommu/smi nodes for mt8173 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH 4/5] dt-bindings: iommu: Add binding for mediatek IOMMU
On Fri, Mar 06, 2015 at 10:48:19AM +, yong...@mediatek.com wrote:
From: Yong Wu yong...@mediatek.com
This patch add mediatek iommu dts binding document.
Signed-off-by: Yong Wu yong...@mediatek.com
---
.../devicetree/bindings/iommu/mediatek,iommu.txt | 41
++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
new file mode 100644
index 000..db01c92
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
@@ -0,0 +1,41 @@
+/**/
+/*Mediatek IOMMU Hardware block diagram */
+/**/
+ EMI (External Memory Interface)
+ |
+ m4u (Multimedia Memory Management Unit)
+ |
+ smi (Smart Multimedia Interface)
+ |
++---+---
+| |
+| |
+vdec larb disp larb ... SoCs have different local
arbiter(larb).
+| |
+| |
+ ++++-+-+
+ |||| | |...
+ |||| | |...
+ |||| | |...
+ MC PP VLD OVL0 RDMA0 WDMA0 ... There are different ports in each
larb.
+
+Required properties:
+- compatible : must be mediatek,mt8173-iommu
s/iommu/m4u/ -- the name should match what the hardware is called.
+- reg : m4u register base
... and size
+- interrupts : must contain the interrupts from each internal translation
unit
How many internal translation units are there?
How should the interrupts be ordered?
How do these relate to the larbs?
+- clocks : must contain one entry for each clock-name
+- clock-name: m4u clock
This does not match the example.
s/clock-name/clock-names/
Please format this like a list, with names quoted, e.g.
- clock-names: must contain:
* m4u - The functional clock for the m4u
+- larb : must contain the larbes of current platform
s/larbes/local arbiters/
How should these be ordered? Surely there's a relationship with
registers/interrupts/etc in this unit?
+- iommu-cells : must be 1. Specifies the client PortID as defined in
+dt-binding/iommu/mt**-iommu-port.h
Give the absolute filename.
The include file should be added in this patch (it's part of the
binding). The whole patch should be moved earlier in the series.
Thanks,
Mark.
+
+Example:
+ iommu: mmsys_iommu@10205000 {
+ compatible = mediatek,mt8173-iommu;
+ reg = 0 0x10205000 0 0x1000;
+ interrupts = GIC_SPI 139 IRQ_TYPE_LEVEL_LOW;
+ clocks = infrasys INFRA_M4U;
+ clock-names = infra_m4u;
+ larb = larb0 larb1 larb2 larb3 larb4 larb5;
+ #iommu-cells = 1;
+ };
\ No newline at end of file
--
1.8.1.1.dirty
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Re: [PATCH 1/2] iommu: move pgsize_bitmap from struct iommu_ops to struct iommu_domain
Hello,
On 2015-03-06 12:34, Will Deacon wrote:
struct iommu_ops contains function pointers for IOMMU driver callbacks
in order to implement the core IOMMU API. Amongst these pointers is
an unsigned long pgsize_bitmap field, which is problematic because the
set of supported page sizes is not necessarily the same across all
instances of a given IOMMU type in the system. Furthermore, the set of
supported page sizes may be restricted following domain initialisation
when a particular page table format is chosen for the domain.
This patch moves the field from iommu_ops into the iommu_domain and
updates all users accordingly.
Signed-off-by: Will Deacon will.dea...@arm.com
For the exynos iommu part:
Acked-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/amd_iommu.c | 2 +-
drivers/iommu/arm-smmu.c| 12 +---
drivers/iommu/exynos-iommu.c| 3 ++-
drivers/iommu/intel-iommu.c | 2 +-
drivers/iommu/iommu.c | 16
drivers/iommu/ipmmu-vmsa.c | 2 +-
drivers/iommu/msm_iommu.c | 3 ++-
drivers/iommu/omap-iommu.c | 3 ++-
drivers/iommu/rockchip-iommu.c | 2 +-
drivers/iommu/shmobile-iommu.c | 2 +-
drivers/iommu/tegra-gart.c | 2 +-
drivers/iommu/tegra-smmu.c | 3 +--
drivers/vfio/vfio_iommu_type1.c | 2 +-
include/linux/iommu.h | 6 +-
14 files changed, 28 insertions(+), 32 deletions(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 48882c126245..83d9e500f737 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -3257,6 +3257,7 @@ static int amd_iommu_domain_init(struct iommu_domain *dom)
dom-geometry.aperture_end = ~0ULL;
dom-geometry.force_aperture = true;
+ dom-pgsize_bitmap = AMD_IOMMU_PGSIZES;
return 0;
out_free:
@@ -3428,7 +3429,6 @@ static const struct iommu_ops amd_iommu_ops = {
.unmap = amd_iommu_unmap,
.map_sg = default_iommu_map_sg,
.iova_to_phys = amd_iommu_iova_to_phys,
- .pgsize_bitmap = AMD_IOMMU_PGSIZES,
};
/*
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index fc13dd56953e..16980001e73d 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -287,6 +287,7 @@ struct arm_smmu_device {
void __iomem*base;
unsigned long size;
unsigned long pgshift;
+ unsigned long pgsize_bitmap;
#define ARM_SMMU_FEAT_COHERENT_WALK (1 0)
#define ARM_SMMU_FEAT_STREAM_MATCH(1 1)
@@ -345,8 +346,6 @@ struct arm_smmu_domain {
struct mutexinit_mutex; /* Protects smmu pointer */
};
-static struct iommu_ops arm_smmu_ops;
-
static DEFINE_SPINLOCK(arm_smmu_devices_lock);
static LIST_HEAD(arm_smmu_devices);
@@ -911,7 +910,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
}
pgtbl_cfg = (struct io_pgtable_cfg) {
- .pgsize_bitmap = arm_smmu_ops.pgsize_bitmap,
+ .pgsize_bitmap = smmu-pgsize_bitmap,
.ias= ias,
.oas= oas,
.tlb= arm_smmu_gather_ops,
@@ -925,7 +924,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain
*domain,
}
/* Update our support page sizes to reflect the page table format */
- arm_smmu_ops.pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
+ domain-pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
/* Initialise the context bank with our page table cfg */
arm_smmu_init_context_bank(smmu_domain, pgtbl_cfg);
@@ -1430,7 +1429,7 @@ out_unlock:
return ret;
}
-static struct iommu_ops arm_smmu_ops = {
+static const struct iommu_ops arm_smmu_ops = {
.capable= arm_smmu_capable,
.domain_init= arm_smmu_domain_init,
.domain_destroy = arm_smmu_domain_destroy,
@@ -1444,7 +1443,6 @@ static struct iommu_ops arm_smmu_ops = {
.remove_device = arm_smmu_remove_device,
.domain_get_attr= arm_smmu_domain_get_attr,
.domain_set_attr= arm_smmu_domain_set_attr,
- .pgsize_bitmap = -1UL, /* Restricted during device attach */
};
static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
@@ -1648,7 +1646,7 @@ static int arm_smmu_device_cfg_probe(struct
arm_smmu_device *smmu)
size |= SZ_64K | SZ_512M;
}
- arm_smmu_ops.pgsize_bitmap = size;
+ smmu-pgsize_bitmap = size;
dev_notice(smmu-dev, \tSupported page sizes: 0x%08lx\n, size);
if (smmu-features ARM_SMMU_FEAT_TRANS_S1)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 7ce52737c7a1..404cad25db9b 100644
--- a/drivers/iommu/exynos-iommu.c
+++
[PATCH 1/5] soc: mediatek: Add SMI driver
From: Yong Wu yong...@mediatek.com
This patch add SMI(Smart Multimedia Interface) driver. This driver
is responsible to enable/disable iommu and control the clocks of each
local arbiter.
Signed-off-by: Yong Wu yong...@mediatek.com
---
drivers/soc/mediatek/Kconfig | 7 ++
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mt8173-smi.c | 143 ++
include/linux/mtk-smi.h | 40 +++
4 files changed, 191 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8173-smi.c
create mode 100644 include/linux/mtk-smi.h
diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
index 729f93e..27fb26c 100644
--- a/drivers/soc/mediatek/Kconfig
+++ b/drivers/soc/mediatek/Kconfig
@@ -20,3 +20,10 @@ config MT8173_PMIC_WRAP
PMIC wrapper is a proprietary hardware in MT8173 to make
communication protocols to access PMIC device.
This driver implement access protocols for MT8173.
+
+config MTK_SMI
+bool
+ help
+ Smi help enable/disable iommu in mt8173 and control the
+ clock of each local arbiter.
+ It should be true while MTK_IOMMU enable.
diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
index 9b5709b..cdfe95c 100644
--- a/drivers/soc/mediatek/Makefile
+++ b/drivers/soc/mediatek/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_MT8135_PMIC_WRAP) += mt8135-pmic-wrap.o
obj-$(CONFIG_MT8173_PMIC_WRAP) += mt8173-pmic-wrap.o
+obj-$(CONFIG_MTK_SMI) += mt8173-smi.o
diff --git a/drivers/soc/mediatek/mt8173-smi.c
b/drivers/soc/mediatek/mt8173-smi.c
new file mode 100644
index 000..4e3fab9
--- /dev/null
+++ b/drivers/soc/mediatek/mt8173-smi.c
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2014-2015 MediaTek Inc.
+ * Author: Yong Wu yong...@mediatek.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include linux/io.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/clk.h
+#include linux/err.h
+#include linux/mm.h
+
+#define SMI_LARB_MMU_EN (0xf00)
+#define F_SMI_MMU_EN(port) (1 (port))
+
+struct mtk_smi_larb {
+ void __iomem *larb_base;
+ struct clk *larb_clk[3];/* each larb has 3 clk at most */
+};
+
+static const char * const mtk_smi_clk_name[] = {
+ larb_sub0, larb_sub1, larb_sub2
+};
+
+static const struct of_device_id mtk_smi_of_ids[] = {
+ { .compatible = mediatek,mt8173-smi-larb,
+ },
+ {}
+};
+
+int mtk_smi_larb_get(struct platform_device *plarbdev)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int i, ret = 0;
+
+ for (i = 0; i 3; i++)
+ if (larbpriv-larb_clk[i]) {
+ ret = clk_prepare_enable(larbpriv-larb_clk[i]);
+ if (ret) {
+ dev_err(plarbdev-dev,
+ failed to enable larbclk%d:%d\n,
+ i, ret);
+ break;
+ }
+ }
+ return ret;
+}
+
+void mtk_smi_larb_put(struct platform_device *plarbdev)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int i;
+
+ for (i = 2; i = 0; i--)
+ if (larbpriv-larb_clk[i])
+ clk_disable_unprepare(larbpriv-larb_clk[i]);
+}
+
+int mtk_smi_config_port(struct platform_device *plarbdev,
+ unsigned int larbportid)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int ret;
+ u32 reg;
+
+ ret = mtk_smi_larb_get(plarbdev);
+ if (ret)
+ return ret;
+
+ reg = readl(larbpriv-larb_base + SMI_LARB_MMU_EN);
+ reg = ~F_SMI_MMU_EN(larbportid);
+ reg |= F_SMI_MMU_EN(larbportid);
+ writel(reg, larbpriv-larb_base + SMI_LARB_MMU_EN);
+
+ mtk_smi_larb_put(plarbdev);
+
+ return 0;
+}
+
+static int mtk_smi_probe(struct platform_device *pdev)
+{
+ struct mtk_smi_larb *larbpriv;
+ struct resource *res;
+ struct device *dev = pdev-dev;
+ unsigned int i;
+
+ larbpriv = devm_kzalloc(dev, sizeof(struct mtk_smi_larb), GFP_KERNEL);
+ if (!larbpriv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ larbpriv-larb_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(larbpriv-larb_base)) {
+ dev_err(dev, larbbase %p err\n, larbpriv-larb_base);
+
[PATCH 2/2] iommu: of: enforce const-ness of struct iommu_ops
From: Robin Murphy robin.mur...@arm.com
With the pgsize_bitmap removed, there is no compelling reason for
the remaining callbacks in struct iommu_ops to be mutable, so enforce
const-ness throughout the core code.
Signed-off-by: Robin Murphy robin.mur...@arm.com
Signed-off-by: Will Deacon will.dea...@arm.com
---
arch/arm/include/asm/dma-mapping.h | 2 +-
arch/arm/mm/dma-mapping.c| 6 +++---
arch/arm64/include/asm/dma-mapping.h | 3 ++-
drivers/iommu/of_iommu.c | 12 ++--
drivers/of/platform.c| 2 +-
include/linux/dma-mapping.h | 2 +-
include/linux/of_iommu.h | 8
7 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/dma-mapping.h
b/arch/arm/include/asm/dma-mapping.h
index b52101d37ec7..c366edc22d02 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -123,7 +123,7 @@ static inline unsigned long dma_max_pfn(struct device *dev)
#define arch_setup_dma_ops arch_setup_dma_ops
extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
- struct iommu_ops *iommu, bool coherent);
+ const struct iommu_ops *iommu, bool coherent);
#define arch_teardown_dma_ops arch_teardown_dma_ops
extern void arch_teardown_dma_ops(struct device *dev);
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 170a116d1b29..fd3134fd0c89 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2020,7 +2020,7 @@ static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool
coherent)
}
static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
- struct iommu_ops *iommu)
+ const struct iommu_ops *iommu)
{
struct dma_iommu_mapping *mapping;
@@ -2058,7 +2058,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev)
#else
static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
- struct iommu_ops *iommu)
+ const struct iommu_ops *iommu)
{
return false;
}
@@ -2075,7 +2075,7 @@ static struct dma_map_ops *arm_get_dma_map_ops(bool
coherent)
}
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
- struct iommu_ops *iommu, bool coherent)
+ const struct iommu_ops *iommu, bool coherent)
{
struct dma_map_ops *dma_ops;
diff --git a/arch/arm64/include/asm/dma-mapping.h
b/arch/arm64/include/asm/dma-mapping.h
index 6932bb57dba0..2fbf8570d9bc 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -46,7 +46,8 @@ static inline struct dma_map_ops *get_dma_ops(struct device
*dev)
}
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64
size,
- struct iommu_ops *iommu, bool coherent)
+ const struct iommu_ops *iommu,
+ bool coherent)
{
dev-archdata.dma_coherent = coherent;
}
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
index af1dc6a1c0a1..17d39b419e7b 100644
--- a/drivers/iommu/of_iommu.c
+++ b/drivers/iommu/of_iommu.c
@@ -98,12 +98,12 @@ EXPORT_SYMBOL_GPL(of_get_dma_window);
struct of_iommu_node {
struct list_head list;
struct device_node *np;
- struct iommu_ops *ops;
+ const struct iommu_ops *ops;
};
static LIST_HEAD(of_iommu_list);
static DEFINE_SPINLOCK(of_iommu_lock);
-void of_iommu_set_ops(struct device_node *np, struct iommu_ops *ops)
+void of_iommu_set_ops(struct device_node *np, const struct iommu_ops *ops)
{
struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
@@ -118,10 +118,10 @@ void of_iommu_set_ops(struct device_node *np, struct
iommu_ops *ops)
spin_unlock(of_iommu_lock);
}
-struct iommu_ops *of_iommu_get_ops(struct device_node *np)
+const struct iommu_ops *of_iommu_get_ops(struct device_node *np)
{
struct of_iommu_node *node;
- struct iommu_ops *ops = NULL;
+ const struct iommu_ops *ops = NULL;
spin_lock(of_iommu_lock);
list_for_each_entry(node, of_iommu_list, list)
@@ -133,11 +133,11 @@ struct iommu_ops *of_iommu_get_ops(struct device_node *np)
return ops;
}
-struct iommu_ops *of_iommu_configure(struct device *dev)
+const struct iommu_ops *of_iommu_configure(struct device *dev)
{
struct of_phandle_args iommu_spec;
struct device_node *np;
- struct iommu_ops *ops = NULL;
+ const struct iommu_ops *ops = NULL;
int idx = 0;
/*
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index b189733a1539..d7df0ea4f14b 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -167,7 +167,7 @@ static void
[PATCH 0/2] Kill off pgsize_bitmap field from struct iommu_ops
Hi all, These patches move the pgsize_bitmap field out of iommu_ops and into the iommu_domain structure, as there are systems containing multiple instances of a given IOMMU (e.g. the ARM SMMU) with different page size support on the individual devices. Once that's done, we can get back to treating the iommu_ops as constant, since they just contain function pointers. Comments welcome, Will ---8 Robin Murphy (1): iommu: of: enforce const-ness of struct iommu_ops Will Deacon (1): iommu: move pgsize_bitmap from struct iommu_ops to struct iommu_domain arch/arm/include/asm/dma-mapping.h | 2 +- arch/arm/mm/dma-mapping.c| 6 +++--- arch/arm64/include/asm/dma-mapping.h | 3 ++- drivers/iommu/amd_iommu.c| 2 +- drivers/iommu/arm-smmu.c | 12 +--- drivers/iommu/exynos-iommu.c | 3 ++- drivers/iommu/intel-iommu.c | 2 +- drivers/iommu/iommu.c| 16 drivers/iommu/ipmmu-vmsa.c | 2 +- drivers/iommu/msm_iommu.c| 3 ++- drivers/iommu/of_iommu.c | 12 ++-- drivers/iommu/omap-iommu.c | 3 ++- drivers/iommu/rockchip-iommu.c | 2 +- drivers/iommu/shmobile-iommu.c | 2 +- drivers/iommu/tegra-gart.c | 2 +- drivers/iommu/tegra-smmu.c | 3 +-- drivers/of/platform.c| 2 +- drivers/vfio/vfio_iommu_type1.c | 2 +- include/linux/dma-mapping.h | 2 +- include/linux/iommu.h| 6 +- include/linux/of_iommu.h | 8 21 files changed, 46 insertions(+), 49 deletions(-) -- 2.1.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v5 0/4] vfio: type1: support for ARM SMMUS with VFIO_IOMMU_TYPE1
On 03/05/2015 10:11 PM, Alex Williamson wrote: On Thu, 2015-03-05 at 18:34 +0100, Eric Auger wrote: Hi All, Ironically, since the correction of the IOMMU_CAP_CACHE_COHERENCY bug (https://lkml.org/lkml/2015/1/29/514) in vfio_iommu_type1.c, my Calxeda Midway VFIO use case is not working anymore. This is also observable when I do not apply at all the whole [PATCH v5 0/4] vfio: type1: support for ARM SMMUS with VFIO_IOMMU_TYPE1 series. My understanding is this series should not be requested for me since my xgmac device does not care about the XN attribute. This also raises the concern that we're continuing to put optional features as prerequisites to base vfio-platform support and creating self-induced stalls at getting anything upstream :-\ Thanks, Dear all, Thanks Alex, Will for your inputs on this topic. Yes to me vfio: type1: support for ARM SMMUS with VFIO_IOMMU_TYPE1 is not a direct dependency of vfio-platform driver although I understand Baptiste needs it to test with PL330 device. On my side I can test vfio-platform driver without it, assigning the Midway Calxeda xgmac. Also if I am not wrong the title of the series now does not really reflect anymore what the series aims at. since [PATCH v3 2/6] vfio: type1: support for ARM SMMUs withdrawal, the series now only aims at supporting the VFIO_DMA_MAP_FLAG_NOEXEC flag. However with this issue of IOMMU_CACHE always set along with arm-smmu, there is a need for an adaptation of either vfio_iommu_type1 or arm-smmu since the integrated pieces are not functional. On top of the dma-coherent property of the *master*, should not we also query the cache-coherent property of the interconnect downstream to the smmu? How can we progress quickly on this topic? is it acceptable to return false on arm_smmu_capable(IOMMU_CAP_CACHE_COHERENCY) as a quick hack? As a longer term solution, would it make sense to add a user flag at VFIO user API level to turn the IOMMU_CACHE on? Best Regards Eric Best Regards Eric Best Regards Eric Alex ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 1/5] soc: mediatek: Add SMI driver
From: Yong Wu yong...@mediatek.com
This patch add SMI(Smart Multimedia Interface) driver. This driver is
responsible to enable/disable iommu and control the clocks of each
local arbiter.
Signed-off-by: Yong Wu yong...@mediatek.com
---
drivers/soc/mediatek/Kconfig | 7 ++
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mt8173-smi.c | 143 ++
include/linux/mtk-smi.h | 40 +++
4 files changed, 191 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8173-smi.c
create mode 100644 include/linux/mtk-smi.h
diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
index 729f93e..27fb26c 100644
--- a/drivers/soc/mediatek/Kconfig
+++ b/drivers/soc/mediatek/Kconfig
@@ -20,3 +20,10 @@ config MT8173_PMIC_WRAP
PMIC wrapper is a proprietary hardware in MT8173 to make
communication protocols to access PMIC device.
This driver implement access protocols for MT8173.
+
+config MTK_SMI
+bool
+ help
+ Smi help enable/disable iommu in mt8173 and control the
+ clock of each local arbiter.
+ It should be true while MTK_IOMMU enable.
diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
index 9b5709b..cdfe95c 100644
--- a/drivers/soc/mediatek/Makefile
+++ b/drivers/soc/mediatek/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_MT8135_PMIC_WRAP) += mt8135-pmic-wrap.o
obj-$(CONFIG_MT8173_PMIC_WRAP) += mt8173-pmic-wrap.o
+obj-$(CONFIG_MTK_SMI) += mt8173-smi.o
diff --git a/drivers/soc/mediatek/mt8173-smi.c
b/drivers/soc/mediatek/mt8173-smi.c
new file mode 100644
index 000..4e3fab9
--- /dev/null
+++ b/drivers/soc/mediatek/mt8173-smi.c
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2014-2015 MediaTek Inc.
+ * Author: Yong Wu yong...@mediatek.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include linux/io.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/clk.h
+#include linux/err.h
+#include linux/mm.h
+
+#define SMI_LARB_MMU_EN (0xf00)
+#define F_SMI_MMU_EN(port) (1 (port))
+
+struct mtk_smi_larb {
+ void __iomem *larb_base;
+ struct clk *larb_clk[3];/* each larb has 3 clk at most */
+};
+
+static const char * const mtk_smi_clk_name[] = {
+ larb_sub0, larb_sub1, larb_sub2
+};
+
+static const struct of_device_id mtk_smi_of_ids[] = {
+ { .compatible = mediatek,mt8173-smi-larb,
+ },
+ {}
+};
+
+int mtk_smi_larb_get(struct platform_device *plarbdev)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int i, ret = 0;
+
+ for (i = 0; i 3; i++)
+ if (larbpriv-larb_clk[i]) {
+ ret = clk_prepare_enable(larbpriv-larb_clk[i]);
+ if (ret) {
+ dev_err(plarbdev-dev,
+ failed to enable larbclk%d:%d\n,
+ i, ret);
+ break;
+ }
+ }
+ return ret;
+}
+
+void mtk_smi_larb_put(struct platform_device *plarbdev)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int i;
+
+ for (i = 2; i = 0; i--)
+ if (larbpriv-larb_clk[i])
+ clk_disable_unprepare(larbpriv-larb_clk[i]);
+}
+
+int mtk_smi_config_port(struct platform_device *plarbdev,
+ unsigned int larbportid)
+{
+ struct mtk_smi_larb *larbpriv = dev_get_drvdata(plarbdev-dev);
+ int ret;
+ u32 reg;
+
+ ret = mtk_smi_larb_get(plarbdev);
+ if (ret)
+ return ret;
+
+ reg = readl(larbpriv-larb_base + SMI_LARB_MMU_EN);
+ reg = ~F_SMI_MMU_EN(larbportid);
+ reg |= F_SMI_MMU_EN(larbportid);
+ writel(reg, larbpriv-larb_base + SMI_LARB_MMU_EN);
+
+ mtk_smi_larb_put(plarbdev);
+
+ return 0;
+}
+
+static int mtk_smi_probe(struct platform_device *pdev)
+{
+ struct mtk_smi_larb *larbpriv;
+ struct resource *res;
+ struct device *dev = pdev-dev;
+ unsigned int i;
+
+ larbpriv = devm_kzalloc(dev, sizeof(struct mtk_smi_larb), GFP_KERNEL);
+ if (!larbpriv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ larbpriv-larb_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(larbpriv-larb_base)) {
+ dev_err(dev, larbbase %p err\n, larbpriv-larb_base);
+ return
[PATCH 3/5] dt-bindings: mediatek: Add smi dts binding
From: Yong Wu yong...@mediatek.com
This patch add smi binding document.
Signed-off-by: Yong Wu yong...@mediatek.com
---
.../devicetree/bindings/soc/mediatek/mediatek,smi.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
new file mode 100644
index 000..0fc9d1a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt
@@ -0,0 +1,17 @@
+SMI hardware block diagram please help check
bindings/iommu/mediatek,iommu.txt
+
+Required properties:
+- compatible : must be mediatek,mediatek,mt8173-smi-larb
+- reg : the register of each local arbiter
+- clocks : the clocks of each local arbiter
+- clock-name: larb_sub*(3 clockes at most)
+
+Example:
+ larb1:larb@1601 {
+ compatible = mediatek,mt8173-smi-larb;
+ reg = 0 0x1601 0 0x1000;
+ clocks = mmsys MM_SMI_COMMON,
+ vdecsys VDEC_CKEN,
+vdecsys VDEC_LARB_CKEN;
+ clock-names = larb_sub0, larb_sub1, larb_sub2;
+ };
--
1.8.1.1.dirty
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[RFC PATCH 0/5] MT8173 IOMMU support
This is based on Robin Murphy's arm64: IOMMU-backed DMA mapping[1]. This patch adds support for m4u(Multimedia Memory Management Unit), Currently it only support the m4u with 2 levels of page table on mt8173. Please check the hardware block diagram of Mediatek IOMMU. EMI (External Memory Interface) | m4u (Multimedia Memory Management Unit) | smi (Smart Multimedia Interface) | +---+--- | | | | vdec larb disp larb ... SoCs have different local arbiter(larb). | | | | ++++-+-+ |||| | |... |||| | |... |||| | |... MC PP VLD OVL0 RDMA0 WDMA0 ... Normally we specify a local arbiter(larb) for each multimedia hardware like display, video decode, video encode and camera. And there are different ports in each larb. Take a example, there are some ports like MC, PP, UFO, VLD, AVC_MV, PRED_RD, PRED_WR in video larb, all the ports are according to the video hardware. From the diagram, all the multimedia module connect with m4u via smi. SMI is responsible to enable/disable iommu and control the clocks of each local arbiter. If we should enable the iommu of video decode, it should config the video's ports. And if the video hardware work wether enable/disable iommu, it should enable the clock of its larb's clock. So we add a special driver for smi. [1] http://lists.linuxfoundation.org/pipermail/iommu/2015-February/012236.html Yong Wu (5): soc: mediatek: Add SMI driver iommu/mediatek: Add mt8173 IOMMU driver dt-bindings: mediatek: Add smi dts binding dt-bindings: iommu: Add binding for mediatek IOMMU dts: mt8173: Add iommu/smi nodes for mt8173 .../devicetree/bindings/iommu/mediatek,iommu.txt | 41 ++ .../bindings/soc/mediatek/mediatek,smi.txt | 17 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 60 ++ drivers/iommu/Kconfig | 11 + drivers/iommu/Makefile | 1 + drivers/iommu/mtk_iommu.c | 754 + drivers/iommu/mtk_iommu.h | 73 ++ drivers/iommu/mtk_iommu_pagetable.c| 439 drivers/iommu/mtk_iommu_pagetable.h| 49 ++ drivers/soc/mediatek/Kconfig | 7 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mt8173-smi.c | 143 include/dt-bindings/iommu/mt8173-iommu-port.h | 127 include/linux/mtk-smi.h| 40 ++ 14 files changed, 1763 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,smi.txt create mode 100644 drivers/iommu/mtk_iommu.c create mode 100644 drivers/iommu/mtk_iommu.h create mode 100644 drivers/iommu/mtk_iommu_pagetable.c create mode 100644 drivers/iommu/mtk_iommu_pagetable.h create mode 100644 drivers/soc/mediatek/mt8173-smi.c create mode 100644 include/dt-bindings/iommu/mt8173-iommu-port.h create mode 100644 include/linux/mtk-smi.h -- 1.8.1.1.dirty ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH 1/5] soc: mediatek: Add SMI driver
On Fri, 2015-03-06 at 18:48 +0800, yong...@mediatek.com wrote: --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -20,3 +20,10 @@ config MT8173_PMIC_WRAP PMIC wrapper is a proprietary hardware in MT8173 to make communication protocols to access PMIC device. This driver implement access protocols for MT8173. + +config MTK_SMI +bool Nit: make this one tab instead of 8 spaces, please. + help + Smi help enable/disable iommu in mt8173 and control the + clock of each local arbiter. + It should be true while MTK_IOMMU enable. I don't think anyone using the *config tools will ever see this text, as there's no prompt. So you might as well make this a comment or drop it altogether. Is this selected by more than just MTK_IOMMU (see 2/5)? If not, I think MTK_SMI will be set and unset in lockstep with MTK_IOMMU. In other words, you could as well use one Kconfig symbol. Thanks, Paul Bolle ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH 2/5] iommu/mediatek: Add mt8173 IOMMU driver
On Fri, Mar 06 2015 at 02:48:17 AM, yong...@mediatek.com wrote:
From: Yong Wu yong...@mediatek.com
This patch adds support for mediatek m4u (MultiMedia Memory Management Unit).
Currently this only supports m4u gen 2 with 2 levels of page table on mt8173.
[...]
+static int mtk_iommu_invalidate_tlb(const struct mtk_iommu_info *piommu,
+ int isinvall, unsigned int iova_start,
+ unsigned int iova_end)
+{
+ void __iomem *m4u_base = piommu-m4u_base;
+ u32 val;
+ u64 start, end;
+
+ start = sched_clock();
+
+ if (!isinvall) {
+ iova_start = round_down(iova_start, SZ_4K);
+ iova_end = round_up(iova_end, SZ_4K);
+ }
+
+ val = F_MMU_INV_EN_L2 | F_MMU_INV_EN_L1;
+
+ writel(val, m4u_base + REG_INVLID_SEL);
+
+ if (isinvall) {
+ writel(F_MMU_INV_ALL, m4u_base + REG_MMU_INVLD);
+ } else {
+ writel(iova_start, m4u_base + REG_MMU_INVLD_SA);
+ writel(iova_end, m4u_base + REG_MMU_INVLD_EA);
+ writel(F_MMU_INV_RANGE, m4u_base + REG_MMU_INVLD);
+
+ while (!readl(m4u_base + REG_MMU_CPE_DONE)) {
+ end = sched_clock();
+ if (end - start = 1ULL) {
+ dev_warn(piommu-dev, invalid don't done\n);
+ writel(F_MMU_INV_ALL, m4u_base + REG_MMU_INVLD);
+ }
+ };
Superfluous `;'. Also, maybe you should be using readl_poll_timeout?
+ writel(0, m4u_base + REG_MMU_CPE_DONE);
+ }
+
+ return 0;
+}
-Mitch
--
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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