Re: [PATCH v2 2/4] dt-bindings: iommu: rockchip: Add compatible for v2
On Thu, Apr 22, 2021 at 04:16:00PM +0200, Benjamin Gaignard wrote: > Add compatible for the second version of IOMMU hardware block. > RK356x IOMMU can also be link to a power domain. > > Signed-off-by: Benjamin Gaignard > --- > version 2: > - Add power-domains property > > .../devicetree/bindings/iommu/rockchip,iommu.yaml | 7 ++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > index 0db208cf724a..e54353ccd1ec 100644 > --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > @@ -19,7 +19,9 @@ description: |+ > > properties: >compatible: > -const: rockchip,iommu > +enum: > + - rockchip,iommu > + - rockchip,iommu-v2 This should be SoC specific. > >reg: > minItems: 1 > @@ -46,6 +48,9 @@ properties: >"#iommu-cells": > const: 0 > > + power-domains: > +maxItems: 1 > + >rockchip,disable-mmu-reset: > $ref: /schemas/types.yaml#/definitions/flag > description: | > -- > 2.25.1 > ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v2] iommu/vt-d: Force to flush iotlb before creating superpage
> On Apr 15, 2021, at 7:13 AM, Joerg Roedel wrote:
>
> On Thu, Apr 15, 2021 at 08:46:28AM +0800, Longpeng(Mike) wrote:
>> Fixes: 6491d4d02893 ("intel-iommu: Free old page tables before creating
>> superpage")
>> Cc: # v3.0+
>> Link:
>> https://lore.kernel.org/linux-iommu/670baaf8-4ff8-4e84-4be3-030b95ab5...@huawei.com/
>> Suggested-by: Lu Baolu
>> Signed-off-by: Longpeng(Mike)
>> ---
>> v1 -> v2:
>> - add Joerg
>> - reconstruct the solution base on the Baolu's suggestion
>> ---
>> drivers/iommu/intel/iommu.c | 52
>> +
>> 1 file changed, 38 insertions(+), 14 deletions(-)
>
> Applied, thanks.
>
Err.. There is a bug in my patch, and some other problem. I will
investigate and get back to you.
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Re: [PATCH v2 1/4] dt-bindings: iommu: rockchip: Convert IOMMU to DT schema
On Thu, Apr 22, 2021 at 02:16:53PM -0300, Ezequiel Garcia wrote:
> (Adding Kever)
>
> Hi Benjamin,
>
> Thanks a lot for working on this, it looks amazing. Together with the great
> work
> that Rockchip is doing, it seems RK3566/RK3568 will have decent support very
> soon.
>
> One comment here:
>
> On Thu, 2021-04-22 at 16:15 +0200, Benjamin Gaignard wrote:
> > Convert Rockchip IOMMU to DT schema
> >
> > Signed-off-by: Benjamin Gaignard
> > ---
> > version 2:
> > - Change maintainer
> > - Change reg maxItems
> > - Change interrupt maxItems
> >
> > .../bindings/iommu/rockchip,iommu.txt | 38 -
> > .../bindings/iommu/rockchip,iommu.yaml | 79 +++
> > 2 files changed, 79 insertions(+), 38 deletions(-)
> > delete mode 100644
> > Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
> > create mode 100644
> > Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
> > b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
> > deleted file mode 100644
> > index 6ecefea1c6f9..
> > --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
> > +++ /dev/null
> > @@ -1,38 +0,0 @@
> > -Rockchip IOMMU
> > -==
> > -
> > -A Rockchip DRM iommu translates io virtual addresses to physical addresses
> > for
> > -its master device. Each slave device is bound to a single master device,
> > and
> > -shares its clocks, power domain and irq.
> > -
> > -Required properties:
> > -- compatible : Should be "rockchip,iommu"
> > -- reg : Address space for the configuration registers
> > -- interrupts : Interrupt specifier for the IOMMU instance
> > -- interrupt-names : Interrupt name for the IOMMU instance
> > -- #iommu-cells : Should be <0>. This indicates the iommu is a
> > - "single-master" device, and needs no additional
> > information
> > - to associate with its master device. See:
> > - Documentation/devicetree/bindings/iommu/iommu.txt
> > -- clocks : A list of clocks required for the IOMMU to be
> > accessible by
> > - the host CPU.
> > -- clock-names : Should contain the following:
> > - "iface" - Main peripheral bus clock (PCLK/HCL) (required)
> > - "aclk" - AXI bus clock (required)
> > -
> > -Optional properties:
> > -- rockchip,disable-mmu-reset : Don't use the mmu reset operation.
> > - Some mmu instances may produce unexpected
> > results
> > - when the reset operation is used.
> > -
> > -Example:
> > -
> > - vopl_mmu: iommu@ff940300 {
> > - compatible = "rockchip,iommu";
> > - reg = <0xff940300 0x100>;
> > - interrupts = ;
> > - interrupt-names = "vopl_mmu";
> > - clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
> > - clock-names = "aclk", "iface";
> > - #iommu-cells = <0>;
> > - };
> > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> > b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> > new file mode 100644
> > index ..0db208cf724a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> > @@ -0,0 +1,79 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Rockchip IOMMU
> > +
> > +maintainers:
> > + - Heiko Stuebner
> > +
> > +description: |+
> > + A Rockchip DRM iommu translates io virtual addresses to physical
> > addresses for
> > + its master device. Each slave device is bound to a single master device
> > and
> > + shares its clocks, power domain and irq.
> > +
> > + For information on assigning IOMMU controller to its peripheral devices,
> > + see generic IOMMU bindings.
> > +
> > +properties:
> > + compatible:
> > + const: rockchip,iommu
> > +
> > + reg:
> > + minItems: 1
> > + maxItems: 2
> > +
> > + interrupts:
> > + minItems: 1
> > + maxItems: 2
> > +
> > + interrupt-names:
> > + minItems: 1
> > + maxItems: 2
> > +
>
> AFAICS, the driver supports handling multiple MMUs, and there's one reg and
> interrupt cell for each MMU. IOW, there's no requirement that maxItems is 2.
>
> Is there any way we can describe that? Or maybe just allow a bigger maximum?
With #iommu-cells == 0, how would one distinguish which IOMMU is
associated with a device? IOW, is more that 1 really usable?
If you need more just pick a maxItems value that's either the most seen
or 'should be enough'TM. If the entries are just multiple instances of
the same thing, please note that here.
Rob
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[git pull] IOMMU Updates for Linux v5.13
Hi Linus,
The following changes since commit d434405aaab7d0ebc516b68a8fc4100922d7f5ef:
Linux 5.12-rc7 (2021-04-11 15:16:13 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-updates-v5.13
for you to fetch changes up to 2d471b20c55e13c98d1dba413bf2de618e89cdac:
iommu: Streamline registration interface (2021-04-16 17:20:45 +0200)
IOMMU Updates for Linux v5.13
Including:
- Big cleanup of almost unsused parts of the IOMMU API by
Christoph Hellwig. This mostly affects the Freescale PAMU
driver.
- New IOMMU driver for Unisoc SOCs
- ARM SMMU Updates from Will:
- SMMUv3: Drop vestigial PREFETCH_ADDR support
- SMMUv3: Elide TLB sync logic for empty gather
- SMMUv3: Fix "Service Failure Mode" handling
- SMMUv2: New Qualcomm compatible string
- Removal of the AMD IOMMU performance counter writeable check
on AMD. It caused long boot delays on some machines and is
only needed to work around an errata on some older (possibly
pre-production) chips. If someone is still hit by this
hardware issue anyway the performance counters will just
return 0.
- Support for targeted invalidations in the AMD IOMMU driver.
Before that the driver only invalidated a single 4k page or the
whole IO/TLB for an address space. This has been extended now
and is mostly useful for emulated AMD IOMMUs.
- Several fixes for the Shared Virtual Memory support in the
Intel VT-d driver
- Mediatek drivers can now be built as modules
- Re-introduction of the forcedac boot option which got lost
when converting the Intel VT-d driver to the common dma-iommu
implementation.
- Extension of the IOMMU device registration interface and
support iommu_ops to be const again when drivers are built as
modules.
Christoph Hellwig (23):
iommu: remove the unused domain_window_disable method
iommu/fsl_pamu: remove fsl_pamu_get_domain_attr
iommu/fsl_pamu: remove support for setting DOMAIN_ATTR_GEOMETRY
iommu/fsl_pamu: merge iommu_alloc_dma_domain into fsl_pamu_domain_alloc
iommu/fsl_pamu: remove support for multiple windows
iommu/fsl_pamu: remove ->domain_window_enable
iommu/fsl_pamu: replace DOMAIN_ATTR_FSL_PAMU_STASH with a direct call
iommu/fsl_pamu: merge pamu_set_liodn and map_liodn
iommu/fsl_pamu: merge handle_attach_device into fsl_pamu_attach_device
iommu/fsl_pamu: enable the liodn when attaching a device
iommu/fsl_pamu: remove the snoop_id field
iommu/fsl_pamu: remove the rpn and snoop_id arguments to pamu_config_ppaac
iommu/fsl_pamu: hardcode the window address and size in pamu_config_ppaace
iommu: remove DOMAIN_ATTR_PAGING
iommu: remove DOMAIN_ATTR_GEOMETRY
iommu: remove DOMAIN_ATTR_NESTING
iommu: remove iommu_set_cmd_line_dma_api and iommu_cmd_line_dma_api
iommu: remove DOMAIN_ATTR_IO_PGTABLE_CFG
iommu: remove iommu_domain_{get,set}_attr
iommu/amd: Remove the unused device errata code
iommu/amd: Remove the unused amd_iommu_get_v2_domain function
iommu/amd: Remove a few unused exports
iommu/amd: Move a few prototypes to include/linux/amd-iommu.h
Christophe JAILLET (1):
iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()'
Chunyan Zhang (3):
dt-bindings: iommu: add bindings for sprd IOMMU
iommu: add Unisoc IOMMU basic driver
iommu/sprd: Fix parameter type warning
Colin Ian King (1):
iommu/unisoc: Fix spelling mistake "sixe" -> "size"
Dafna Hirschfeld (1):
iommu/mediatek: Always enable the clk on resume
Jacob Pan (4):
iommu/vt-d: Enable write protect for supervisor SVM
iommu/vt-d: Enable write protect propagation from guest
iommu/vt-d: Reject unsupported page request modes
iommu/vt-d: Calculate and set flags for handle_mm_fault
Jean-Philippe Brucker (7):
iommu: Fix comment for struct iommu_fwspec
iommu/arm-smmu-v3: Use device properties for pasid-num-bits
iommu: Separate IOMMU_DEV_FEAT_IOPF from IOMMU_DEV_FEAT_SVA
iommu/vt-d: Support IOMMU_DEV_FEAT_IOPF
uacce: Enable IOMMU_DEV_FEAT_IOPF
iommu: Add a page fault handler
iommu/arm-smmu-v3: Maintain a SID->device structure
Joerg Roedel (3):
Merge tag 'arm-smmu-updates' of
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
iommu/fsl-pamu: Fix uninitialized variable warning
Merge branches 'iommu/fixes', 'arm/mediatek', 'arm/smmu', 'arm/exynos',
'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next
John Garry (4):
iova: Add CPU hotplug han
