[PATCH 19/25] MIPS: IP32: use generic dma noncoherent ops

2018-06-15 Thread Christoph Hellwig 
Provide phys_to_dma/dma_to_phys helpers, everything else is generic.

Signed-off-by: Christoph Hellwig 
---
 arch/mips/Kconfig |  2 +-
 .../include/asm/mach-ip32/dma-coherence.h | 92 ---
 arch/mips/sgi-ip32/Makefile   |  2 +-
 arch/mips/sgi-ip32/ip32-dma.c | 37 
 4 files changed, 39 insertions(+), 94 deletions(-)
 delete mode 100644 arch/mips/include/asm/mach-ip32/dma-coherence.h
 create mode 100644 arch/mips/sgi-ip32/ip32-dma.c

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e192e484b1b8..8e84d14c17fe 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -725,6 +725,7 @@ config SGI_IP28
 
 config SGI_IP32
bool "SGI IP32 (O2)"
+   select ARCH_HAS_PHYS_TO_DMA
select FW_ARC
select FW_ARC32
select BOOT_ELF32
@@ -733,7 +734,6 @@ config SGI_IP32
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_MIPS_CPU
-   select MIPS_DMA_DEFAULT
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
diff --git a/arch/mips/include/asm/mach-ip32/dma-coherence.h 
b/arch/mips/include/asm/mach-ip32/dma-coherence.h
deleted file mode 100644
index 7bdf212587a0..
--- a/arch/mips/include/asm/mach-ip32/dma-coherence.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2006  Ralf Baechle 
- *
- */
-#ifndef __ASM_MACH_IP32_DMA_COHERENCE_H
-#define __ASM_MACH_IP32_DMA_COHERENCE_H
-
-#include 
-
-struct device;
-
-/*
- * Few notes.
- * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x4000+256M
- * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x4000 for
- *native-endian)
- * 3. All other devices see memory as one big chunk at 0x4000
- * 4. Non-PCI devices will pass NULL as struct device*
- *
- * Thus we translate differently, depending on device.
- */
-
-#define RAM_OFFSET_MASK 0x3fffUL
-
-static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
-   size_t size)
-{
-   dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
-
-   if (dev == NULL)
-   pa += CRIME_HI_MEM_BASE;
-
-   return pa;
-}
-
-static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
-   struct page *page)
-{
-   dma_addr_t pa;
-
-   pa = page_to_phys(page) & RAM_OFFSET_MASK;
-
-   if (dev == NULL)
-   pa += CRIME_HI_MEM_BASE;
-
-   return pa;
-}
-
-/* This is almost certainly wrong but it's what dma-ip32.c used to use */
-static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
-   dma_addr_t dma_addr)
-{
-   unsigned long addr = dma_addr & RAM_OFFSET_MASK;
-
-   if (dma_addr >= 256*1024*1024)
-   addr += CRIME_HI_MEM_BASE;
-
-   return addr;
-}
-
-static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
-   size_t size, enum dma_data_direction direction)
-{
-}
-
-static inline int plat_dma_supported(struct device *dev, u64 mask)
-{
-   /*
-* we fall back to GFP_DMA when the mask isn't all 1s,
-* so we can't guarantee allocations that must be
-* within a tighter range than GFP_DMA..
-*/
-   if (mask < DMA_BIT_MASK(24))
-   return 0;
-
-   return 1;
-}
-
-static inline void plat_post_dma_flush(struct device *dev)
-{
-}
-
-static inline int plat_device_is_coherent(struct device *dev)
-{
-   return 0;   /* IP32 is non-coherent */
-}
-
-#endif /* __ASM_MACH_IP32_DMA_COHERENCE_H */
diff --git a/arch/mips/sgi-ip32/Makefile b/arch/mips/sgi-ip32/Makefile
index 60f0227425e7..4745cd94df11 100644
--- a/arch/mips/sgi-ip32/Makefile
+++ b/arch/mips/sgi-ip32/Makefile
@@ -4,4 +4,4 @@
 #
 
 obj-y  += ip32-berr.o ip32-irq.o ip32-platform.o ip32-setup.o ip32-reset.o \
-  crime.o ip32-memory.o
+  crime.o ip32-memory.o ip32-dma.o
diff --git a/arch/mips/sgi-ip32/ip32-dma.c b/arch/mips/sgi-ip32/ip32-dma.c
new file mode 100644
index ..fa7b17cb5385
--- /dev/null
+++ b/arch/mips/sgi-ip32/ip32-dma.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2006  Ralf Baechle 
+ */
+#include 
+#include 
+
+/*
+ * Few notes.
+ * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x4000+256M
+ * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x4000 for
+ *native-endian)
+ * 3. All other devices see memory as one big chunk at 0x4000
+ * 4. Non-PCI devices will pass NULL as struct device*
+ *
+ * Thus we translate differently, depending on device.
+ */
+
+#define RAM_OFFSET_MASK 0x3fffUL
+
+dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
+{
+   dma_addr_t dma_addr = paddr & RAM_OFFSET_MASK;
+
+   if (!dev)
+   dma_addr

[PATCH 19/25] MIPS: IP32: use generic dma noncoherent ops

2018-05-25 Thread Christoph Hellwig 
Provide phys_to_dma/dma_to_phys helpers, everything else is generic.

Signed-off-by: Christoph Hellwig 
---
 arch/mips/Kconfig |  2 +-
 .../include/asm/mach-ip32/dma-coherence.h | 92 ---
 arch/mips/sgi-ip32/Makefile   |  2 +-
 arch/mips/sgi-ip32/ip32-dma.c | 37 
 4 files changed, 39 insertions(+), 94 deletions(-)
 delete mode 100644 arch/mips/include/asm/mach-ip32/dma-coherence.h
 create mode 100644 arch/mips/sgi-ip32/ip32-dma.c

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3140955bc77c..bde16399a8fe 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -720,6 +720,7 @@ config SGI_IP28
 
 config SGI_IP32
bool "SGI IP32 (O2)"
+   select ARCH_HAS_PHYS_TO_DMA
select FW_ARC
select FW_ARC32
select BOOT_ELF32
@@ -728,7 +729,6 @@ config SGI_IP32
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_MIPS_CPU
-   select MIPS_DMA_DEFAULT
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
diff --git a/arch/mips/include/asm/mach-ip32/dma-coherence.h 
b/arch/mips/include/asm/mach-ip32/dma-coherence.h
deleted file mode 100644
index 7bdf212587a0..
--- a/arch/mips/include/asm/mach-ip32/dma-coherence.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2006  Ralf Baechle 
- *
- */
-#ifndef __ASM_MACH_IP32_DMA_COHERENCE_H
-#define __ASM_MACH_IP32_DMA_COHERENCE_H
-
-#include 
-
-struct device;
-
-/*
- * Few notes.
- * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x4000+256M
- * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x4000 for
- *native-endian)
- * 3. All other devices see memory as one big chunk at 0x4000
- * 4. Non-PCI devices will pass NULL as struct device*
- *
- * Thus we translate differently, depending on device.
- */
-
-#define RAM_OFFSET_MASK 0x3fffUL
-
-static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
-   size_t size)
-{
-   dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
-
-   if (dev == NULL)
-   pa += CRIME_HI_MEM_BASE;
-
-   return pa;
-}
-
-static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
-   struct page *page)
-{
-   dma_addr_t pa;
-
-   pa = page_to_phys(page) & RAM_OFFSET_MASK;
-
-   if (dev == NULL)
-   pa += CRIME_HI_MEM_BASE;
-
-   return pa;
-}
-
-/* This is almost certainly wrong but it's what dma-ip32.c used to use */
-static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
-   dma_addr_t dma_addr)
-{
-   unsigned long addr = dma_addr & RAM_OFFSET_MASK;
-
-   if (dma_addr >= 256*1024*1024)
-   addr += CRIME_HI_MEM_BASE;
-
-   return addr;
-}
-
-static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
-   size_t size, enum dma_data_direction direction)
-{
-}
-
-static inline int plat_dma_supported(struct device *dev, u64 mask)
-{
-   /*
-* we fall back to GFP_DMA when the mask isn't all 1s,
-* so we can't guarantee allocations that must be
-* within a tighter range than GFP_DMA..
-*/
-   if (mask < DMA_BIT_MASK(24))
-   return 0;
-
-   return 1;
-}
-
-static inline void plat_post_dma_flush(struct device *dev)
-{
-}
-
-static inline int plat_device_is_coherent(struct device *dev)
-{
-   return 0;   /* IP32 is non-coherent */
-}
-
-#endif /* __ASM_MACH_IP32_DMA_COHERENCE_H */
diff --git a/arch/mips/sgi-ip32/Makefile b/arch/mips/sgi-ip32/Makefile
index 60f0227425e7..4745cd94df11 100644
--- a/arch/mips/sgi-ip32/Makefile
+++ b/arch/mips/sgi-ip32/Makefile
@@ -4,4 +4,4 @@
 #
 
 obj-y  += ip32-berr.o ip32-irq.o ip32-platform.o ip32-setup.o ip32-reset.o \
-  crime.o ip32-memory.o
+  crime.o ip32-memory.o ip32-dma.o
diff --git a/arch/mips/sgi-ip32/ip32-dma.c b/arch/mips/sgi-ip32/ip32-dma.c
new file mode 100644
index ..fa7b17cb5385
--- /dev/null
+++ b/arch/mips/sgi-ip32/ip32-dma.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2006  Ralf Baechle 
+ */
+#include 
+#include 
+
+/*
+ * Few notes.
+ * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x4000+256M
+ * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x4000 for
+ *native-endian)
+ * 3. All other devices see memory as one big chunk at 0x4000
+ * 4. Non-PCI devices will pass NULL as struct device*
+ *
+ * Thus we translate differently, depending on device.
+ */
+
+#define RAM_OFFSET_MASK 0x3fffUL
+
+dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
+{
+   dma_addr_t dma_addr = paddr &