Re: [RFC PATCH v2 16/20] x86: Check for memory encryption on the APs
On 09/12/2016 11:43 AM, Borislav Petkov wrote: > On Mon, Aug 22, 2016 at 05:38:29PM -0500, Tom Lendacky wrote: >> Add support to check if memory encryption is active in the kernel and that >> it has been enabled on the AP. If memory encryption is active in the kernel > > A small nit: let's write out "AP" the first time at least: "... on the > Application Processors (AP)." for more clarity. Will do. Thanks, Tom > ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [RFC PATCH v2 16/20] x86: Check for memory encryption on the APs
On 09/12/2016 07:17 AM, Borislav Petkov wrote: > On Mon, Aug 22, 2016 at 05:38:29PM -0500, Tom Lendacky wrote: >> Add support to check if memory encryption is active in the kernel and that >> it has been enabled on the AP. If memory encryption is active in the kernel >> but has not been enabled on the AP then do not allow the AP to continue >> start up. >> >> Signed-off-by: Tom Lendacky >> --- >> arch/x86/include/asm/msr-index.h |2 ++ >> arch/x86/include/asm/realmode.h | 12 >> arch/x86/realmode/init.c |4 >> arch/x86/realmode/rm/trampoline_64.S | 19 +++ >> 4 files changed, 37 insertions(+) > > ... > >> diff --git a/arch/x86/realmode/rm/trampoline_64.S >> b/arch/x86/realmode/rm/trampoline_64.S >> index dac7b20..94e29f4 100644 >> --- a/arch/x86/realmode/rm/trampoline_64.S >> +++ b/arch/x86/realmode/rm/trampoline_64.S >> @@ -30,6 +30,7 @@ >> #include >> #include >> #include >> +#include >> #include "realmode.h" >> >> .text >> @@ -92,6 +93,23 @@ ENTRY(startup_32) >> movl%edx, %fs >> movl%edx, %gs >> >> +/* Check for memory encryption support */ >> +bt $TH_FLAGS_SME_ENABLE_BIT, pa_tr_flags >> +jnc .Ldone >> +movl$MSR_K8_SYSCFG, %ecx >> +rdmsr >> +bt $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax >> +jc .Ldone >> + >> +/* >> + * Memory encryption is enabled but the MSR has not been set on this >> + * CPU so we can't continue > > Hmm, let me try to parse this correctly: BSP has SME enabled but the > BIOS might not've set this on the AP? Really? Is that even possible? Anything is possible, although it's highly unlikely. > > Because if SME is enabled, that means that MSR_K8_SYSCFG[23] on the BSP > is set, right? Correct. > > Also, I want to rule out here simple BIOS idiocy: if the only problem > with the bit not being set in the AP is because some BIOS monkey forgot > to do so, then we should try to set it ourselves and not die for no real > reason. Yes, we can do that. I was debating on which way to go with this. Most likely this would never happen, but if it did... I can change this to set the MSR bit and continue. Thanks, Tom > > Or is there another issue? > ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [RFC PATCH v2 16/20] x86: Check for memory encryption on the APs
On Mon, Aug 22, 2016 at 05:38:29PM -0500, Tom Lendacky wrote: > Add support to check if memory encryption is active in the kernel and that > it has been enabled on the AP. If memory encryption is active in the kernel A small nit: let's write out "AP" the first time at least: "... on the Application Processors (AP)." for more clarity. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [RFC PATCH v2 16/20] x86: Check for memory encryption on the APs
On Mon, Aug 22, 2016 at 05:38:29PM -0500, Tom Lendacky wrote: > Add support to check if memory encryption is active in the kernel and that > it has been enabled on the AP. If memory encryption is active in the kernel > but has not been enabled on the AP then do not allow the AP to continue > start up. > > Signed-off-by: Tom Lendacky > --- > arch/x86/include/asm/msr-index.h |2 ++ > arch/x86/include/asm/realmode.h | 12 > arch/x86/realmode/init.c |4 > arch/x86/realmode/rm/trampoline_64.S | 19 +++ > 4 files changed, 37 insertions(+) ... > diff --git a/arch/x86/realmode/rm/trampoline_64.S > b/arch/x86/realmode/rm/trampoline_64.S > index dac7b20..94e29f4 100644 > --- a/arch/x86/realmode/rm/trampoline_64.S > +++ b/arch/x86/realmode/rm/trampoline_64.S > @@ -30,6 +30,7 @@ > #include > #include > #include > +#include > #include "realmode.h" > > .text > @@ -92,6 +93,23 @@ ENTRY(startup_32) > movl%edx, %fs > movl%edx, %gs > > + /* Check for memory encryption support */ > + bt $TH_FLAGS_SME_ENABLE_BIT, pa_tr_flags > + jnc .Ldone > + movl$MSR_K8_SYSCFG, %ecx > + rdmsr > + bt $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax > + jc .Ldone > + > + /* > + * Memory encryption is enabled but the MSR has not been set on this > + * CPU so we can't continue Hmm, let me try to parse this correctly: BSP has SME enabled but the BIOS might not've set this on the AP? Really? Is that even possible? Because if SME is enabled, that means that MSR_K8_SYSCFG[23] on the BSP is set, right? Also, I want to rule out here simple BIOS idiocy: if the only problem with the bit not being set in the AP is because some BIOS monkey forgot to do so, then we should try to set it ourselves and not die for no real reason. Or is there another issue? -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[RFC PATCH v2 16/20] x86: Check for memory encryption on the APs
Add support to check if memory encryption is active in the kernel and that
it has been enabled on the AP. If memory encryption is active in the kernel
but has not been enabled on the AP then do not allow the AP to continue
start up.
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/msr-index.h |2 ++
arch/x86/include/asm/realmode.h | 12
arch/x86/realmode/init.c |4
arch/x86/realmode/rm/trampoline_64.S | 19 +++
4 files changed, 37 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 56f4c66..797d228 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -336,6 +336,8 @@
#define MSR_K8_TOP_MEM10xc001001a
#define MSR_K8_TOP_MEM20xc001001d
#define MSR_K8_SYSCFG 0xc0010010
+#define MSR_K8_SYSCFG_MEM_ENCRYPT_BIT 23
+#define MSR_K8_SYSCFG_MEM_ENCRYPT (1ULL << MSR_K8_SYSCFG_MEM_ENCRYPT_BIT)
#define MSR_K8_INT_PENDING_MSG 0xc0010055
/* C1E active bits in int pending message */
#define K8_INTP_C1E_ACTIVE_MASK0x1800
diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index 230e190..c89e326 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -1,6 +1,15 @@
#ifndef _ARCH_X86_REALMODE_H
#define _ARCH_X86_REALMODE_H
+/*
+ * Flag bit definitions for use with the flags field of the trampoline header
+ * when configured for X86_64
+ */
+#define TH_FLAGS_SME_ENABLE_BIT0
+#define TH_FLAGS_SME_ENABLE(1ULL << TH_FLAGS_SME_ENABLE_BIT)
+
+#ifndef __ASSEMBLY__
+
#include
#include
@@ -38,6 +47,7 @@ struct trampoline_header {
u64 start;
u64 efer;
u32 cr4;
+ u32 flags;
#endif
};
@@ -69,4 +79,6 @@ static inline size_t real_mode_size_needed(void)
void set_real_mode_mem(phys_addr_t mem, size_t size);
void reserve_real_mode(void);
+#endif /* __ASSEMBLY__ */
+
#endif /* _ARCH_X86_REALMODE_H */
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index f74925f..c3edb49 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -101,6 +101,10 @@ static void __init setup_real_mode(void)
trampoline_cr4_features = &trampoline_header->cr4;
*trampoline_cr4_features = mmu_cr4_features;
+ trampoline_header->flags = 0;
+ if (sme_me_mask)
+ trampoline_header->flags |= TH_FLAGS_SME_ENABLE;
+
trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
trampoline_pgd[0] = trampoline_pgd_entry.pgd;
trampoline_pgd[511] = init_level4_pgt[511].pgd;
diff --git a/arch/x86/realmode/rm/trampoline_64.S
b/arch/x86/realmode/rm/trampoline_64.S
index dac7b20..94e29f4 100644
--- a/arch/x86/realmode/rm/trampoline_64.S
+++ b/arch/x86/realmode/rm/trampoline_64.S
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
#include "realmode.h"
.text
@@ -92,6 +93,23 @@ ENTRY(startup_32)
movl%edx, %fs
movl%edx, %gs
+ /* Check for memory encryption support */
+ bt $TH_FLAGS_SME_ENABLE_BIT, pa_tr_flags
+ jnc .Ldone
+ movl$MSR_K8_SYSCFG, %ecx
+ rdmsr
+ bt $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax
+ jc .Ldone
+
+ /*
+* Memory encryption is enabled but the MSR has not been set on this
+* CPU so we can't continue
+*/
+.Lno_sme:
+ hlt
+ jmp .Lno_sme
+.Ldone:
+
movlpa_tr_cr4, %eax
movl%eax, %cr4 # Enable PAE mode
@@ -147,6 +165,7 @@ GLOBAL(trampoline_header)
tr_start: .space 8
GLOBAL(tr_efer) .space 8
GLOBAL(tr_cr4) .space 4
+ GLOBAL(tr_flags).space 4
END(trampoline_header)
#include "trampoline_common.S"
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